DE10243763B4 - Method for detecting and evaluating bus errors - Google Patents

Abstract

Method for detecting and evaluating errors in a system with at least one bus system and units connected to it, in which error entries are generated in the individual units, characterized in that when an error is detected by one or more units (E), an error message corresponding to this Error code (FCx) is entered in the error memory (s) of the unit (s) (E) concerned, for error evaluation the error entries of all units (E) are evaluated, whereby: a) for all error codes (FCx) entered, all possibly faulty ones System components (Sy) are determined, b) for each determined possibly defective system component (Sy) those registered error codes (FCx) are determined which are assigned to this possibly defective system component (Sy), c) for each determined possibly defective system component (Sy) the Number of and / or lack of certain entries ner error codes (FCx) among the error codes assigned to the possibly defective system components (Sy) is determined as the resulting count value (Zx), d) the resulting count value (Zx) ...

Description

The invention relates to a method for detecting and evaluating bus errors in a bus system and to these connected units, are generated in the error entries in the individual units.

In bus systems, for example in the electrical system of motor vehicles, different errors can occur, for. B. malfunction of bus subscribers or errors in a transmitting / receiving unit, which may occur sporadically. In addition to such errors, which may be obtained from error information from bus drivers and bus controllers, or from plausibility tests performed via the software, physical bus errors such as line shorts and e.g. B. Protocol violations occur. These rather logical errors lead to the absence of messages and so-called time-out errors. All these errors are diagnosed, evaluated and stored locally in the respective control unit. The evaluation of the errors takes place later in an external test device. Although there are guidelines for troubleshooting by the operator or the vehicle mechanic. There is no linkage between the individual errors.

As mentioned, the individual fault entries occur locally in the individual control units, which however are operated under different conditions (eg supply voltage). Also, the error rating mechanisms in the individual controllers or modules may be different. Thus, one and the same bus error in different control units can lead to different error entries, even if the control units are connected to the same bus. In addition, there are complex communication structures that include gateways connected bus structures with different data rates and protocols. When evaluating bus errors stored in ECUs for fault localization, the uncertainty and possible inconsistency of the fault entries are not sufficiently taken into account.

If error entries of various control units are linked for the purpose of evaluation, this is done in a manner which is not very flexible and error-prone due to rigid programming.

From the DE 198 10 289 A1 a data bus is known which has monitoring function and in which an identification of a disturbance is to be made possible. For this purpose, a number of individual measures are taken, which are in the signal processing and hardware equipment. To identify the interferer, an active participant always places a memory element in a so-called active state.

Next is in the DE 198 10 292 A1 a data bus to be detected in the erroneous transmissions. Signals are stored, ie reported to a logical decision element and stored in a buffer. For each signal input and error message, a counter is incremented on error message.

In the DE 39 43 766 C2 a self-diagnostic system for the diagnosis of an electronic control unit of a motor vehicle is described in which a corresponding error code and also the operating data associated with the control deviation are stored in the event of a deviation of the control from predetermined parameter values. The error code is displayed.

The DE 195 23 483 A1 relates to a computer-aided fault diagnosis device for use in motor vehicles, by means of which an error model is created. Using the error model and transmitted diagnostic-related data, which may include stored error codes, a diagnosis is made.

The invention has for its object to provide a method by means of which the most likely error location can be determined from stored error entries and which can be adapted to different bus configurations without much effort.

This object is achieved in a method with the features of claim 1. Advantageous process variants are the subject of the dependent claims.

The inventive method is characterized in that it is insensitive to false error entries, if enough error codes are available. For example, incorrect error entries can occur if errors are set unauthorized. Such incorrect entries usually falsify the result hardly, since there are a large number of evaluable bus errors and thus error codes in a vehicle electrical system.

Also, when using the method according to the invention, an adaptation to another vehicle configuration can be carried out easily. It is only necessary to remove or add rows in the error cause table.

The invention will be further described and explained below with reference to the drawing. In the drawing shows

1 a schematic representation of a bus system with two bus lines, connected to these units and a gateway.

This in 1 illustrated bus system includes two as system components via a gateway 1 interconnected bus lines 2 . 3 and to the bus lines connected units, of which for each bus strand 2 . 3 two control units each 4 . 5 ; 6 . 7 are shown.

The following telegram traffic is assumed for the bus system: T1: transmitter Control unit A receiver Controllers B and C T2: transmitter Control unit A receiver Control unit B T3: transmitter Control unit D receiver Control units A and B T4: transmitter Control unit C receiver Control unit D

In the individual control units there are the following error codes FCx, which signal the absence of receiving telegrams: FC1: T1 is missing in controller B FC2: T1 is missing in controller C. FC3: T2 is missing in controller B FC4: T3 is missing in control unit A FC5: T3 is missing in control unit B FC6: T4 is missing in control unit D

As a first measure for error localization for all error codes the possible causes of errors, ie faulty system components, compiled. These are listed in the table below. Every possibility of error is illustrated with "+". reason Contro. A defective Contro. B defective Contro. C defective Contro. D defective Gateway defective Bus 1 defective Bus 2 defective FC1 + + + FC2 + + + + + FC3 + + + FC4 + + + + + FC5 + + + + + FC6 + + + Zx, Nx (Z1, N1) (Z2, N2) (Z3, N3) (Z4, N4) (Z5, N5) (Z6, N6) (Z7, N7)

For each cause of error, a counter Zx is provided: Z1: Counter for "Control unit A defective" Z2: Counter for "Controller B defective" Z3: Counter for "control unit C defective" Z4: Counter for "control unit D defective" Z5: Counter for "Gateway defective" Z6: Counter for "Bus 1 defective" Z7: Counter for "Bus 2 defective"

It is now assumed that an error has occurred and led to error entries in the units.

For every possibility of error, d. H. Each system unit (cause of error) that is considered to be faulty, adds the number of assigned error codes FC1 to FC6 also entered for this system unit to a provisional count value vZx which, in the case of the above table, thus maximizes the number of "+" per column can be.

When evaluating the error memory entries of the table, all error codes FCx and all possibly defective system components corresponding to them are considered. In the described embodiment, the procedure is column-wise. The provisional counts vZx are used. Is a considered error code FCx z. If, for example, the system component concerned has not detected this error code as a possibly faulty system component, the provisional count vZx in question is decremented by one. To make the resulting resulting individual error code counts Zx comparable, they undergo some sort of normalization. For this purpose, a count value Nx is determined for each possible cause of the error (column) as a measure of the column frequency. This count Nx is incremented each time the column's error code count Zx is incremented or decremented. The counts Zx are divided by the counts Nx (column frequencies): Zx / Nx: -1 ≤ Zx / Nx ≤ +1.

If a bus error occurs, the algorithm described above is run through. The highest quotient Zx / Nx indicates the most probable error location.

However, it may be the case that several equally large quotients occur. Then, the cause of the error is the most likely one in which the column error rate Nx is greatest.

In the following two examples are considered to further illustrate the method of the invention.

example 1

The gateway is defective. The error codes FC2, FC4 and FC5 are set. This results in Zx, Nx and Zx / Nx: Z1 = -1 N1 = 5 Z1 / N1 = -0.20 Z2 = -3 N2 = 5 Z2 / N2 = -0.60 Z3 = -2 N3 = 4 Z3 / N3 = -0.50 Z4 = 0 N4 = 4 Z4 / N4 = 0 Z5 = 3 N5 = 3 Z5 / N5 = 1.00 Z6 = 1 N6 = 5 Z6 / N6 = 0.20 Z7 = 2 N7 = 4 Z7 / N7 = 0.50

Z5 / N5 is the largest quotient and thus the gateway is identified as a fault location.

Example 2

Bus 2 is defective. The error codes FC2, FC4, FC5 and FC6 are set. This results in Zx, Nx and Zx / Nx: Z1 = -2 N1 = 6 Z1 / N1 = -0.33 Z2 = -4 N2 = 6 Z2 / N2 = -0.66 Z3 = 0 N3 = 4 Z3 / N3 = 0 Z4 = 2 N4 = 4 Z4 / N4 = 0.50 Z5 = 2 N5 = 4 Z5 / N5 = 0.50 Z6 = 0 N6 = 6 Z6 / N6 = 0 Z7 = 4 N7 = 4 Z7 / N7 = 1.00

Z7 / N7 is the largest quotient. Thus, the bus 2 is identified as a fault location.

Claims (7)

Method for detecting and evaluating errors in a system having at least one bus system and units connected thereto, in which error entries are generated in the individual units, characterized in that upon detection of an error by one or more units (E) corresponding to this error message Error code (FCx) is entered in the fault memory (s) of the relevant unit (s) (E) for which error evaluation the fault entries of all units (E) are evaluated, where: a) all possibly faulty codes for all entered fault codes (FCx) System components (Sy) are determined, b) for each determined possibly faulty system component (Sy) those entered fault codes (FCx) are assigned, which are assigned to this possibly faulty system component (Sy), c) for each determined possibly faulty system component (Sy) Number of and / or absence specific r from the error codes (FCx) assigned to the possibly faulty system components (Sy) is determined to be the resulting count (Zx), d) the resulting count (Zx) is normalized for each possibly faulty system component (Sy), and e) the highest standardized resulting count (Zx / Nx) corresponding faulty system component (Sy) is determined as the fault location. Method according to claim 1, characterized in that the resulting count (Zx) is determined by: c1) for each possibly faulty system component (Sy), the number of assigned registered fault codes (FCx) is determined as provisional resulting count value (vZx), c2) is decremented for each possibly faulty system component (Sy) of the provisional resulting count (vZx) detected in step c1) if an associated error code (FCx) is entered and for that error code (FCx) the system component (Sy) is not considered a possibly faulty system component has been determined, and / or the detected temporary resulting count (vZx) is decremented if an error code (FCx) assigned to the possibly faulty system component (Sy) has not been entered and the system component (Sy) has been determined to be a possibly faulty system component. Method according to claim 2, characterized in that the resulting count (Zx) is determined by: c3) for each possibly faulty system component (Sy), the number of decrements of the provisional resulting count (vZx) determined in step c1) is added to the provisional resulting count (vZx) determined in step c1) the resulting count (Zx) gives. Method according to one of claims 1 to 3, characterized in that the resulting count value (Zx) is normalized by d1) determining a number (Nx) of entries from the possibly faulty system component (Sy) associated error codes (FCx) and dividing the resulting count (Zx) by the number (Nx) and e1) the possibly faulty system component (Sy) as Error location is determined for which the largest value (Zx / Nx) has been obtained. A method according to claim 4, characterized in that d2) the number (Nx) is determined by incrementing its value (Nx) each time the count value (Zx) is incremented or decremented. Method according to one of claims 1 to 5, characterized in that for the error evaluation, a table with a list of all entered error codes (FCx) of all units and the possibly faulty system components (Sy) assigned to these error codes is created and d3) the normalization of the resulting count (Zx) is performed in the order of the possibly faulty system components (Sy) listed in the table. Method according to one of Claims 1 to 6, characterized in that d4) in the case of identical count values (Zx) for a plurality of possibly faulty system components (Sy), the possibly faulty system component (Sy) is defined as the error location having the highest number of entered fault codes ( FCx) has been assigned.

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