DE102012025896B4 - Optoelectronic module - Google Patents

Abstract

Optoelectronic module (202, 204, 206, 208, 210, 212, 214, 216) with:- at least one semiconductor chip (104) for emitting electromagnetic radiation (118), which has a layer of a first conductivity (120), in particular a p-conductivity, a layer of a second conductivity (124), in particular an n-conductivity, a radiation surface (108) and a contact surface (106) opposite the radiation surface (108),- a contact (110, 117) on the radiation surface (108),- a frame (103) made of potting compound (102), which laterally encloses the semiconductor chip (104) at least in regions such that the radiation surface (108) and the contact surface (106) are essentially free of potting compound (102),- a first contact structure (114), at least partially arranged on the frame (103) and at least partially arranged on the contact surface (106), for electrically contacting the layer of a first conductivity (120) and- a second contact structure (116, 138) at least partially arranged on the frame (103) and at least partially arranged on the contact (110, 117) of the radiating surface (108), for electrically contacting the layer of a second conductivity (124),- a mixing element (154) for spatially mixing electromagnetic radiation, wherein the mixing element (154) is arranged downstream of the semiconductor chip (104) in the radiation direction, and- scattering or reflecting or absorbing particles are dispersed in the potting compound (102).

Description

The present invention relates to an optoelectronic module.

Optoelectronic modules from the prior art can have a plurality of semiconductor chips arranged on a carrier. One possible goal can be to provide a surface light with a homogeneous luminance. However, the arrangement of many semiconductor chips required for this can be disadvantageous for reasons of interconnectability and contactability, among other things.

The publication DE 10 2007 030 129 A1 describes a method for producing a plurality of optoelectronic components and an optoelectronic component, and the publication DE 10 2010 028 407 A1 describes an optoelectronic component and a method for producing an optoelectronic component.

An object of the invention is to provide an optoelectronic module and a method for producing an optoelectronic module which improves the state of the art.

This object is achieved by an optoelectronic module according to independent patent claim 1.

Further developments and advantageous embodiments of the optoelectronic module and of the method for producing an optoelectronic module are specified in the dependent claims.

EXEMPLARY EMBODIMENTS

The present invention relates to an optoelectronic module with at least one semiconductor chip for emitting electromagnetic radiation. The semiconductor chip has a layer of a first conductivity, in particular a p-conductivity, a layer of a second conductivity, in particular an n-conductivity, a radiation surface and a contact surface opposite the radiation surface. A contact is applied to the radiation surface. A frame made of potting compound encloses the at least one semiconductor chip laterally at least in regions such that the radiation surface and the contact surface are essentially free of potting compound. A first contact structure is arranged at least in regions on the frame and at least in regions on the contact surface and serves to electrically contact the layer of a first conductivity. A second contact structure is arranged at least in regions on the frame and at least in regions on the contact of the radiation surface and serves to electrically contact the layer of a second conductivity.

The complete separation of optical and electrical functions is particularly advantageous here. The subsequent application of an optical element, in particular a mixing element for spatial mixing of electromagnetic radiation, has a purely optical function. The first contact structure, the second contact structure and the contact on the radiating surface have a purely electrical function.

Embedding the at least one semiconductor chip in a frame made of potting compound and guiding the contact structures over the frame is advantageous because it simplifies and reduces the cost of contacting the at least one semiconductor chip. In particular, the module according to the invention is suitable for bond wire-free contacting.

Furthermore, it is advantageous that, according to the invention, all electrical connections are first made before optical elements, such as mixing elements, are attached. This allows the contact structures to be tested and, if necessary, reworked before the optical element is attached.

In a preferred embodiment, the semiconductor chips have an edge length of approximately 50 µm to approximately 200 µm. A large number of such small semiconductor chips is advantageous for producing surface light sources with a homogeneous luminance.

By using the frame made of potting compound, the minimum distance between the semiconductor chips can reach values of about 20 µm.

The thickness of the frame essentially corresponds to the thickness of the semiconductor chip. This is advantageous because the semiconductor chip is completely surrounded by potting compound on its side surfaces and does not protrude beyond the frame. The minimum possible thickness of the frame is around 100µm. The thickness of the semiconductor chip results from the thickness of the epitaxial layers and the thickness of the substrate, in particular the electrically conductive one, on which the epitaxial layers are applied. Germanium can serve as such a substrate.

• - Silikon
• - Epoxydharz
• - Hybridmaterialien

In a preferred embodiment, the potting compound comprises at least one of the following materials:

• - Silicone
• - Epoxy resin
• - hybrid materials

Silicone as a casting compound is particularly advantageous because it is temperature stable. Silicone is also radiation-stable against electromagnetic radiation in the entire visible spectral range. Epoxy resin as a casting compound is particularly advantageous because it is cheap. Hybrid materials are particularly advantageous because they combine the advantages of silicone and epoxy resin.

• - Titandioxid (TiO₂),
• - Aluminiumoxid (Al₂O₃),
• - Zirkoniumoxid (ZrO),
• - Bariumdifluorid (BaF₂).

In a preferred embodiment, particles comprising at least one of the following materials are dispersed in the potting compound:

• - titanium dioxide (TiO ₂ ),
• - aluminum oxide (Al ₂ O ₃ ),
• - Zirconium oxide (ZrO),
• - Barium difluoride (BaF ₂ ).

These particles act as scattering particles with a diffuse reflectivity (the angle of incidence is usually not equal to the angle of reflection). The scattering particles can advantageously have a grain size of about 500nm to about 3µm. The diameter of the scattering particles is therefore in the range of the wavelength of the light that is to be scattered.

• - Silber (Ag),
• - Aluminium (Al),
• - Quanten-Dots.

Alternatively or in addition to the scattering particles, specularly reflecting particles (angle of incidence is usually equal to angle of reflection) can be introduced into the casting compound, which comprise at least one of the following materials:

• - Silver (Ag),
• - Aluminum (Al),
• - Quantum dots.

Scattering particles and specularly reflecting particles in the casting compound are advantageous because these particles reflect at least part of the incident light. This reduces the absorption losses in the casting compound.

In a preferred embodiment, particles containing silicon dioxide (SiO ₂ ) are dispersed in the potting compound.

This is advantageous because the SiO ₂ particles lead to a reduction in the thermal expansion coefficient of the potting compound.

In a preferred embodiment, particles containing soot are dispersed in the potting compound. The use of soot particles is advantageous for applications in which light striking the potting compound is to be absorbed.

The first and second contact structures comprise electrically conductive material. The electrically conductive material may comprise metals and metallic alloys.

In a preferred embodiment, the contact on the radiating surface has a transparent contact layer, in particular made of indium tin oxide and/or zinc oxide. The transparent contact layer covers the radiating surface of the semiconductor chip at least in regions, preferably over the entire surface. The absence of metallic contact structures on the light-emitting side of the semiconductor chip enables a flat surface of the semiconductor chip. This flat surface is advantageous for the efficient coupling of electromagnetic radiation from the semiconductor chip into a downstream optical element, such as a mixing element. It is particularly advantageous that there is no shading by the bonding wire. In addition, no light-emitting surface is lost due to a bonding pad on the radiating surface of the semiconductor chip.

In an alternative preferred embodiment, the contact on the radiating surface comprises a contact pad. The contact pad covers less than 30%, preferably less than 15% of the radiating surface. The contact pad may comprise a metal such as gold or silver or a metallic alloy and may be in direct contact with the radiating surface. The electrical contact between the portion of the second contact structure that runs on the frame and the contact pad on the radiating surface is established by an electrically conductive, substantially planar contact layer. The technology for producing such planar contact layers is commonly referred to as Compact Planar High Flux (CPHF) technology. The planar layer may have a thickness between 5 µm and 60 µm, preferably between 15 µm and 25 µm. The width of the planar layer may be between 5 µm and 200 µm, preferably between 15 µm and 100 µm. The use of the above planar layer for contacting the contact pad is advantageous because the planar layer has a high current-carrying capacity and a low overall height compared to a conventional bonding wire. In addition, comparatively small contact pads can be contacted using the above planar layer. The shading caused by these comparatively small contact pads is significantly reduced compared to the shading caused by the comparatively large bonding pads in conventional wire bonding. The contact pads according to the invention are smaller than conventional bonding pads by an area factor of 10 to 100.

In a preferred embodiment, an electrically insulating insulation layer, in particular made of a dielectric. A heat sink, particularly a metallic one, is applied to the insulation layer. The heat sink leads to heat spreading, i.e. a distribution of heat over the surface. This is particularly advantageous when using higher-performance semiconductor chips. The spread heat can then be better dissipated into the ambient air via convection.

In a preferred embodiment, the first contact structure is applied to the side of the frame that borders the contact surface. The second contact structure is applied to the side of the frame that borders the radiating surface.

• - Lanthan dotiertes Yttriumoxid (Y₂O₃-La₂O₃),
• - Yttrium Aluminium Granat (Y₃Al₅O₁₂),
• - Dysprosiumoxid (Dy₂O₃),
• - Aluminium Oxynitrid (Al₂₃O₂₇N₅) oder
• - Aluminium Nitrid (AlN).

In a preferred embodiment, the optoelectronic module has a conversion element. The conversion element can have silicone or a ceramic material as the host material. Phosphor particles can be embedded in the host material. The conversion element is arranged downstream of the semiconductor chip in the direction of emission. The conversion element is advantageous for efficiently converting short-wave primary light into longer-wave secondary light. Phosphor particles can convert blue light into yellow light in particular. The phosphor particles can have at least one of the following materials:

• - Lanthanum-doped yttrium oxide (Y ₂ O ₃ -La ₂ O ₃ ),
• - Yttrium aluminum garnet (Y ₃ Al ₅ O ₁₂ ),
• - Dysprosium oxide (Dy ₂ O ₃ ),
• - Aluminum oxynitride (Al ₂₃ O ₂₇ N ₅ ) or
• - Aluminium Nitride (AlN).

• - Glas (SiO₂),
• - Silikon,
• - Polymethylmethacrylat (PMMA),
• - Polycarbonat (PC) aufweisen.

The optoelectronic module has a mixing element. The mixing element serves for spatial and spectral mixing of the electromagnetic radiation of the at least one semiconductor chip. The mixing element is arranged downstream of the at least one semiconductor chip in the direction of radiation. The mixing element can contain at least one of the matrix materials

• - Glass (SiO ₂ ),
• - Silicone,
• - Polymethyl methacrylate (PMMA),
• - Polycarbonate (PC).

The use of glass or silicone is particularly advantageous because these materials are inexpensive and easy to process.

The complete separation of optical and electrical functions is particularly advantageous when using the mixing element according to the invention. The mixing element for spatial mixing of electromagnetic radiation has a purely optical function. The first contact structure, the second contact structure and the contact on the radiating surface have a purely electrical function.

• - Titandioxid (TiO₂),
• - Aluminiumoxid (Al₂O₃)
• - Zirkoniumoxid (ZrO),
• - Bariumdifluorid (BaF₂).

Scattering particles can advantageously be embedded in the matrix material of the mixing element. The scattering particles comprise at least one of the following materials:

• - titanium dioxide (TiO ₂ ),
• - aluminum oxide (Al ₂ O ₃ )
• - Zirconium oxide (ZrO),
• - Barium difluoride (BaF ₂ ).

The use of scattering particles is particularly advantageous because the scattering particles can reduce the minimum thickness of the mixing element required for light mixing.

In a preferred embodiment, a structured mirror layer, in particular a metallic mirror layer, or a structured scattering layer, in particular made of silicone, in which scattering particles are dispersed, is arranged at least in some areas between the frame and the mixing element. Such a mirror layer or scattering layer is advantageous because light that is not coupled out can be reflected back into the mixing element and can subsequently be emitted by the optoelectronic module.

In a preferred embodiment, a transparent refractive index matching element, in particular made of silicone, is provided between the radiating surface and the mixing element. Such a silicone-based matching element is also called "index matching gel". The refractive index of the transparent refractive index matching element lies between the refractive index of the semiconductor chip and the refractive index of the mixing element. This is advantageous because the electromagnetic radiation emitted by the semiconductor chip can be coupled into the mixing element more efficiently.

In a preferred embodiment, the distance between adjacent semiconductor chips corresponds essentially to the thickness of the mixing element. Typical values for the thickness are between 1mm and 10mm, preferably between 3mm and 6mm, particularly preferably 4mm. Maintaining the above relationship between the thickness of the mixing element and the distance between the semiconductor chips is advantageous because this allows sufficient mixing of the Lambertian light emission of the individual semiconductor chips to be achieved. This enables a surface light with an essentially homogeneously illuminated surface.

In a preferred embodiment, at least two semiconductor chips are provided. In the simplest case, the semiconductor chips are connected in parallel. In a further preferred embodiment, the semiconductor chips are connected in series. The serial connection is particularly advantageous because it enables a substantially homogeneous current distribution to the semiconductor chips. In a further preferred embodiment, several strands of semiconductor chips can be supplied with current in parallel, with the semiconductor chips in each strand being supplied with current in series.

In a preferred embodiment, at least one electrical feedthrough is provided in the frame made of potting compound. The electrical feedthrough can comprise a metal. The electrical feedthrough can be produced from a copper foil by punching or laser processing. Alternatively, the electrical feedthrough can comprise silicon. The electrical feedthrough connects the first contact structure of a semiconductor chip to the second contact structure of an adjacent semiconductor chip in an electrically conductive manner. The electrical feedthrough is absolutely necessary for serial connection of the semiconductor chips.

• - Aufbringen mindestens eines Halbleiterchips zur Emission elektromagnetischer Strahlung auf eine Klebefolie, wobei der Halbleiterchip eine Schicht einer ersten Leitfähigkeit, eine Schicht einer zweiten Leitfähigkeit, eine Abstrahlfläche mit einem Kontakt und eine der Abstrahlfläche gegenüberliegende Kontaktfläche aufweist, wobei die Abstrahlfläche zur Klebefolie weist;
• - Aufbringen eines Rahmens aus Vergussmasse auf die freiliegenden Bereiche der Klebefolie, derart, dass der Halbleiterchip seitlich zumindest bereichsweise von Vergussmasse umschlossen wird;
• - Aufbringen einer ersten Kontaktstruktur auf den Rahmen und auf die Kontaktfläche zur elektrischen Kontaktierung der Schicht einer ersten Leitfähigkeit, insbesondere einer p-Leitfähigkeit;
• - Entfernen der Klebefolie;
• - Aufbringen einer zweiten Kontaktstruktur auf den Rahmen und auf den Kontakt der Abstrahlfläche, zur elektrischen Kontaktierung der Schicht einer zweiten Leitfähigkeit, insbesondere einer n-Leitfähigkeit.

A method for producing an optoelectronic module with the following steps relates according to one embodiment:

• - Applying at least one semiconductor chip for emitting electromagnetic radiation to an adhesive film, wherein the semiconductor chip has a layer of a first conductivity, a layer of a second conductivity, a radiation surface with a contact and a contact surface opposite the radiation surface, wherein the radiation surface faces the adhesive film;
• - applying a frame of potting compound to the exposed areas of the adhesive film in such a way that the semiconductor chip is laterally enclosed by potting compound at least in some areas;
• - applying a first contact structure to the frame and to the contact surface for electrically contacting the layer of a first conductivity, in particular a p-conductivity;
• - Remove the adhesive film;
• - Applying a second contact structure to the frame and to the contact of the radiating surface, for electrically contacting the layer of a second conductivity, in particular an n-conductivity.

The use of an adhesive film for attaching the at least one semiconductor chip is advantageous because it is sufficient to place the semiconductor chips on the adhesive film without having to adhere to particularly tight placement tolerances. The adhesive force of the adhesive film must be selected so that the semiconductor chips adhere sufficiently firmly for the following process steps. However, the adhesive force must be limited so that the adhesive film can be detached from the semiconductor chips and from the frame made of encapsulating compound after the first contact structure has been applied without leaving residues or damaging the at least one semiconductor chip. Encapsulating the at least one semiconductor chip in a frame made of encapsulating compound and guiding the contact structures over the frame are advantageous because it simplifies and reduces the cost of contacting the semiconductor chip. It is also advantageous that, according to the invention, all electrical connections are first made before optical components, such as mixing elements, are attached. This enables the contact structures to be tested and, if necessary, reworked before the optical component is attached.

The first and second contact structures can be applied by applying a metallization over a large area. One possible advantage of flat conductor structures is that they can have a higher current-carrying capacity than bonding wires in classic wire bonding. Flat conductor structures can also reduce the height of the optoelectronic component compared to classic wire bonding.

The surface application of the metallization on the frame, on the contact on the radiating surface and on the contact surface can be done directly in a structured manner or by using the so-called photo technology.

• - Siebdrucken, bei dem durch Verwendung von Schablonen oder Abdeckmasken eine flächige Metallisierung auf den Rahmen und auf die Halbleiterchips aufgebracht wird. Hierbei wird eine elektrisch leitfähige Paste aufgerakelt. In einem Prozessschritt können Metallisierungsdicken von etwa 30 µm erreicht werden. Vorzugsweise kann für eine erhöhte Stromleitfähigkeit und eine erhöhte Stabilität der metallisierten Struktur der Prozessschritt mehrfach wiederholt werden.
• - Dispensen, bei dem Metallpartikel und ein organisches Medium zu einer Paste vermengt sind und diese Paste mittels einer Kanüle und einer Spritze durch Druckluftimpulse auf den Rahmen aufgebracht wird. Anschließend wird die Paste getrocknet und getempert. Besonders vorteilhaft ist es dabei, dass über die Parameter Druck und Zeit eine beliebige Form der Metallisierung erreicht werden kann. Durch Dispensen wird eine sehr gut haftende Metallisierungsschicht erzeugt. Es können Dicken der Metallisierungsschicht von etwa 50 µm erzeugt werden.

• - Jetten, bei dem aus einem Vorratsbehälter durch kurze Impulse Tröpfchen aus elektrisch leitfähigem Material auf den Rahmen aufgebracht werden. Nach dem Aufbringen wird das Material ausgehärtet. Dieses Verfahren ist besonders vorteilhaft, da es kontaktlos abläuft.
• - Spritzen von elektrisch leitfähigem Material auf den Rahmen.

For the direct structured application of the metallization, the following alternative methods can be used:

• - Screen printing, in which a flat metallization is applied to the frame and the semiconductor chips using stencils or masking masks. An electrically conductive paste is applied with a doctor blade. Metallization thicknesses of around 30 µm can be achieved in one process step. The process step can preferably be repeated several times to increase electrical conductivity and stability of the metallized structure.
• - Dispensing, in which metal particles and an organic medium are mixed to form a paste and this paste is applied to the frame using a cannula and a syringe with compressed air pulses. The paste is then dried and tempered. A particularly advantageous feature is that any form of metallization can be achieved using the parameters of pressure and time. A very well-adhering metallization layer is created by dispensing. Metallization layers of around 50 µm in thickness can be created.

• - Jetting, in which droplets of electrically conductive material are applied to the frame from a storage container using short pulses. After application, the material is hardened. This process is particularly advantageous because it is contactless.
• - Spraying electrically conductive material onto the frame.

• - Fotolithografie:
  • Aufbringen von Fotolack durch Rotationsbeschichtung auf den gesputterten Seedlayer. Dann wird der Fotolack getrocknet. Anschließend wird der Fotolack über eine Fotomaske belichtet. Dann erfolgt eine Entwicklung des latenten Bildes, wobei die belichteten Bereiche des Fotolacks entfernt werden. Alternativ kann der Verfahrensschritt der Fotolithografie auch so ausgeführt werden, dass die belichteten Bereiche des Fotolacks nach dem Entwickeln bestehen bleiben.
• - Galvanisches Verstärken oder Elektroplattieren der Kontaktstruktur. Dieser Verfahrensschritt ist notwendig, da die Stromtragfähigkeit des Seedlayers auf Grund seiner geringen Dicke zu gering wäre. Dabei erfolgt eine kontinuierliche elektrochemische Abscheidung von metallischen Niederschlägen auf dem Seedlayer, in den Bereichen, in denen beim Entwickeln der Fotolack entfernt wurde. Beim Elektroplattieren sind Dicken der Metallisierung bis zu etwa 50 µm erreichbar. Besonders vorteilhaft sind Dicken zwischen 15 µm und 30 µm. Als Metallisierungsmaterial wird vorzugsweise Kupfer verwendet.
• - Entfernen des Fotolackes,
• - Wegätzen des Seedlayers, der nicht von der galvanischen Verstärkung bedeckt ist. Dieser Schritt beugt einem Kurzschluss vor.

When using photo technology, a surface metallization known as a seed layer, also known as a germ layer, is first applied to the frame, the contact surface and the radiating surface, including the contact, preferably by sputtering. Seed layer thicknesses of around 2 µm to 3 µm are preferably achieved. A layer sequence of titanium and copper is preferably used as the material for the seed layer. The titanium and the copper are preferably sputtered on in one step, with the titanium serving as an adhesion promoter. Applying the contact structure to the frame, the contact surface and the contact of the radiating surface involves the following process steps:

• - Photolithography:
  • Applying photoresist by spin coating to the sputtered seed layer. The photoresist is then dried. The photoresist is then exposed via a photomask. The latent image is then developed, removing the exposed areas of the photoresist. Alternatively, the photolithography process step can also be carried out in such a way that the exposed areas of the photoresist remain after development.
• - Galvanic reinforcement or electroplating of the contact structure. This process step is necessary because the current-carrying capacity of the seed layer would be too low due to its small thickness. This involves a continuous electrochemical deposition of metallic deposits on the seed layer in the areas where the photoresist was removed during development. With electroplating, metallization thicknesses of up to around 50 µm can be achieved. Thicknesses between 15 µm and 30 µm are particularly advantageous. Copper is preferably used as the metallization material.
• - removing the photoresist,
• - Etching away the seed layer that is not covered by the galvanic reinforcement. This step prevents a short circuit.

The manufacturing process for an optoelectronic module is particularly advantageous for a large number of semiconductor chips, since the large number of semiconductor chips encapsulated in the so-called "artificial wafer" can be contacted simultaneously. This reduces the complexity of the contacting.

In a preferred embodiment, the step of applying the frame made of potting compound is preceded by a step of applying at least one electrical feedthrough to the adhesive film. This step is absolutely necessary for serial connection of several semiconductor chips.

• - Formpressen (engl. Compression Molding) der Vergussmasse, die den Halbleiterchip und/oder die elektrische Durchführung zumindest bereichsweise umschließt;
• - Aushärten der Vergussmasse;
• - Rückschleifen der ausgehärteten Vergussmasse, derart, dass die Kontaktfläche und/oder die der Klebefolie gegenüber liegende Fläche der elektrischen Durchführung im Wesentlichen von Vergussmasse befreit wird. Diese Ausführungsform ist besonders vorteilhaft, da durch den Schritt des Rückschleifens die Halbleiterchips und die elektrischen Durchführungen auf eine einheitliche Höhe gebracht werden können. Dies reduziert die notwendige Genauigkeit bei der Bestückung der Klebefolie mit Halbleiterchips und elektrischen Durchführungen.

In a preferred embodiment, the step of applying the frame made of potting compound comprises the following sub-steps:

• - compression molding of the potting compound, which encloses the semiconductor chip and/or the electrical feedthrough at least in part;
• - Curing of the casting compound;
• - Grinding back the hardened potting compound in such a way that the contact surface and/or the surface of the electrical feedthrough opposite the adhesive film is essentially freed of potting compound. This embodiment is particularly advantageous because the grinding back step allows the semiconductor chips and the electrical feedthroughs to be brought to a uniform height. This reduces the necessary accuracy when equipping the adhesive film with semiconductor chips and electrical feedthroughs.

• - Aufbringen einer Deckfolie, insbesondere aus Teflon, auf die Kontaktfläche und/oder auf die der Klebefolie gegenüber liegende Fläche der elektrischen Durchführung;
• - Spritzgießen der Vergussmasse in einen Zwischenraum zwischen Deckfolie und Klebefolie, derart dass der Halbleiterchip und/oder die elektrische Durchführung an den Seiten, die nicht von der Klebefolie und nicht von der Deckfolie bedeckt sind, im Wesentlichen von Vergussmasse umschlossen werden;
• - Aushärten der Vergussmasse;
• - Entfernen der Deckfolie.

In an alternative preferred embodiment, the step of applying the frame made of potting compound comprises the following sub-steps:

• - applying a cover film, in particular made of Teflon, to the contact surface and/or to the surface of the electrical feedthrough opposite the adhesive film;
• - Injection molding of the potting compound into a gap between the cover film and the adhesive film, such that the semiconductor chip and/or the electrical feedthrough are on the sides that are not covered by the adhesive film and not covered by the film are essentially enclosed by potting compound;
• - Curing of the casting compound;
• - Remove the cover foil.

This alternative embodiment is particularly advantageous because both the contact surface and the radiating surface of the semiconductor chip remain free of potting compound during potting. The grinding back step can therefore be omitted. This embodiment is also called "film assisted molding" and is a special case of injection molding.

• - Aufbringen einer elektrisch isolierenden, insbesondere dielektrischen, Schicht;
• - Aufbringen einer, insbesondere metallischen, Wärmesenke. Diese Ausführungsform ist besonders vorteilhaft, da die Wärmespreizung eine verbesserte Wärmeabfuhr von den Halbleiterchips an die Umgebungsluft ermöglicht.

In a preferred embodiment, the step of applying the first contact structure is followed by the following sub-steps:

• - applying an electrically insulating, in particular dielectric, layer;
• - Applying a heat sink, in particular a metallic one. This embodiment is particularly advantageous because the heat spreading enables improved heat dissipation from the semiconductor chips to the ambient air.

In a preferred embodiment, the step of applying the second contact structure is followed by the step of applying a mixing element. This step is advantageous because only the mixing element enables the spatial mixing of the electromagnetic radiation emitted by the semiconductor chips.

SHORT DESCRIPTION OF THE DRAWINGS

• 1a zeigt ein erstes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht;
• 1b zeigt das erfindungsgemäße optoelektronische Modul aus 1a in Draufsicht;
• 2 zeigt einen ersten Halbleiterchip in Schnittansicht;
• 3 zeigt einen zweiten Halbleiterchip in Schnittansicht;
• 4a zeigt ein zweites Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht;
• 4b zeigt das erfindungsgemäße optoelektronische Modul aus 4a in Draufsicht;
• 5 zeigt die Schritte des Herstellungsverfahrens;
• 6 zeigt das Zwischenprodukt nach Ausführung des Schritts S1 des Herstellungsverfahrens in Schnittansicht;
• 7 zeigt das alternative Zwischenprodukt nach Ausführung des Schritts S1 des Herstellungsverfahrens in Schnittansicht;
• 8 zeigt die Anordnung bei der Ausführung des Schritts S2A des Herstellungsverfahrens in Schnittansicht;
• 9 zeigt die Anordnung bei der Ausführung des zu S2A alternativen Schritts S2B des Herstellungsverfahrens in Schnittansicht;
• 10 zeigt das Zwischenprodukt nach Ausführung des Schritts S2A oder S2B des Herstellungsverfahrens in Schnittansicht;
• 11 zeigt das Zwischenprodukt nach Ausführung des Schritts S3 des Herstellungsverfahrens in Schnittansicht;
• 12 zeigt das Zwischenprodukt nach Ausführung des optionalen Schritts S4 des Herstellungsverfahrens in Schnittansicht;
• 13 zeigt das Zwischenprodukt nach Ausführung des Schritts S5 des Herstellungsverfahrens in Schnittansicht;
• 14 zeigt das alternative Zwischenprodukt nach Ausführung des Schritts S5 des Herstellungsverfahrens in Schnittansicht;
• 15a zeigt ein drittes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des Schritts S6 des Herstellungsverfahrens;
• 15b zeigt das erfindungsgemäße optoelektronische Modul aus 15a in Draufsicht;
• 16a zeigt ein viertes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des Schritts S6 des Herstellungsverfahrens;
• 16b zeigt das erfindungsgemäße optoelektronische Modul aus 16a in Draufsicht;
• 17 zeigt ein fünftes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des optionalen Schritts S7 des Herstellungsverfahrens;
• 18 zeigt ein sechstes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des optionalen Schritts S7 des Herstellungsverfahrens;
• 19 zeigt ein siebtes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des optionalen Schritts S7 des Herstellungsverfahrens;
• 20 zeigt ein Ersatzschaltbild für seriell verschaltet Halbleiterchips;
• 21 zeigt ein achtes Ausführungsbeispiel eines erfindungsgemäßen optoelektronischen Moduls in Schnittansicht nach Ausführung des Schritts S6 des Herstellungsverfahrens;
• 22 zeigt ein Ersatzschaltbild für parallel verschaltet Halbleiterchips.

Various embodiments are explained in more detail below with reference to the drawings. Elements that are the same, similar or have the same effect are provided with the same reference symbols in the figures. The figures and the proportions of the elements shown in the figures to one another are not to be regarded as being to scale. Rather, individual elements may be shown exaggeratedly large or reduced in size for better representation and understanding.

• 1a shows a first embodiment of an optoelectronic module according to the invention in sectional view;
• 1b shows the optoelectronic module according to the invention 1a in plan view;
• 2 shows a first semiconductor chip in sectional view;
• 3 shows a second semiconductor chip in sectional view;
• 4a shows a second embodiment of an optoelectronic module according to the invention in sectional view;
• 4b shows the optoelectronic module according to the invention 4a in plan view;
• 5 shows the steps of the manufacturing process;
• 6 shows the intermediate product after execution of step S1 of the manufacturing process in sectional view;
• 7 shows the alternative intermediate product after execution of step S1 of the manufacturing process in sectional view;
• 8 shows the arrangement during execution of step S2A of the manufacturing process in sectional view;
• 9 shows the arrangement during execution of step S2B of the manufacturing process, which is an alternative to S2A, in sectional view;
• 10 shows the intermediate product after execution of step S2A or S2B of the manufacturing process in sectional view;
• 11 shows the intermediate product after execution of step S3 of the manufacturing process in sectional view;
• 12 shows the intermediate product after execution of the optional step S4 of the manufacturing process in sectional view;
• 13 shows the intermediate product after execution of step S5 of the manufacturing process in sectional view;
• 14 shows the alternative intermediate product after execution of step S5 of the manufacturing process in sectional view;
• 15a shows a third embodiment of an optoelectronic module according to the invention in a sectional view after execution of step S6 of the manufacturing method;
• 15b shows the optoelectronic module according to the invention 15a in plan view;
• 16a shows a fourth embodiment of an optoelectronic module according to the invention in a sectional view after execution of step S6 of the manufacturing method;
• 16b shows the optoelectronic module according to the invention 16a in plan view;
• 17 shows a fifth embodiment of an optoelectronic module according to the invention in a sectional view after execution of the optional step S7 of the manufacturing method;
• 18 shows a sixth embodiment of an optoelectronic module according to the invention in a sectional view after execution of the optional step S7 of the manufacturing method;
• 19 shows a seventh embodiment of an optoelectronic module according to the invention in a sectional view after execution of the optional step S7 of the manufacturing method;
• 20 shows an equivalent circuit diagram for serially connected semiconductor chips;
• 21 shows an eighth embodiment of an optoelectronic module according to the invention in a sectional view after execution of step S6 of the manufacturing method;
• 22 shows an equivalent circuit diagram for semiconductor chips connected in parallel.

EXAMPLES OF IMPLEMENTATION

1a shows a first embodiment of an optoelectronic module 202 according to the invention in a sectional view. This module 202 has a semiconductor chip 104 for emitting electromagnetic radiation 118. The semiconductor chip 104 has a plurality of epitaxial layers (not shown in 1a shown; see 2 and 3 ). The semiconductor chip has a radiation surface 108, which is defined as the surface of the epitaxial layers at which the electromagnetic radiation 118 exits the semiconductor chip 104. The radiation surface 108 has a coupling-out structure (shown as a wavy line) which increases the coupling-out efficiency of the electromagnetic radiation 118 from the semiconductor chip 104 via the radiation surface 108. A first contact, which is designed as a transparent contact layer 110, is arranged on the radiation surface 108. Transparent in this case means that electromagnetic radiation from the visible spectral range passes through the contact layer 110 without significant absorption losses. The transparent contact layer 110 covers the entire surface of the radiation surface 108. In an alternative embodiment not shown, the transparent contact layer 110 can only cover the radiation surface 108 in some areas. A contact surface 106 of the semiconductor chip 104 is located opposite the radiating surface 108. The contact surface 106 serves as a second electrical contact of the semiconductor chip 104. A frame 103 made of potting compound 102 completely surrounds the semiconductor chip 104 on the side. The potting compound 102 is essentially flush with the surface of the transparent contact layer 110 facing away from the semiconductor chip 104 and with the contact layer 106. The radiating surface 108, more precisely the transparent contact layer 110, and the contact surface 106 are free of potting compound 102. The flush closure of the potting compound 102 is advantageous because stable contact structures can be applied particularly easily to such flat structures. In an embodiment not shown in the figures, the potting compound 102 only partially surrounds the side surfaces of the semiconductor chip 104. A step can also be formed at the boundary between contact surface 106 and potting compound 102 and/or at the boundary between transparent contact layer 110 and potting compound 102.

In 1a A first contact structure 114 is arranged at least in regions on the frame 103 and at least in regions on the contact surface 106. The first contact structure 114 serves to electrically contact a layer of a first conductivity (not in 1a shown; see 2 and 3 ) of the semiconductor chip 104. A second contact structure 116 is arranged flat on the frame 103 and in some areas on the transparent contact layer 110. The second contact structure 116 serves for electrically contacting a layer of a second conductivity (not in 1a shown; see 2 and 3 ) of the semiconductor chip 104. The second contact structure 116 has an overlap region 112 over the edge of the transparent contact layer 110 of, for example, 5 µm. Due to the overlap region 112, the second contact structure 116 is in mechanical and electrical contact with the transparent contact layer 110, which completely covers the radiating surface 108. An overlap region of only a few µm is advantageous, since only a small part of the radiating surface 108 and the transparent contact layer 110 is shaded. Therefore, even with small semiconductor chips 104 with edge lengths of, for example, only 50 µm, a high coupling-out efficiency for the electromagnetic radiation 118 from the semiconductor chip 104 can be achieved. The transparent contact layer 110 has, for example, indium tin oxide (ITO) or zinc oxide.

The first contact structure 114 is applied to the side of the frame 103 that borders the contact surface 106. The second contact structure 116 is applied to the side of the frame 103 that borders the radiating surface 108 and the transparent contact layer 110.

• - Silikon
• - Epoxydharz
• - Hybridmaterialien.

The potting compound 102 has at least one of the following materials as host material:

• - Silicone
• - Epoxy resin
• - Hybrid materials.

• - Titandioxid (TiO₂),
• - Aluminiumoxid (Al₂O₃),
• - Zirkoniumoxid (ZrO),
• - Bariumdifluorid (BaF₂)
• - Siliziumdioxid (SiO₂)
• - Ruß.

Particles comprising at least one of the following materials may be dispersed in the potting compound 102:

• - titanium dioxide (TiO ₂ ),
• - aluminum oxide (Al ₂ O ₃ ),
• - Zirconium oxide (ZrO),
• - Barium difluoride (BaF ₂ )
• - Silicon dioxide (SiO ₂ )
• - Soot.

The particles are not in 1a shown.

1b shows the optoelectronic module according to the invention 1a in plan view. The second contact structure 116 encloses the transparent contact layer 110 on all four sides. This enables a uniform current supply to the semiconductor chip 104 via the contact layer 110. The second contact structure 116 has an overlap region 112 with the transparent contact layer 110 on all four sides of the transparent contact layer 110. The second contact structure 116 has a width that is greater than the width of the transparent contact layer 110. In an embodiment not shown, the second contact structure 116 can only contact one, two or three sides of the transparent contact layer 110. In particular for small semiconductor chips 104, essentially with edge lengths less than 200 µm, this can be sufficient for the current supply.

2 shows a first semiconductor chip 104 in a sectional view. The semiconductor chip 104 has an electrically conductive substrate 121, which terminates at a base area with a contact area 106. The substrate 121 can comprise germanium or silicon, for example. The substrate 121 serves as a contacting and fastening means for subsequent epitaxial layers of the semiconductor chip 104 and is considered part of the semiconductor chip 104 in the present application. A layer of a first conductivity 120, in particular a p-conductivity, is arranged downstream of the substrate 121. An active zone 122 is arranged downstream of the layer of a first conductivity. A layer of a second conductivity 124, in particular an n-conductivity, is arranged downstream of the active zone 122. Alternatively, the layer of a first conductivity 120 can be n-conductive and the layer of a second conductivity 124 can be p-conductive. The layer of a first conductivity 120, the active zone 122 and the layer of a second conductivity 124 are grown epitaxially on top of each other.

The electromagnetic radiation 118 leaves the semiconductor chip 104 via the emitting surface 108. The emitting surface 108 has a coupling-out structure which is 2 is shown as a wavy line. The coupling-out structure can, for example, have a pyramid structure, which is not shown in detail for the sake of clarity. 2 is shown. The radiating surface 108 is completely covered with an electrically conductive, transparent contact layer 110, for example made of indium tin oxide (ITO). After exiting the radiating surface 108, the electromagnetic radiation 118 passes through the transparent contact layer 110. The absorption of the electromagnetic radiation 118 in the transparent contact layer 110 is sufficiently low if a suitable material is selected. The transparent contact layer 110 is not considered to be a component of the semiconductor chip 104 in the present application.

3 shows a second semiconductor chip 104 in sectional view. The semiconductor chip 104 in 3 essentially corresponds to the semiconductor chip in 2 , except: A contact pad 117 is applied directly to the radiating surface 108 of the semiconductor chip 104. The contact pad 117 is not considered to be a component of the semiconductor chip 104 in the present application. The contact pad 117 comprises an electrically conductive metal or a metallic alloy. The contact pad 117 has the same function as the transparent contact layer 110 made of 2 , i.e. the current supply to the layer of a second conductivity 124. The contact pad 117 covers, for example, less than 30%, preferably less than 15% of the radiating surface 108.

The edge length of the radiating surface 108 of the semiconductor chip 104 in 2 and 3 can be between about 50µm and about 1000µm.

The smaller the semiconductor chip 104, the smaller the contact pad 117 on the radiating surface 108 should be in order to minimize the shadowing of the electromagnetic radiation 118 by the contact pad 117.

In the 2 and 3 The electromagnetic radiation 118 is generated in the active zone 122 shown. The active zone 122 can be a pn junction, a double heterostructure, a multiple quantum well structure (MQW) or a single quantum well structure (SQW). Quantum well structure means: quantum wells (3-dim), quantum wires (2-dim) and quantum dots (1-dim).

The semiconductor chip 104, more precisely the epitaxially grown layer stack with the layer of a first conductivity 120, the active zone 122 and the layer of a second conductivity 124, can be based on a III-V compound semiconductor material. III-V compound semiconductor materials are advantageous because high internal quantum efficiencies can be achieved when generating radiation.

The semiconductor chip 104 comprises, for example, aluminum indium gallium nitride (Al _x In _y Ga _1-xy N) Here, 0≤x≤1, 0≤y≤1 and x+y≤1 apply, in particular with x≠1, y≠1, x≠0 and/or y≠0. This semiconductor chip 104 can emit electromagnetic radiation 118 from the ultraviolet spectral range through the blue spectral range to the green spectral range.

The semiconductor chip 104 comprises, for example, aluminum indium gallium phosphide (Al _x In _y Ga _1-xy P). Here, 0≤x≤1, 0≤y≤1 and x+y≤1, in particular with x≠1, y≠1, x≠0 and/or y≠0. This semiconductor chip 104 can emit electromagnetic radiation 118 from the red spectral range to the yellow spectral range.

For example, the semiconductor chip 104 can be designed as a surface emitter, in particular as a so-called thin-film chip. The use of a surface emitter is particularly advantageous because its light can be coupled particularly efficiently into downstream optical elements, such as mixing elements. The thin-film chip is known, for example, from the published patent application WO2005081319A1 known, the disclosure of which is hereby incorporated by reference into the disclosure of the present application.

4a shows a second embodiment of an optoelectronic module 204 according to the invention in a sectional view. The embodiment in 4a differs from the embodiment in 1a only by the type of contacting of the layer of a second conductivity (not in 4a shown).In all other respects, the statements regarding the first embodiment in 1a Instead of the transparent contact layer 110 in 1a is in 4a A contact pad 117 is applied to the radiating surface 108. The contact pad 117 is electrically contacted by a second contact structure in the form of a planar contact layer 138. The term planar contact layer 138 is used here to distinguish it from conventional wire bonding. In contrast to a bonding wire, the planar contact layer 138 has a flat shape.

4b shows the optoelectronic module 204 according to the invention from 4a in plan view. The contact pad 117 is applied directly to the radiating surface 108. The contact pad 117 is electrically contacted via the planar contact layer 138. The planar contact layer 138 has the same function in the present embodiment as the second contact structure 116 in the embodiment of 1b The planar contact layer 138 can have the shape of an elongated strip. The planar contact layer 138 has an extension (width) perpendicular to its main extension direction of 5 µm to 150 µm, preferably 10 µm to 50 µm. The width of the planar contact layer 138 to be selected depends on the size of the contact pad 117 that is to be contacted and on the necessary current carrying capacity. The planar contact layer 138 can, for example, have a thickness of 5 µm to 60 µm, preferably 15 µm to 25 µm.

5 shows steps S1 to S7 of the method for producing an optoelectronic module.

In step S1, at least one semiconductor chip 104 for emitting electromagnetic radiation 118 is applied to an adhesive film 132. The semiconductor chip 104 has a radiation surface 108 and a contact surface 106 opposite the radiation surface 108. A transparent contact layer 110 is applied to the radiation surface 108 in the radiation direction. During application, the radiation surface 108 of the semiconductor chip 104 and thus also the transparent contact layer 110 face the adhesive film 132. At least one electrical feedthrough 130, for example made of copper or silicon, is applied to the adhesive film 132. In an embodiment not shown, the electrical feedthroughs 130 can be dispensed with.

In 6 the intermediate product 302 is shown after execution of step S1. The transparent contact layers 110 arranged downstream of the two semiconductor chips 104 in the direction of radiation adhere with their flat surfaces directly to the adhesive film 132. As a result, the two semiconductor chips 104 are mechanically fixed to the adhesive film 132 for the subsequent steps of the manufacturing process. Likewise, two electrical feedthroughs 130 are arranged on the adhesive film 132. In embodiments not shown, the intermediate product of step S1 has a single semiconductor chip 104 or a plurality of semiconductor chips 104. In embodiments not shown, the intermediate product of step S1 has no, one or a plurality of electrical feedthroughs 130.

In 7 is that too 6 alternative intermediate product 304 after execution of step S1. Two semiconductor chips 104 and two electrical feedthroughs 130 are fixed on the adhesive film 132. The radiating surfaces 108 and the contact pads 117 are in direct contact with the adhesive film 132. In embodiments not shown, the intermediate product of step S1 has a single semiconductor chip 104 or a plurality of semiconductor chips 104. In embodiments not shown, the intermediate product of step S1 has no, one or a plurality of electrical feedthroughs 130.

In step S1, the semiconductor chips 104 and the electrical feedthroughs 130 are simply placed on the adhesive film 132. No separate gluing or soldering of the semiconductor chips 104 and the electrical feedthroughs 130 onto a carrier is necessary.

In step S2, a frame 103 made of potting compound 102 is applied to the exposed areas of the adhesive film 132 in such a way that the semiconductor chips 104 are laterally surrounded at least in some areas by potting compound 102. The contact surfaces 106 and the radiating surfaces 108 or the transparent contact layers 110 of the semiconductor chips 104 are essentially freed of potting compound 102. Step S2 can be carried out using two different methods S2A or S2B and leads to the same intermediate product 310.

In variant S2A, the potting compound 102, which at least partially encloses the semiconductor chips 104 and/or the electrical feedthroughs 130, is compression-molded. In 8 the arrangement is shown in a sectional view when step S2A is carried out. This arrangement is referred to as intermediate product 306. The compression molding step is illustrated. The base of the mold 140 encloses the adhesive film 132, to which the two semiconductor chips 104 and the two electrical feedthroughs 130 are glued. The cover of the mold 142 forms a cavity with the base 140, which is filled with potting compound 102, for example with silicone. The potting compound 102 completely encloses the areas of the semiconductor chips 104 and the electrical feedthroughs 130 that are not covered by the adhesive film 132. After the pressing step, the potting compound 102 is cured. Curing can take place through the action of thermal energy or through the irradiation of electromagnetic radiation, in particular from the UV range. The hardened potting compound 102 is then ground back in such a way that the contact surfaces 106 of the two semiconductor chips 104 and the surfaces of the two electrical feedthroughs 130 opposite the adhesive film 132 are essentially freed of potting compound 102.

In variant S2B, the potting compound 102 is introduced by injection molding. 9 shows the arrangement when carrying out the alternative step S2B in a sectional view. This arrangement is referred to as intermediate product 308. The injection molding step is illustrated. The adhesive film 132 with the two semiconductor chips 104 and the two electrical feedthroughs 130 is arranged on a carrier 144 of a mold. A cover film 146, for example made of Teflon, is then applied to the contact surface 106 of the two semiconductor chips 104 and to the surfaces of the two electrical feedthroughs 130 opposite the adhesive film 132. Potting compound 102 is then injected into the space between the cover film 146 and the adhesive film 132 such that the semiconductor chips 104 and the electrical feedthroughs 130 are completely enclosed by potting compound 102 on the sides that are not covered by the adhesive film 132 and the cover film 146. The potting compound 102 is then cured. Finally, the cover film 146 is removed. This special case of injection molding is also called film assisted molding.

The adhesive film 132 is, for example, a plastic film that is adhesive on both sides. The side of the adhesive film 132 to which the semiconductor chips 104 and the electrical feedthroughs 130 are applied remains adhesive at all temperatures. The side of the adhesive film 132 that faces the metal carrier 140, 144 of the molding tool loses its adhesive force above a certain temperature (thermo release). The adhesive film 132 therefore separates itself from the carrier 140, 144 of the molding tool above a certain temperature.

10 shows the intermediate product 310 after execution of step S2A or S2B in a sectional view. The two semiconductor chips 104 and the two electrical feedthroughs 130 are completely surrounded on their side surfaces by hardened potting compound 102. The hardened potting compound 102 forms a frame 103 around the two semiconductor chips 104 and around the two electrical feedthroughs 130. The frame 103 is flush with the contact surfaces 106 of the semiconductor chips 104 and with the surfaces of the electrical feedthroughs 130 that are opposite the adhesive film 132. In an intermediate product not shown, a step can be formed between the frame 103 and the contact surfaces 106 and/or between the frame 103 and the surfaces of the electrical feedthroughs 130 that are opposite the adhesive film. The contact surfaces 106 of the semiconductor chips 104 and the surfaces of the electrical feedthroughs opposite the adhesive film 132 are completely freed of potting compound 102. The intermediate product 310 results regardless of whether the method step S2 was carried out according to variant S2A or variant S2B.

In step S3, a first contact structure 114 is applied to the surface of the frame 103 opposite the adhesive film 132, to the contact surfaces 106 of the semiconductor chips 104 and to the surfaces of the electrical ical feedthroughs 130. The first contact structure 114 can be applied, for example, by photolithography, screen printing or jetting. The contact structure 114 comprises, for example, a metal such as copper or a metallic alloy. 11 shows the intermediate product 312 after execution of step S3 in a sectional view. The first contact structure 114 connects the contact surface 106 of a semiconductor chip 104 to an electrical feedthrough 130.

In the optional step S4, an electrically insulating, in particular dielectric, layer 134 is applied to the first contact structure 114 and to the areas of the side of the frame 103 made of potting compound 102 that are not covered by the first contact structure 114 and that are opposite the adhesive film 132. A heat sink 136, in particular a metallic one, is then applied to the electrically insulating layer 134. 12 shows the intermediate product 314 after executing the optional step S4.

In 8 , 9 , 10 , 11 and 12 only semiconductor chips 104 are shown which have a transparent contact layer 110 as a contact on the radiating surface 108. However, the manufacturing process is identical if a contact pad 117 is applied as a contact on the radiating surface 108 instead of the transparent contact layer 110.

In step S5, the adhesive film 132 is removed. For example, the adhesive film 132 can be removed by simply peeling it off. 13 and 14 show the intermediate product 316 and 318 after execution of step S5 in sectional view. In 13 semiconductor chips 104 are shown, the radiating surface 108 of which is completely covered with the transparent contact layer 110. The transparent contact layer 110 is completely free of potting compound 102. In 14 semiconductor chips 104 are shown in which the contact pad 117 is applied directly to the radiating surface 108. The contact pad 117 and the radiating surface 108 are completely free of potting compound 102. In addition, 13 and 14 electrical feedthroughs 130 whose surfaces opposite the first contact structure 114 are completely free of potting compound 102. As a result, the semiconductor chips 104 and the electrical feedthroughs 130 are designed for the application of a second contact structure 116.

In step S6, a second contact structure 116, 118 is applied to the frame 103 made of potting compound 102, to the contacts 110, 117 on the radiating surface 108 for electrically contacting a layer of a second conductivity (not shown in 15a) of the semiconductor chips 104 and to the electrical feedthroughs 130. The second contact structure 116 can comprise, for example, a metal such as copper or a metallic alloy. The second contact structure 116 can be applied, for example, by photolithography, screen printing or jetting.

The final product 206 after execution of step S6 is in the 15a and 15b shown. 15a shows a third embodiment of an optoelectronic module 206 according to the invention in a sectional view. 15b shows the optoelectronic module 206 according to the invention from 15a in plan view. The optoelectronic module 206 has two semiconductor chips 104, each with a transparent contact layer 110. The electrical feedthroughs 130 each electrically connect the first contact structure 114 of a first semiconductor chip 104 to the second contact structure 116 of an adjacent semiconductor chip 104. The second contact structure 116 is in electrical contact with the transparent contact layer 110 and supplies it with current from all four sides (see 15b) The second contact layer 116 is applied flatly to the frame 103 and has an overlap area 112 of, for example, 5 µm with the transparent contact layer 110. The two semiconductor chips 104 are connected to one another in series. The electrical feedthroughs 130 are absolutely necessary for this. An electrically insulating insulation layer 134 is applied to the side of the frame 103 that borders the contact surface 106. A heat sink 136, in particular a metallic one, is applied to the insulation layer 134.

The optoelectronic module 208 alternative to the optoelectronic module 206 as the end product of step S6 is shown in the 16a and 16b shown. 16a shows a fourth embodiment of an optoelectronic module 208 according to the invention in a sectional view. 16b shows the optoelectronic module 208 according to the invention from 16a in plan view. The first contact structure 114, the arrangement of the insulation layer 134 and the heat sink 136 of the optoelectronic module 208 are identical to the optoelectronic module 206. The two semiconductor chips 104 in 16a and 16b are connected in series. The second contact structure is designed as a planar contact layer 138, which connects the electrical feedthroughs 130 in an electrically conductive manner to the contact pads 117 on the radiating surfaces 108 of the two semiconductor chips 104. The properties and dimensions of the planar contact structure 138 and the contact pad 117 are described, for example, in 4a and 4b described.

In the optional step S7, a mixing element 154 is applied to the 15a The mixing element serves for the spatial and spectral mixing of the electromagnetic radiation 118 emitted by the semiconductor chips 104. 17 shows a fifth out embodiment of an optoelectronic module 210 according to the invention in a sectional view after carrying out the optional step S7 of the manufacturing method. The heat sink 136, the electrically insulating layer 134, the first contact structure 114, the frame 103, the two semiconductor chips 104 with the associated radiating surfaces 108 and the transparent contact layers 110 applied to the radiating surfaces 108 as well as the second contact structure 116 are identical to the embodiment in 15a . The semiconductor chips 104 are as in the embodiment of 15a connected in series. In contrast to the optoelectronic module 206 in the 15a and 15b A mixing element 154 is provided in the optoelectronic module 210. The mixing element 154 is arranged downstream of the semiconductor chips 104 in the direction of radiation. The thickness 155 of the mixing element 154 essentially corresponds to the distance 159 between adjacent semiconductor chips 104. The thickness 155 can, for example, have values between 1 mm and 10 mm, preferably between 3 mm and 6 mm, particularly preferably 4 mm. The mixing element 154 can, for example, have glass (SiO ₂ ) or polymethyl methacrylate (PMMA). For example, an output coupling layer 156 can be arranged on the surface of the mixing element 154 facing away from the frame 103. The output coupling layer 156 can be implemented as a roughening of the surface of the mixing element 154. The output coupling layer 156 is advantageous because more light can leave the mixing element 154. The roughening of the mixing element 154 can be produced during the production of the mixing element 154 or subsequently. The roughening can, for example, have a pyramid structure. The pyramids can, for example, be represented by a sputtering process in the surface of the mixing element 154. The size of the coupling-out structures is in the range of one or more wavelengths of the light emitted by the semiconductor chips 104, for example between 50 nm and 5 µm, in particular between 100 nm and 1 µm. The following elements are arranged between the unit consisting of frame 103, semiconductor chips 104 and electrical feedthroughs 130 and the mixing element 154. Transparent refractive index adaptation elements 157, in particular made of silicone, are provided on the radiating surfaces 108, more precisely on the transparent contact layers 110. The value of the refractive index of the transparent refractive index adjustment elements 157 lies between the value of the refractive index of the semiconductor chips 104 and the value of the refractive index of the mixing element 154. The refractive index of glass is approximately 1.4 for light in the visible spectral range. The refractive index of PMMA is approximately 1.49. The refractive index for an InGaN semiconductor chip is approximately 2.4. The refractive index for an InGaAlP semiconductor chip is approximately 3.5. Preferably, high-index HRI silicon with a refractive index of approximately 1.6 is used for the refractive index adjustment elements 157.

A structured mirror layer 152 or alternatively a structured scattering layer 153 is arranged downstream of the frame 103. The structured mirror layer 152 can be, for example, a metallic mirror layer, in particular made of silver. The structured scattering layer 153 can, for example, comprise silicone, into which scattering particles (not in 17 shown).

The structured mirror layer 152 or scattering layer 153 is connected to the frame 103 via a connecting medium 150, for example. The connecting medium 150 can be silicone adhesive, for example. The connecting medium 150 and the refractive index adjustment element 157 can be made of the same material, for example.

A transparent refractive index adjustment element 157 fills the entire cavity formed by the planar surface of the transparent contact layer 110, the second contact structure 116, the structured scattering layer 153 or the structured mirror layer 152 and the mixing element 154.

18 shows a sixth embodiment of an optoelectronic module 212 according to the invention in a sectional view after carrying out the optional step S7 of the manufacturing method. The optoelectronic module 212 differs from the optoelectronic module 210 from 17 that conversion elements 158 are introduced into the mixing element 154. The conversion elements 158 are arranged downstream of the transparent refractive index adjustment elements 157 and the semiconductor chips 104 in the direction of emission. The conversion elements 158 can comprise, for example, silicone in which phosphor particles, for example made of yttrium aluminum garnet (YAG), are embedded. The cavities in the mixing element that accommodate the conversion elements 158 can be produced by molding a master or by hot stamping.

19 shows a seventh embodiment of an optoelectronic module 214 according to the invention in a sectional view after carrying out the optional step S7 of the manufacturing method. The optoelectronic module 214 essentially corresponds to the optoelectronic module 212. Only the conversion elements 158 are arranged differently. The conversion elements 158 are arranged in the recesses of the structured mirror layer 152 or the structured scattering layer 153. In other words, the conversion elements fill elements 158 a large part of the text to 18 defined cavity. In other words, the conversion elements 158 are arranged between the mixing element 154 and the refractive index adjustment elements 157.

20 shows an equivalent circuit diagram 402 for, for example, five serially connected semiconductor chips 104. The semiconductor chips 104 are powered by a first 410 and a second 412 external connection.

21 shows an eighth embodiment of an optoelectronic module 216 according to the invention in a sectional view after execution of step S6 of the manufacturing method. The two semiconductor chips 104 are connected in parallel to one another via a first contact structure 114 and a second contact structure 116. Transparent contact layers 110 are shown as examples as contacts on the radiating surface 108. In an embodiment not shown, metal contact pads 117 with the same function can be used as contacts on the radiating surface 108. No electrical feedthroughs 130 are necessary. Optionally, in a step S7, a mixing element 154 can be arranged downstream of the semiconductor chips 104 in the direction of radiation. Such an optoelectronic module with parallel-connected semiconductor chips 104 is not shown in the figures, since apart from the parallel connection of the semiconductor chips 104, the standard for optoelectronic modules (e.g. 17 , 18 and 19 ) with serially connected semiconductor chips 104 What has been said applies.

22 shows an equivalent circuit diagram 404 for, for example, five semiconductor chips 104 connected in parallel. The semiconductor chips are powered by a first 410 and a second 412 external connection.

In the optoelectronic modules 210, 212, 214 and 216, the semiconductor chips 104 are each contacted via a transparent contact layer 110 on the emitting surface 108. Alternatively, the semiconductor chips 104 can be contacted via a contact pad 117 on the emitting surface 108. Since optoelectronic modules that have semiconductor chips 104 with a contact pad 117 otherwise correspond to the optoelectronic modules with a transparent contact layer 110, further embodiments with semiconductor chips 104 with a contact pad 117 were omitted.

list of reference symbols

102

potting compound

103

frame made of casting compound 102

104

semiconductor chip

105

epitaxial layer sequence

106

contact surface

108

radiating surface

110

transparent contact layer

112

Overlap area of the second contact structure 116

114

first contact structure

116

second contact structure

117

contact pad on radiating surface 108

118

electromagnetic radiation

119

contact pad on the current spreading layer

120

layer of a first conductivity (e.g. p-conductivity)

121

electrically conductive substrate

122

active zone

123

electrically conductive material

124

layer of a second conductivity (e.g. n-conductivity)

125

passivation

127

current spreading layer

128

contact breakdown

130

electrical feedthrough

132

adhesive film

134

electrically insulating layer

136

heat sink

138

planar contact layer (CPHF) as second contact structure 116

140

base of the mold

142

lid of the mold

144

carrier of the mold

146

cover foil

150

connecting medium

152

structured mirror layer

153

structured scattering layer

154

mixing element

155

thickness of the mixing element 154

156

output layer

157

refractive index adjustment element

158

conversion element

159

distance between adjacent semiconductor chips 104

202 to 216

optoelectronic module

302 to 318

intermediates of the manufacturing process

402 and 404

equivalent circuit diagram

410

first, external electrical connection

412

second, external electrical connection

Claims (14)

Optoelectronic module (202, 204, 206, 208, 210, 212, 214, 216) with: - at least one semiconductor chip (104) for emitting electromagnetic radiation (118), which has a layer of a first conductivity (120), in particular a p-conductivity, a layer of a second conductivity (124), in particular an n-conductivity, a radiation surface (108) and a contact surface (106) opposite the radiation surface (108), - a contact (110, 117) on the radiation surface (108), - a frame (103) made of potting compound (102), which laterally encloses the semiconductor chip (104) at least in regions such that the radiation surface (108) and the contact surface (106) are essentially free of potting compound (102), - a first contact structure (114), at least partially arranged on the frame (103) and at least partially arranged on the contact surface (106), for electrically contacting the layer of a first conductivity (120) and - a second contact structure (116, 138) at least partially arranged on the frame (103) and at least partially arranged on the contact (110, 117) of the radiating surface (108), for electrically contacting the layer of a second conductivity (124), - a mixing element (154) for spatially mixing electromagnetic radiation, wherein the mixing element (154) is arranged downstream of the semiconductor chip (104) in the direction of radiation, and - scattering or reflecting or absorbing particles are dispersed in the potting compound (102). Optoelectronic module according to claim 1 , wherein the potting compound (102) comprises at least one of the following materials: - silicone, - epoxy resin, - hybrid materials. Optoelectronic module according to claim 1 or 2 , wherein the mixing element comprises at least one of the following matrix materials: - glass (SiO ₂ ), - silicone, - polymethyl methacrylate (PMMA), - polycarbonate (PC). Optoelectronic module according to one of the preceding claims, wherein the particles comprise at least one of the following materials: - titanium dioxide (TiO ₂ ), - aluminum oxide (Al ₂ O ₃ ), - zirconium oxide (ZrO), - barium difluoride (BaF ₂ ), - silicon dioxide (SiO ₂ ), - carbon black. Optoelectronic module according to one of the preceding claims, wherein the particles comprise at least one of the following materials: - silver (Ag), - aluminum (Al), - quantum dots. Optoelectronic module according to one of the preceding claims, wherein scattering particles have a grain size of about 500 nm to about 3 µm. Optoelectronic module according to one of the preceding claims, wherein the contact on the emitting surface (108) has a transparent contact layer (110), in particular made of indium tin oxide and/or zinc oxide, wherein the transparent contact layer (110) covers the emitting surface (108) at least in regions, preferably over the entire surface. Optoelectronic module according to one of the preceding claims, wherein the first contact structure (114) is applied on the side of the frame (103) that adjoins the contact surface (106), and wherein the second contact structure (116, 138) is applied on the side of the frame (103) that adjoins the emitting surface (108). Optoelectronic module according to one of the preceding claims, wherein an electrically insulating insulation layer (134) is applied to the side of the frame (103) which adjoins the contact surface (106) and to the contact surface (106), and a heat sink (136), in particular a metallic one, is applied to the insulation layer (134). Optoelectronic module according to one of the preceding claims, wherein between the radiation surface a transparent refractive index adjustment element (157), in particular made of silicone, is provided between the surface (108) and the mixing element (154), wherein the refractive index of the transparent refractive index adjustment element (157) lies between the refractive index of the semiconductor chip (104) and the refractive index of the mixing element (154). Optoelectronic module according to one of the preceding claims with at least two semiconductor chips (104). Optoelectronic module according to claim 11 , wherein the at least two semiconductor chips (104) are connected to one another in series and/or in parallel. Optoelectronic module according to claim 11 or 12 , wherein the thickness (155) of the mixing element (154) substantially corresponds to the distance (159) between adjacent semiconductor chips (104) and in particular has values between 1 mm and 10 mm, preferably between 3 mm and 6 mm, particularly preferably 4 mm. Optoelectronic module according to one of the Claims 11 until 13 with at least one electrical feedthrough (130) in the frame (103), wherein the electrical feedthrough (130) electrically connects the first contact structure (114) of a semiconductor chip (104) to the second contact structure (116, 138) of an adjacent semiconductor chip (104).

Images