DE10059532A1 - Semiconductor chip for use with a luminous diode in optoelectronics, has an active layer with a zone to emit photons fixed on a fastening side on a carrier body - Google Patents

Abstract

A recess (8) made in an active layer (2) from a fastening side (11) breaks up an active zone (3). A number of recesses form elevations (4) on a connection layer (5) for the active layer. The connection layer has a contact point (7) formed by a metallized layer. Rear side elevations formed by the recesses are covered with a reflective layer made up of a dielectric insulating layer (9) and a metallized layer (10) applied to it.

Description

The invention relates to a semiconductor chip for the optoelek electronics with an active layer that emits a photon rende Zone and the egg on a mounting side Nem carrier body is attached.

Such semiconductor chips manufactured using thin-film technology are known from EP 0 905 797 A2. To manufacture the be Known semiconductor chips usually become an active layer applied to a substrate by an epitaxial process. A tear is then placed on top of the active layer body attached and the substrate removed. Favorable is located between the carrier body and the active one Layer a metallic reflective layer so that no light is absorbed by the carrier body. The well-known semiconductors chips are particularly suitable for applications in which a high optical performance is required.

A disadvantage of the known thin-film technology ten semiconductor chips is that between the carrier body and the active layer arranged metallic reflection layer short wavelengths are generally not satisfactory Have reflectivity. Especially at one wavelength of less than 600 nm, gold is considered a metallic reflection layer increasingly inefficient because the reflectivity is significant decreases. At wavelengths below 600 nm at for example, the elements Al and Ag are used, the Re Flexivity at wavelengths less than 600 nm comparatively remains constant.

It can also cover large areas, such as metallic reflections layer, difficult to bond. By bonding and that Alloying the metallic contact layer is also the  Quality of the metallic reflection layer in general be impaired.

DE 198 07 758 A1 is also a truncated pyramid ger semiconductor chip known to be an active, emit light de Zone between an upper window layer and a lower one Has window layer. The upper window layer and the un Tere window layer together form a truncated pyramid basic body. The sloping orientation of the side walls of the Window layers cause that from the active zone light is totally reflected on the side surfaces and na so at right angles to the base area serving as a luminous area surface of the truncated pyramid-shaped body. because passes through part of that emitted by the active zone Light within the exit cone of the semiconductor element the surface. In this cone under the outlet cone hang the cone of light rays are understood, their on Fall angle smaller than the critical angle for the totalre is inflection and is therefore not totally reflected. In order to a significant increase in the light output, this concept sets a minimum thickness for the top and bottom re window layer ahead. In the well-known truncated pyramid shaped semiconductor element is the thickness of the top and lower window layer at least 50.8 µm (2 mils). A such a layer thickness is still within the realm of feasibility. However, if the performance of the known semiconductor chip increases , it is necessary to measure all dimensions scale. This quickly results in layer thicknesses that are only un high expenditure can be produced epitaxially. The Known semiconductor chip is therefore not easily scalable bar.

Based on this prior art, the invention lies Based on the task of producing a thin-film technology To create semiconductor chip with improved light decoupling.  

This object is achieved according to the invention in that active layer from the mounting side a recess is introduced, the cross-sectional area with increasing Tie fe decreases.

The mounting side of the semiconductor can be cut out chips are significantly reduced so that the bonding of the ak tive layer on the carrier body performed easily can be. The recesses are also side surfaces Chen created part of which is from the active zone emitted photons is reflected so that the photons in within the outlet cone on the ge of the mounting surface the opposite exit surface of the active layer fen. The semiconductor chip according to the invention is more certain measured the reflection on the continuous reflective layer by reflection on the side surfaces of the recesses puts.

In one embodiment of the invention, the recesses are so deep that the active zone of the active layer through the in the active layer from the mounting side Recess is interrupted.

It has been shown that semiconductor chips whose active zone through an into the active layer from the mounting side inserted recess is interrupted, a particularly high Have luminous efficacy. Because in this case, not only the photons emitted towards the mounting side, but also emit towards the exit surface of the active layer th photons by reflection on the side surfaces of the recess brought into a large angle to the exit surface.

In a preferred embodiment of the invention are through the recesses bumps on a connecting layer of the active layer formed.  

Such surveys act as collimators that the trajectory orien of the photons emitted by the active zone almost in right angle to the exit surface of the semiconductor chip judge. As a result, a large part of the emitted photons hits within the exit cone on the exit surface on and can leave the semiconductor chip.

In a further preferred embodiment, the verb is layer formed so that at least one trajectory the photons emitted by the active zone from the respective leads to one of the neighboring surveys.

By optically coupling the elevations, photons, which is not on one of the side faces of the original heir have been reflected in one of the neighboring elevations exercises and there on the side surfaces of the respective Elevation are reflected so that they are within the off hit the taper on the exit surface.

Furthermore, in an advantageous embodiment, the inventor the elevations are equipped with concave side surfaces.

Through these measures, photons that are at the exit surface are first reflected with each additional reflex one increasingly placed on the side surface of the elevations, so that they finally hit the inside of the exit cone Hit exit surface.

In a further preferred embodiment, the ridges exercises covered with a reflective layer.

By this measure, all are on the side of the Raised light rays towards the Aus steered side of the semiconductor chip.

Further advantageous refinements are the subject of pending claims.  

The invention is explained in more detail below with reference to the beige added drawing explained. Show it:

Fig. 1 shows a cross section through a semiconductor chip according to the invention;

Fig. 2 shows a cross section through a further exporting approximately example of a semiconductor chip according to the invention, wherein the active zone is disposed within each weils truncated pyramid-shaped projections;

Fig. 3, have a cross-section through a semiconductor chip according to the invention, which is equipped with projections of the concave side surfaces;

Fig. 4 is a diagram showing the increase in light yield in the semiconductor chip according to the invention compared to conventional semiconductor chips;

Figure 5 is a cross-sectional profile of a survey composed of a lower flat truncated cone and an upper steep truncated cone.

. Figs. 6a to 6d environments and various cross-sectional profiles of Erhe a diagram showing the dependence of the outcoupling efficiency ness of radius of the interface between the lower truncated pyramid and the upper truncated pyramid of the survey of Figure 5;

FIG. 7 is a diagram showing the dependency of the coupling efficiency on the reflectivity of an ordered contact layer on the top of the elevation from FIG. 5;

FIG. 8 shows a diagram in which the dependency of the coupling-out efficiency on the reflectivity of the side surfaces of the elevation from FIG. 5 is shown;

Figure 9 is a diagram showing the relationship between coupling efficiency and size of a light spot in the active zone.

Figures 10a to 10d bung various cross-sectional profiles of a Erhe, wherein the height of the active zone is mainly riiert and a graph in which the off coupling efficiency as a function of Dic ke a lower confinement layer is Darge provides.

FIG. 11 is a diagram showing the dependence of the coupling efficiency from the flank angle of the Be a survey tenflächen with the cross-sectional profile shown in Figure 10b shows.

FIG. 12 shows a further diagram in which the dependency of the coupling-out efficiency on the flank angle of a survey with the cross-sectional profile from FIG. 10 b is shown;

FIG. 13 is a diagram illustrating the dependence of the coupling efficiency from the width of the active layer at a constant height veran; and

Fig. 14 shows the thickness of a a diagram showing the dependence of the coupling efficiency from the collection linking compound layer for different profiles of the protrusions.

The semiconductor chip shown in FIG. 1 for a luminescent diode has a carrier body 1 on which the active layer 2 is attached. For the sake of clarity, the thickness of the active layer 2 in relation to the thickness of the carrier body 1 is exaggerated in FIG. 1. The active layer 2 has a photon-emitting, active zone 3 , each of which is formed in elevations 4 at a medium height. The elevations 4 can have the shape of a truncated pyramid or a truncated cone. The semiconductor chip thus represents a luminescent diode.

The elevations 4 are net angeord on a connection layer 5 , which has a central front-side contact point 7 on a flat front 6 , which is formed by a metallization layer. The rear elevations 4 formed by recesses 8 are covered with a reflection layer, which consists of a dielectric insulating layer 9 and a metallization layer 10 applied thereon. The insulating layer 9 is interrupted along a base 11 of the Erhebun gene 4 by vias 12 , which are formed by me tallized sections.

To produce the semiconductor chip shown in FIG. 1, the active layer 2 is first grown epitaxially on a base substrate. The active layer 2 can, for example, be produced on the basis of InGaAlP. Here, the connection layer is first formed on the base substrate of 5, and then doped with a concentration above 10 ¹⁸ cm ^-3 to maintain a good conductivity of the interconnect layer to ensure. 5 Because a good conductivity of the connection layer 5 is a prerequisite for that on the front side 6 a central contact point 7 is sufficient for supplying the active zone 3 with current. In addition, the composition of the connecting layer 5 is selected so that it is transparent to the photons generated in the active zone. This can usually be done by adjusting the band gap through the composition of the material of the connecting layer 5 .

A further layer is then applied to the connecting layer 5 , into which the elevations 4 are introduced using suitable wet or dry chemical etching processes. Such etching processes are known and are not the subject of the application. The elevations 4 are preferably formed in the areas provided for the semiconductor chips. These are areas with typical external dimensions of 400 × 400 µm ² . The elevations 4 have external dimensions that lie in the region of the layer thickness of the active layer 2 . The outer dimensions of the elevations 4 are therefore in the range of 10 microns.

In a further method step, the insulating layer 9 is deposited on the elevations 4 and the through-contacts 12 are formed . Then the metallization layer 10 is applied.

The active layer 3 is then separated in accordance with the number of semiconductor chips provided. This is done, for example, by wet etching.

Then the separated active layers are attached to the carrier body 1, for example by eutectic bonding, and the base substrate is removed by wet etching. Finally, the contact points 7 are formed on the exposed front side of the active layer 2 and the semiconductor chips are separated by separating the carrier body 1 .

The semiconductor chip shown in FIG. 1 has the advantage that the photons generated by the active zone 3 do not strike components of the semiconductor chip which absorb them. Because the metallization layer 10 keeps the photons away from the carrier body 1 .

Another advantage is that in the semiconductor chip from FIG. 1, a large part of the photons emitted by the active zone 3 is totally reflected on side surfaces 13 of the elevations 4 . The photons totally reflected on the side surfaces 13 hit the front side 6 at a large angle. In particular, a portion of the photons that would be totally reflected without reflection on the side surfaces 13 on the front side, meets the front side 6 within the exit cone and can therefore leave the semiconductor chip. In the semiconductor chip accelerator as Fig. 1 is therefore se by the total reflection at the side surfaces 13 at least teilwei replaces the reflection at the known from the prior art solid base. Therefore, in comparison to conventional semiconductor chips without recesses 8 , the semiconductor chip from FIG. 1 has a light yield that is increased by a factor of almost two.

The effect described is explained in detail below with reference to the further exemplary embodiments shown in FIGS. 2 and 3.

A number of light beams are considered, the Be did not take light rays as a limitation to one tuned wavelength, but as a reference to the methods the geometric optics, regardless of the wavelength, ver should be standing.

In the example shown in Fig. 2 embodiment, the He surveys formed truncated pyramid 4 and attached only to the base surface 11 of the elevations 4 via a contact layer 14 on the carrier body 1. The active zone 3 is supplied with current through the contact layer 14 .

Because of the large difference between the refractive indices from semiconductors to cast resin of typically 3.5 to values  of typically 1.5 can be found at the interface between Semiconductors and cast resin only light rays from the semiconductor decouple that within an exit cone with an opening angle of about 16 ° to the interface. at incidence of the light rays evenly distributed over the angle this corresponds to about 2% of the area unit the rays of light.

Through the elevations 4 , the light rays emanating from the active layer 2 are directed in the direction of the front side 6 . The elevations 4 therefore act as collimators in which the active zone 3 is located in the focal surface. The Erhebun gene 4 cause that the incident on the side surfaces 13 light rays are set up in the direction of the front 6 and hit there within the exit cone, so that they can leave the semiconductor chip. The light output can be optimized by a suitable choice of the dimensions of the base 11 , the angle of inclination of the side surface 13 and the height of the elevations 4 and the position of the active zone 3 .

A light beam 15 is shown in FIG. 2, which is initially totally reflected on the side surface 13 and is directed from there to the front side 6 . On the front 6 , the light beam 15 strikes the interface within the exit cone and can therefore leave the semiconductor chip. Without the total reflection on the side surface 13 , the light beam 15 would have been totally reflected on the front side 6 and redirected back to one of the reflection layers known from the prior art, where it would have been reflected again. In this respect, in the exemplary embodiment shown in FIG. 2, the reflection on the conventional continuous reflection layer is replaced by the reflection on the side surfaces 13 .

This also applies to a light beam 16 , which is first reflected on the base surface 11 and then on the side surface 13 . Also, the light beam 16 is directed to the front 6 after the second reflection, where it strikes within the exit gate. Without the reflection on the side surface 13 , the light beam 16 would also have been totally reflected on the front side 6 and would have been deflected back to a rear reflection layer.

It is also advantageous that the elevations 4 are optically coupled via the connec tion layer 5 . In this context, optical coupling is to be understood to mean that at least one of the light beams emanating from the active layer 2 can pass over a center line 17 from the area of one of the elevations 4 to the area of one of the adjacent elevations 4 . Because through the optical coupling with the aid of the connecting layer 5 , a light beam 18 , which does not strike one of the side surfaces 13 of the respective elevations 4 , can hit one of the side surfaces 13 of one of the adjacent elevations 4 and be directed there to the front 6 where it hits inside the exit cone. The light output is therefore further increased by the optical coupling via the connection layer 5 .

In Fig. 3, finally, a cross section through a variant of the semiconductor chip is shown, in which the elevations 4 are frustoconical with concave side surfaces 13 are formed. The design of the side surfaces 13 leads to a light beam 18 which is reflected back and forth between the front side 6 and the side surface 13 being increasingly set up as it approaches the center line 17 until it strikes the front side 6 within the exit cone. The same applies to light rays 9 , which first pass through the connecting layer 5 from one elevation 4 to the adjacent elevation 4 and are brought to the front 6 there at a large angle.

In Fig. 4, finally, a diagram is shown in which a measurement curve 20 represents the dependence of the luminous efficacy in relati ven units on the operating current during pulse operation for a conventional light-emitting diode manufactured in thin-film technology. Another measurement curve 21 illustrates the dependency of the luminous efficacy in relative units as a function of the operating current for a light-emitting diode according to the exemplary embodiment shown in FIG. 3. Fig. 4 can be seen that the light yield in the example shown in Fig. 3 Ausfüh approximately twice the light yield of conventional semiconductor chips without recesses 8 has.

In order to determine the most favorable form for the surveys 4 , a series of ray tracing simulations were carried out. The results of these calculations are presented in detail below with reference to FIGS. 5 to 14.

First, the parameters varied in the calculations are explained with reference to FIG. 5. In Fig. 5 is a cross-sectional profile of the protuberances 4 is illustrated. In the case shown, the elevation 4 is composed of a lower truncated cone 22 and an upper truncated cone 23 . The lower truncated cone 22 adjoins the connecting layer 5 with a base surface 24 . In the upper truncated cone 23 , the active zone 3 is ausgebil det. In addition, a contact point 25 arranged on the base 11 of the elevation 3 is provided in FIG. 5.

The side surfaces 13 of the elevation 4 are composed of a flank 26 of the lower truncated cone 22 and flanks 27 of the upper truncated cone 23 . The geometric dimensions of the lower truncated cone 22 along a common boundary surface 28 are chosen so that the edge 26 passes directly into the edge 27 .

In the following, reference is made to various dimensions of the survey 4 . The radius of the base surface 24 of the lower cone 22 is denoted by r _n , the radius of the interface 28 by r _t and the radius of the base 11 by r _p . Furthermore, the elevation 4 can be divided into a lower boundary layer 29 between the base area 24 and the active zone 3 and an upper boundary layer 30 between the active zone 3 and the base area 11 . The lower boundary layer 29 has a height h _u and the upper boundary layer 30 has a height h _o . The entire height of the elevation 4 is finally denoted by H. It was consistently set to 6 µm in all calculations. A value of 2 μm was chosen for the thickness h _{w of} the connecting layer 5 in all calculations in which the thickness h _{w was} not varied.

In Figs. 6a to 6d, the result of a calculation is made is, in which the radius r _p of the base surface 11 equal to 5 microns and the radius r of base surface 24 is equal to _n 20 microns set WUR de. The radius r _t of the interface 28 was varied in the Fig. 6a-Fig. 6c illustrated cross-sectional profiles microns corresponding 6-18

A refractive index of 3.2 was used in the calculations for active zone 3 . The refractive index of the lower boundary layer 29 , the upper boundary layer 30 and the connecting layer 5 was 3.3. Unless varied, the reflectivity of the contact point 25 was set at 0.3. The reflectivity of the base area 11 not covered by the contact point 25 and of the flanks 26 and 27 was set to the value 0.8. In this case, reflectivity is understood to mean the reflection coefficient based on the energy.

Furthermore, the self-absorption of the active zone 3 was taken into account by an absorption coefficient of 10,000 / cm. All calculations were done with photon recycling. An internal quantum efficiency of 0.8 was assumed for this. The quantum efficiency in the generation of photons by charge recombination was not taken into account. The coupling-out efficiency η given in the diagrams is therefore equal to the ratio of the photons coupled out from the semiconductor chip to the number of photons actually generated. The values for the specified coupling efficiency η would therefore have to be multiplied by a factor of 0.8 in order to arrive at the external efficiency.

It was also assumed that the reflection at the contact point 25 and the flanks 26 and 27 is independent of the angle. In the calculations, therefore, the case in which the dielectric insulating layer 9 is first applied to the elevations 4 and supplemented by the reflective metalization layer 10 is underestimated in its effectiveness in the calculations, since the total reflection occurring in this case is not taken into account in the calculations becomes.

Fig. 6c shows a diagram in which the outcoupling efficiency η versus the radius r _t in a curve 31 is plotted. For comparison, the outcoupling efficiency of a normal thin film semiconductor chip is also shown, in which the scattering is only mediated by photon recycling. This thin-film semiconductor chip with an edge length of 300 μm has the same epitaxial structure as the elevation 4 in the lower truncated cone 22 and upper truncated cone 23 . It was assumed that the semiconductor chip was provided on the p-side with a mirror whose reflectivity was 0.72. This value is the weighted average value of the reflectivity of a reflective layer and a contact layer, the value 0.8 being set for the reflectivity of the reflective layer and the value of the reflective layer being 0.8% and the reflectivity of the contact layer the value 0.3 and the occupancy 0.15 was used.

From Fig. 6 it can be seen that with a very large angle of attack ϕ _{o of} the upper truncated cone 23 according to the cross-sectional profile shown in Fig. 6a, the coupling-out efficiency η is hardly better than the coupling-out efficiency η of a conventional thin-film luminescence diode, the coupling-out efficiency in Fig. 6d is represented by the straight line 32 . This is also understandable, since the elevation 4 with the flat cross-sectional profile shown in FIG. 6a hardly brings the light rays emanating from the active zone 3 into a steep angle to the luminous surface 6 . Exactly this, however, is accomplished by the elevation 4 with the cross-sectional profile shown in FIG. 6c, which is why the coupling-out efficiency in this case is almost twice the coupling-out efficiency η of a conventional thin-film luminescence diode.

Furthermore, the dependence of the coupling-out efficiency η on the reflectivity of the contact point 25 was examined. For this purpose, the coupling-out efficiency η was calculated as a function of the reflectivity of the contact point 25 , the cross-sectional profile of the elevation 4 being equal to the cross-sectional profile shown in FIG. 6b. In addition, it was assumed that the contact point 25 covers the entire base area 11 . It can be seen from FIG. 7 that the coupling-out efficiency η does not essentially depend on the reflectivity of the contact point 25 . The semiconductor chips described here with elevations 4 on the fastening side therefore appear to be significantly less sensitive to the poor reflectivity of the contact points 25 than the conventional thin-film luminescent diodes, since the multiple reflections leading to coupling out appear to be only a small fraction between the base area 11 and the luminous area 6 , but three-dimensionally in the survey 4 .

The relative independence from the reflectivity of the contact point 25 is particularly advantageous, since in practice a low ohmic resistance between the contact point 25 and the upper boundary layer 30 is generally associated with a poor reflectivity. Because a good ohmic contact requires the diffusion of atoms from the layer forming the contact point 25 into the underlying material.

In contrast to the dependence on the reflectivity of the contact point 25 , the dependence of the coupling-out efficiency η on the reflectivity R _{S of} the mirror surfaces on the base 11 and the flanks 26 and 27 is strongly pronounced. This is shown by the results of a calculation that was carried out using a model for the semiconductor chip, the elevations 4 of which have the radii r _p = 5 μm, r _d = 16 μm and r _n = 20 μm.

The surveys 4 therefore have approximately the cross-sectional profile shown in FIG. 6b.

The result of this calculation is a curve 33 entered in FIG. 8, which increases monotonically with increasing reflectivity R _S. A point 34 entered in the diagram from FIG. 8 represents the result of a calculation for a semiconductor chip to which no mirror layer was applied, but which was embedded in resin as the surrounding medium. Here, however, total reflection takes place, so that there is greater coupling-out efficiency compared to a semiconductor chip with a mirror layer. This would also be the case in the embodiment shown in FIG. 1, in which the electrical insulating layer is arranged between the metallization layer 10 , at which total reflection can also take place.

Fig. 9 shows the result contains a bill that was performed on a semiconductor chip having bumps 4, applied to the radii r _p = 5 microns, r _t = 16 microns, and r _n = 20 microns. The elevations 4 therefore essentially have the cross-sectional profile shown in FIG. 6a. The active zone 3 was located at a medium height between the base surface 24 and the base surface 11 . In this calculation, the area in which 3 photons are generated in the active zone was narrowed down to a light spot whose diameter d _S is plotted on the abscissa. It can be seen from the diagram in FIG. 9 that the coupling-out efficiency is particularly high with a small light spot. This means that photons in the center of active zone 3 are coupled out particularly well. In this respect, there is a slight Weierstrass effect.

Furthermore, the influence of the position of the active layer 3 was examined. In Fig. 10a to 10c different cross-sectional profiles are shown, in which the thickness h _{u of} the lower limit layer 29 and the thickness h _{u of} the upper limit layer 30 were varied so that the overall height H of the survey remained constant. The result of the calculation is shown in FIG. 10d, in which the coupling-out efficiency η is plotted as a function of the thickness h _{u of} the lower boundary layer 29 . It can be seen that the coupling-out efficiency is only slightly dependent on the position of the active zone 3 . An active region 3, which is located in the lower half of the rib 4 is preferable since then the current density is low due to the active region 3, and is therefore considered the current load of the ak tive zone 3 small, aging and linearization tätsprobleme avoids ,

The influence of the angle of attack ϕ _{o of} the flank 27 and the angle of attack ϕ _{o of} the flank 26 was also examined. A cross-sectional profile was assumed in which the lower right truncated cone 22 and the upper truncated cone 23 each have the same value for the angles of attack stell _u and ϕ _o . The radius ϕ _o of active zone 3 was kept constant at 10 µm and the angle of attack ϕ = ϕ _o = ϕ _u varied. Two cases were considered. On the one hand, the coupling-out efficiency η was calculated for the periodic case in which an infinite number of elevations 4 are arranged in a square grid, the distance between the base points being 10 μm. The result is recorded in the diagram in FIG. 11 in curve 35 . An aperiodic case was also examined. For this purpose, the outcoupling efficiency η calculated a semiconductor chip with an individual elevation 4, all of which are in the connection layer 5 Phontonen incoming from the link layer 5 absorbs. The aperiodic case is represented in FIG. 11 by curve 36 . From Fig. 11 it can already be seen that the connection layer 5 makes a noticeable contribution to the coupling-out efficiency η.

There is also an optimal range for the flank angle ϕ. This is clear from Fig. 12. In the underlying calculation, the radius r _{p was} set to 10 µm. The radius r _{a of} the active zone 3 and the radius r _{n of} the base surface 24 were varied so that the angle of attack ϕ of the flanks 27 and 26 covers a range of values between 1.5 ° and 85 °. As can be seen from Fig. 12, there is an optimal angle range for the angle of attack ϕ. The flank angle ϕ should be between 5 ° and 60 °, preferably between 10 ° and 40 °. Particularly good values for the coupling-out efficiency η result when the angle of attack ϕ is between 15 ° and 30 °.

It was then examined what effect a variation in the width of the elevations 4 has on the coupling-out efficiency η. In this case, the height H of the elevations 4 was therefore kept constant and the radii r _p , r _a and r _n stretched uniformly. A curve 37 in FIG. 13 illustrates the case in which the reflectivity R _{K of} the contact point 25 is 0.3. Another curve 38 relates to the case where the reflectivity R _{K of} the contact point 25 is 0.8. Both curve 37 and curve 38 show the dependency of the coupling-out efficiency η on the diameter 2 r _{a of} the active zone 3 . With good re flectivity of the contact point 25 , the coupling-out efficiency η decreases only slightly with increasing diameter of the active zone 3 . The curve 37 , which illustrates the realistic case of a poor re flectivity R _{K of} the contact point 25 , shows that the coupling efficiency η decreases sharply with increasing diameter of the active zone 3 . The coupling-out efficiency η is therefore the better, the smaller the lateral extent of the elevations 4 .

The thickness of the connecting layer 5 is also important for the coupling-out efficiency η. In Fig. 14, the efficiency η is Auskoppeleffi for different cases in dependence on the thickness h of the connection layer 5 _w applied. A curve 39 shows the periodic case already mentioned. Another curve 40 relates to the aperiodic case and a third curve 41 a case in which square semiconductor chips with an edge length of 300 μm are connected to one another by a connecting layer. It can be seen from Fig. 14 that the connection layer 5 is increasingly advantageous with increasing layer thickness. However, it is also apparent from FIG. 14 that a large number of individual semiconductor chips, each of which has an elevation 4 , represent the best case since the coupling efficiency is highest at the thickness h _w = 0. However, individual chips have the disadvantage that their performance cannot be increased arbitrarily, since the dimensions of the semiconductor chips also have to be scaled with the performance. For practical reasons, however, the thickness of epitaxial layers is limited. The consequence of this is that individual semiconductor chips cannot be designed for any desired power. The semiconductor chips presented in FIGS . 1 to 4 can be scaled as desired, since only the number of elevations 4 corresponding to the increasing area of the connecting layer 5 must be increased in order to increase the light output of the semiconductor terchips.

A further investigation referred to the question of whether the active zone 3 cannot also be arranged in the connection layer 5 . For this purpose, the coupling-out efficiency was calculated for a conventional thin-film luminescent diode and this was set to 1. A semiconductor chip with the active zone 3 in the connection layer 5 has a coupling-out efficiency of 1.25 compared to the conventional thin-film luminescent diode. For the semiconductor chips shown in FIGS. 1 to 4, there was finally a relative coupling-out efficiency of 1.67. This shows that an increase in the coupling-out efficiency η can also be achieved if the active zone 3 is arranged in the connecting layer 5 .

LIST OF REFERENCE NUMBERS

1

support body

2

active layer

3

active zone

4

surveys

5

link layer

6

light area

7

contact point

8th

recesses

9

insulating

10

metallization

11

Floor space

12

via

13

faces

14

contact layer

15

beam of light

16

beam of light

17

center line

18

beam of light

19

beam of light

20

measured curve

21

measured curve

22

Lower truncated cone

23

Upper truncated cone

24

footprint

25

contact point

26

flank

27

flank

28

interface

29

Lower boundary layer

30

Upper boundary layer

31

to

41

Curve

Claims (14)

1. Semiconductor chip for optoelectronics with an active layer ( 2 ) which has a photon emitting zone ( 3 ) and which is attached to a mounting body on an attachment side ( 11 ), characterized in that in the active layer ( 2 ) the mounting side ( 11 ) ago a recess ( 8 ) is introduced, the cross-sectional area decreases with increasing depth. 2. Semiconductor chip according to claim 1, characterized in that the active zone ( 3 ) is interrupted by the recess ( 8 ). 3. A semiconductor chip according to claim 1 or 2, characterized in that elevations ( 4 ) are formed on a connecting layer ( 5 ) of the active layer ( 2 ) by a plurality of recesses ( 8 ). 4. Semiconductor chip according to one of Claims 1 to 3, characterized in that at least one trajectory ( 18 ) of the photons emitted by the active zone ( 3 ) leads from the respective elevation ( 4 ) to one of the adjacent elevations ( 4 ). 5. Semiconductor chip according to claim 3 or 4, characterized in that the elevations ( 4 ) taper towards the carrier body. 6. Semiconductor chip according to claim 5, characterized in that the elevations ( 4 ) have concave side surfaces ( 13 ). 7. Semiconductor chip according to one of claims 3 to 6, characterized in that the elevations ( 4 ) are truncated pyramid-shaped. 8. Semiconductor chip according to one of claims 3 to 7, characterized in that the active zone ( 3 ) in one of the connecting layer ( 5 ) adjacent half of the elevations ( 4 ) is arranged. 9. Semiconductor chip according to one of claims 3 to 8, characterized in that the connecting layer ( 5 ) is transparent to the photons emitted by the active zone ( 3 ). 10. Semiconductor chip according to one of claims 3 to 9, characterized in that the connection layer ( 5 ) is highly doped. 11. Semiconductor chip according to one of claims 3 to 10, characterized in that the elevations ( 4 ) with a reflection layer ( 9 , 10 ) are covered. 12. A semiconductor chip according to claim 11, characterized in that the reflection layer has a metallization layer ( 10 ) underlaid with an insulating layer ( 9 ). 13. Semiconductor chip according to one of claims 1 to 12, characterized in that the active layer ( 2 ) has a thickness of less than 50 µm. 14. Semiconductor chip according to claim 13, characterized in that the active layer ( 2 ) has a thickness of less than 30 µm.