DE10015841A1 - Mobile device, such as mobile telephone, has RC oscillator for clocking integrated processing circuit - Google Patents

Abstract

Mobile telephone has a slow oscillator (10) integrated into the integrated circuit of the microprocessor (12) necessary for activating the mobile device, and has a counter (17) that is clocked by the oscillator. Frequency change of oscillator is measured, and a register (18) stores the frequency change measurement. A fast counter (19) associated with a fast oscillator is included to facilitate synchronization of operation of both oscillators. Slow oscillator may be a reversible switch, and two oscillators are needed for clocking the microprocessor. The slow oscillator is for standby mode and fast oscillator is for active mode. An independent claim is made for method of controlling standby mode of a mobile device, such as mobile telephone.

Description

The invention relates to a mobile device and a method for control Standby mode in such a mobile device. The user The scope of the invention is preferably that of mobile telephony. However, the invention is also applicable to any other field in the integrated circuits used and several modes of operation in advance such as the field of portable computers. aim the invention is to take up the space required in a mobile device Reduce circuits and their production costs.

Currently, a key feature of mobile phones is their autonomy in the Standby mode. This autonomy depends, among other things, on the electricity use of the phone in this mode. In standby mode an inquires Mobile phone to see if there are any incoming calls. This query takes place at times provided by the network that the mobile phone be communicated by the network. Between two consecutive times The mobile phone has to score very little or no processing operations, except to check if it is ready for the next query ready. A period of time must therefore be measured.

All operating modes, be it active or standby, are currently Mode, controlled by one and the same highly integrated circuit. This Circuit is connected to two crystals, one of which is a high fre frequency, usually 13 MHz, and the other a slow frequency, in  usually 32 KHz. The highly integrated circuit can be based on these two Frequencies work. In active mode, the highly integrated circuit perform many processing operations and is high temporary subject. It is therefore clocked by the quartz at 13 MHz, which means high power consumption. In standby mode, the integrated circuit perform only a few processing operations so that the temporary stresses decrease. It thus switches into a loading mode of operation with reduced power, which ge from the quartz to 32 KHz is clocked. As a result, the power consumption for example in the Ver Ratio of the frequency of the two crystals reduced. The cell phone is wah rend a query in the active and between two consecutive Ab ask in standby mode.

The problem with such an implementation lies in the nature of the slow oscillator. This slow oscillator is a quartz, i. H. on Quartz block with a specific shape, which is between two electrodes is arranged. If you apply a voltage to these electrodes, the Quartz is mechanically deformed, then vibrates and emits a signal the frequency to which the system was calibrated. Given a Frequency has such a system a minimal footprint. That is why Using a quartz is an obstacle to integration as such Quartz cannot be integrated.

In addition, crystals are precision systems. You are responsible literally for the working rhythm of the mobile phone and its synchronization with the network. Their execution requires due to the demanding Specifications expensive technologies, what the total cost of the mobile phones increased.

The invention solves these problems by passing the quartz through a RC oscillator replaced, which emits a signal at a frequency with the of a signal emitted by a quartz is identical. Such oscillato are manufactured using controlled technologies and are fully integrated bar. This means that a lot of space is gained at no cost. The oscillator will namely integrated in an integrated overall circuit and binds only a few Transistors. An integrated overall circuit in turn comprises several re a hundred thousand transistors, so adding these few Transistors whose cost does not change.

The invention thus relates to a mobile device which comprises:

• - An integrated processing circuit that is used to activate the mobi len device is required
• - Devices with which this device in standby and active mo is switched,
• two oscillators for clocking the integrated processing circuit, a first, slow oscillator, which is used in a standby mode, and a second, fast oscillator, which is used in an active mode,
  characterized in that the slow oscillator is an RC oscillator.

The invention further relates to a method for controlling a stand-by mode of a mobile device, in which:

• - Man the device in active mode using a fast, familiar dimensionally stable oscillator,
• - One for a standby mode of the device before a wake-up time sees, this point in time being stored in a register,
• - be useful parameters for controlling the standby mode calculates and stores them in a memory,
• - the device is put into standby mode and then at the intended wake-up time with the help of a slow oscillator back into active mode,
  characterized in that shortly before the transition to standby mode and regularly during this standby mode:
• - a slow RC oscillator synchro with the fast oscillator nized,
• Stores the result of the synchronization in a register,
• - provides a period between two synchronizations,
• - the slow RC oscillator at the end of the period between two Synchronizations resynchronized.

The present invention will be better understood by reading the following description and study of the accompanying figures. This are presented as examples only and are in no way restrictive of The invention. The figures show:

Fig. 1 is an illustration of a mobile device according to the invention and its essential elements, in particular a first example of an RC-oscillator;

FIG. 2 shows a second example of an RC-oscillator;

FIG. 3 shows an illustration of the steps of the method of the invention;

Fig. 4: Chronograms of the synchronization of individual events during a standby mode of a mobile phone.

Fig. 1 shows a mobile device 1 of the invention. To simplify the explanation, the device 1 is a mobile telephone here. The telephone 1 comprises an integrated processing circuit 2 . The circuit 2 is connected to a circuit 3 for controlling the transmission / reception via an internal bus 4 , a connection 41 of the integrated circuit 2 and an external bus 42 . The circuit 3 is connected to an external antenna 5 , which enables the mobile phone to send and receive radioelectric signals. A fast quartz oscillator 6 is connected to the bus 4 of the integrated circuit device 2 . A power supply 7 provides the power required for the integrated circuit 2 , the circuit 3 and the oscillator 6 . The telephone 1 comprises an interrupter 8 between the power supply 7 and the circuit 3 and an interrupter 9 between the power supply 7 and the oscillator 6 . The control inputs of the breakers 8 and 9 are applied to the bus 42 . However, the interrupters can also be included in the circuit 2 . These switches 8 and 9 are used when switching to the standby mode of the mobile phone to separate circuits from the power which are of little or no use for the control of the standby mode or of little or temporary use.

The representation of the devices for switching the oscillator 6 and the circuit 3 in the standby mode is schematic. In practice, the breakers 8 and 9 can be transistors.

Fig. 1 also shows that the integrated circuit 2 according to the invention comprises a slow RC oscillator 10 which is connected to a terminal of a Se lector 11 . The selector 11 is connected to the oscillator 6 with another terminal. The selector 11 is also connected to the microprocessor 12 via the bus 4 with an output.

The slow oscillator 10 comprises, in one example, a reversing switch 14 , the input of which is connected to the output by means of a resistor 15 . The input of the reversing switch 14 is also connected to a ground by means of a capacitor 16 . The output signal of the oscillator 10 is the output signal of the reversing switch 14 . The output of the reversing switch 14 is applied to the first terminal of the selector 11 . In this example, the slow oscillator has a maximum of about ten transistors. It is integrated in circuit 2 .

The operation of the oscillator 10 is simple. When the undervoltage is set, the capacitance 10 is discharged, so the voltage at the input of the reversing switch 14 is zero. The output of the reversing switch 14 is brought to a high voltage Vmax. The capacitance 16 is now charged through the resistor 15 to a voltage VH at which the reversing switch 14 tilts to bring its output to zero. The capacitance 16 then discharges to a voltage VB at which the reversing switch 14 flips again in order to bring its output to the value Vmax. The signal generated is thus a step signal with an amplitude equal to Vmax and with a cycle time that is equal to the charging and discharging time of the capacitor 16 between the voltages VH and VB. VH is larger than VB.

The mode control programs executed by the microprocessor 12 are stored in a memory 13 which is connected to the microprocessor 12 via the bus 4 . The memory 13 also contains a data and work zone of the microprocessor 12 . Subsequently, the steps carried out by the microprocessor 12 are of course subject to the control of a general operating program contained in the memory 13 .

The bus 4 contains an address bus, a data bus, a control bus and a supply bus. A clock signal coming from the fast oscillator 6 or the slow oscillator 10 according to the position of the selector 11 is given to the microprocessor 12 and the other circuits that need it, via the control bus having a connector, the purpose of which is to transmit this clock signal exists. In one example, the microprocessor 12 acts on the selector 11 by driving this selector by means of the address bus, giving it a command via the data bus and confirming this command by the control bus. The selector 11 then recognizes two commands: one for the transition from the fast oscillator 6 to the slow oscillator 10 , the other for the transition from the slow oscillator 10 to the fast oscillator 6 . Other control devices can also be seen.

Fig. 1 shows again a slow counter 17. This counter 17 is connected to the oscillator 10 , of which it counts cycles. This count is used to measure a duration, which is then expressed in the number of cycles of the slow oscillator 10 . A register 18 contains a result of the synchronization of the oscillator 10 by the oscillator 6 . This synchronization is carried out by a fast counter 19 . The counter 19 is connected to the oscillator 6 and counts cycles of this fast oscillator 6 . To synchronize the oscillator 10 , only the counter 19 has to be set to zero and then the counter 19 has to be started between, for example, two rising edges of the signal of the oscillator 10 . The result is then the number of cycles of the fast oscillator 6 contained in one cycle of the slow oscillator 10 .

Finally, a register 20 is used to store a duration expressed in number of cycles of the fast oscillator 6 . These registers and counters, numbered 17 to 20 , can also be accessed by bus 4 for reading and writing. At any given time, there is only one clock signal in the clock link of bus 4 . However, slow and fast counting may be required. In this case, the selector 11 for the simultaneous provision of the two clock signals is somewhat more complicated or each counter is connected directly to the oscillator whose cycles it counts. However, the principle of the invention remains the same. The counters 17 and 19 have all the features of the known counters. They can be started and stopped, incremented or decremented as required. Counting is done in the rhythm of the oscillator on which they depend.

In the example, the standby mode of the telephone 1 is switched by switching off unnecessary elements such as the circuit 3 or the oscillator 6 , but also by switching off peripheral circuits, not shown, such as a keyboard, a screen and a microphone. At the time of this transition into the standby mode, the microprocessor 12 switches the integrated circuit 2 from an operation clocked by the oscillator 6 to an operation clocked by the oscillator 10 . The illustrated unnecessary elements are switched off by the breakers 8 and 9 . Switching from the oscillator 6 to the oscillator 10 takes place by means of the selector 11 . The energy saving achieved in this way is considerable, but can still be increased.

The circuit 2 contains hundreds of thousands of transistors which, since they are supplied with current, continue to cause energy loss. Since forth in a variant of the invention in the circuit 2, a circuit 21 specifically designed for the control of the standby mode is installed. The circuit 21 is connected to the bus 4 . For each function carried out by the microprocessor 12 of the circuit 2 , an interrupter is provided in a connection which supplies circuits useful for this function. As a result, certain functions of the circuit 2 can be selectively switched off. When switching to the standby mode, in addition to switching to a slow operating cycle supplied by the oscillator 10 , the power supply to all functions of the circuit 2 which are not used to control the standby mode is interrupted. The interrupters integrated in this way represent only a few dozen additional transistors. They are controlled using bus 4 .

An improvement is the fast signal by a quarter to delay the period and the same counting principle on the ascent and descent de flank to apply. You get an improvement in counting factor of four.

The problem of the oscillator 10 is that its frequency changes very much depending on the temperature. Fig. 2 shows a variant of a voltage controlled oscillator RC-201, which has this drawback less. The output of the oscillator 201 is applied to the input of a circuit 202 with a sensor and a low-pass filter. The circuit 202 acts like an averaging filter. The signal emanating from the oscillator 201 is a step signal, the circuit 202 of which supplies an average value to the comparator 203 . Circuit 202 is thus a simple example of a frequency-to-voltage converter. The output of circuit 202 is applied to a first input of a comparator 203 . A second input of the comparator 203 is connected to a reference voltage generator 204 . The output signal of the comparator 203 is proportional to the difference between the output signal of the circuit 202 and the reference voltage. The output of the comparator 203 is applied to the control input of the oscillator 201 . The oscillator of FIG. 2 can replace the oscillator 10 . However, its integration requires more components than the oscillator 10 . The advantage of the oscillator of FIG. 2 is that it changes significantly less as a function of temperature than the oscillator 10 . Namely, reference voltages can be achieved which are very temperature stable.

To the possible rapid temperature fluctuations in the chip not to be exposed to the circuit, you can turn the RC pair out outsource half of the integrated circuit. The thermal time constants are then greatly increased, from a few seconds to a few minutes ten.

Fig. 3 shows steps of the method of the invention, which follow one another from the point in time at which the phone is switched to the standby mode. The interrupters 8 and 9 are initially in a closed position, the circuit 2 is then clocked by the oscillator 6 . In a step 301 , the oscillator 10 is calibrated. With this goal, the counter is set to zero. Then you wait for a rising edge of the oscillator 10 . This rising edge can be detected, for example, when the value of counter 17 changes. As soon as the rising edge of the oscillator gate 10 is determined, the counter 19 is started. A rising edge is then waited for in accordance with the signal from the oscillator 10 in order to stop the counter 19 . If the counter 19 is stopped, one reads its value and stores it in the register 18 .

Then one arrives at a step 302 of calculating the parameters of switching to the standby mode. In step 302 , a duration TS is calculated in particular, during which the telephone is to be switched in standby mode. The duration TS is converted into a number of cycles of the known and stable, fast, oscillator 6 . If TS is expressed in seconds, the conversion is done by multiplying TS by the frequency of the oscillator 6 . The result is stored in register 20 .

Then you set a duration TR between two synchronizations of the oscillator 10 . The change in a slow RC oscillator is too large, even if it is temperature-stabilized, to assume that its frequency is constant over the entire duration of TS. In practice, the duration of TS is between around 400 milliseconds and two seconds. During the period during which the frequency of the slow oscillator 10 can be regarded as stable, the maximum is 100 milliseconds. This duration between two synchronizations TR is determined to be less than the time that separates the time of its calculation from the wake-up time of the mobile phone. The time TR is deducted from the duration TR, which is required to build up a stable frequency of the oscillator 6 from a standby state. In practice, this time is about a few milliseconds. A duration TE is obtained in this way. The standby time of the mobile phone is thus ended at the end of the duration TE. The duration of TE is provided so that this change remains monotonous when the frequency of the oscillator 10 changes. Then the time TE is converted into a number of cycles of the oscillator 10 . That is, one multiplies the time TE expressed in seconds by the frequency of the oscillator 10 and stores the result as the threshold value of the counter 17 . Then one proceeds to a step 303 of switching to the standby mode.

In step 303 , the breakers 8 and 9 are tilted into open positions. At the same time, the selector 11 is switched so that the switching device 2 is clocked by the oscillator 10 . At the same time, the counter 17 is started. The cell phone's activity is now minimal and its power consumption is reduced. A step 304 is reached to wait for the duration TE to expire.

The following step 304 is an event expectancy test. In practice, the counter 17 is incremented until it reaches its threshold value previously set at TE in step 302 . When the threshold value is reached, the counter 17 triggers an interruption, which means that the microprocessor 12 has to at least partially resume processing. Now you come to a step 305 of testing the wake-up time at the end of the duration TS.

In test 305 , the threshold value of counter 17 is multiplied by the content of register 18 . In this way, a time TP is obtained which separates the time of the test 305 from the time of an earlier synchronization. This time TP is subtracted from the content of register 20 . This difference is stored in register 20 . The register 20 contains the time remaining until the wake-up time at the end of the duration TS. If this remaining time is a few cycles of the slow oscillator very close to the time required to build up the stable frequency of the oscillator 6 , plus a wake-up time of the mobile phone, the wake-up time for the mobile phone has come: it goes completely from standby to the active mode. A step 306 of a known type of waking the mobile telephone 1 is now reached. Otherwise, one proceeds to step 307 for waking only the oscillator 6 .

At step 307, the microprocessor 12 acts on the breaker 9 to bring it into the closed position. This causes an undervoltage setting of the oscillator 6 , that is, its restart. During the test 305 and during the build-up of the frequency of the oscillator 6 , the counter 17 is incremented further. The build-up time for the oscillator 6 is approximately one hundred cycles of the slow oscillator 10 . When these hundred cycles have expired, the counter 19 is started after being set to zero on a rising edge of the oscillator 10 . Then you stop it on the next rising edge. This is a step 308 of the renewed synchronization of the oscillator 10 . In this way, the oscillator 10 is synchronized again at the end of the duration TE.

Then one proceeds to a step 309 of the new calculation of the deactivation parameters. One reads the contents of the counter 17 , adds a number of cycles to the number read, which are required to carry out step 309 . This latter number of cycles is constant since these processes always remain the same. The result of this addition is multiplied by the content of register 18 . The result of this multiplication is subtracted from the content of register 20 . The content of register 20 is updated based on the result of this subtraction. Register 20 now contains the duration between the end of current step 309 and the wake-up time of the mobile phone.

Now a new intermediate synchronization time has to be set. For this purpose, the difference between the content of the register 18 and the new content of the counter 19 is calculated. In a way, you compare a new synchronization with a previous synchronization. One takes the absolute value of the difference and divides it by a factor K. The factor K is chosen so that the number obtained cannot exceed a number N that was determined by laboratory measurements. The number reached allows indexing a table that contains possible values of TE. In practice, empirical values of TE for distance values between two successive synchronizations are listed in the table. The threshold value of the counter 17 can be updated on the basis of the TE taken from the table, and the register 18 can then be updated from the counter 19 . You set the counter 17 to zero and start it again. Return to step 304 of waiting for TE to expire.

The cycle continues until step 305 determines that the wake-up time for the mobile phone has now come.

The method of FIG. 3 has been described with counters 17 and 19 which are incremented, but the same method could also be provided with counters which are decremented. The operations are also carried out by the microprocessor 12 . In a variant of the invention, they could be implemented by the circuit 21 .

Fig. 4 illustrates in a chronograph the assignment and synchronization of different elements or steps of the mobile phone during standby mode. A first line 401 shows the general activity of the mobile phone, a second line 402 shows the general activity of the timer 6 , a third line 403 shows the frequency and duration of the synchronizations, a fourth line 404 shows the duration and frequency of the calculations of the standby parameters .

Before switching to the standby mode, a synchronization 405 is carried out, followed by a calculation 406 of the parameters for switching to the standby mode and then the switching to the standby mode of the mobile telephone, which follows the switching off 408 of the fast oscillator 6 corresponds. After an intermediate synchronization duration TR and a duration of the construction of the oscillator 6 , ie at a point in time 409 , the oscillator 6 is reactivated for a duration 410 which is somewhat shorter than a duration of a subsequent synchronization 411 . The end of the synchronization 411 corresponds to a calculation 412 of the new parameters. The cycle is repeated until the mobile phone is woken up 413 . This wake-up 413 is preceded by a wake-up 414 of the oscillator 6 in order to give the oscillator 6 time to stabilize.

Claims (10)

1. Mobile device ( 1 ) comprising:

• an integrated processing circuit ( 2 ), which is required to activate the mobile device,
• - devices ( 4 , 8 , 9 , 12 ) that switch this device to standby and active modes,
• - Two oscillators ( 6 , 10 ) for clocking the activity of the integrated processing circuit, a first, slow oscillator ( 10 ), which is used in a standby mode, and a second, fast oscillator ( 6 ), which is used in an active mode becomes,
  characterized in that
• - The slow oscillator is an RC oscillator and is included in the processing circuit.

2. Device according to claim 1, characterized in that the slow Oscillator is integrated into an integrated circuit that is in the device is included. 3. Device according to one of claims 1 or 2, characterized in that it has a counter ( 17 ) whose development is clocked by the slow oscillator. 4. Device according to one of claims 1 to 3, characterized in that it comprises devices ( 12 , 4 , 18 , 19 ) for measuring a frequency change of the slow oscillator. 5. Device according to one of claims 1 to 4, characterized in that it comprises a high-speed counter ( 19 ) which works together with the high-speed oscillator. 6. Device according to one of claims 1 to 5, characterized in that it comprises a memory register ( 18 ) for storing a measurement of a frequency change of the slow oscillator. 7. Device according to one of claims 1 to 6, characterized in that the slow oscillator comprises a reversing switch ( 14 ), the sen input is connected to a potential by means of a capacitor ( 16 ) and the output of which is connected to the input by means of a resistor ( 15 ) is created. 8. Device according to one of claims 1 to 7, characterized in that the slow oscillator comprises a voltage-controlled oscillator ( 201 ), the output of which is connected to a low-pass filter ( 202 ), in cascade with a first input of a voltage comparator ( 203 ), a second input of the comparator is connected to a reference voltage generator ( 204 ), the output of the comparator is applied to the control input of the voltage-controlled oscillator. 9. A method for controlling a standby mode of a mobile device ( 1 ), in which:

• - the device is operated in active mode using a fast, known, stable oscillator ( 6 ),
• a wake-up time is provided for a standby mode of the device, this time being stored in a register ( 18 ),
• - one calculates useful parameters for the control of the standby mode and stores them in a memory ( 20 ),
• - You bring the device into standby mode and at the intended wake-up time with the help of a slow oscillator ( 10 ) back into active mode, characterized in that
• - shortly before the transition to standby mode and regularly during this standby mode:
• - synchronized a slow RC oscillator with the fast oscillator,
• stores the result of the synchronization in a register,
• - provides a period between two synchronizations,
• - The slow RC oscillator resynchronized at the end of the period between two synchronizations.

10. The method according to claim 9, characterized in that:

• - Provides the duration of the period between two synchronizations by a counter, and one
• - every time the counter reaches a threshold:
• - turns on the fast oscillator,
• - synchronized the slow RC oscillator with the fast oscillator,
• - The result of the synchronization with that of a previous synchronization and adjusts the duration of the time between two synchronizations depending on the difference between these results, the greater the difference, the shorter the duration of the time between two synchronizations.