CN2682578Y - Chip bearing device - Google Patents
Chip bearing device Download PDFInfo
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- CN2682578Y CN2682578Y CN 200420001821 CN200420001821U CN2682578Y CN 2682578 Y CN2682578 Y CN 2682578Y CN 200420001821 CN200420001821 CN 200420001821 CN 200420001821 U CN200420001821 U CN 200420001821U CN 2682578 Y CN2682578 Y CN 2682578Y
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Abstract
一种芯片承载装置包括一承载部,具有多条分隔肋自其上表面凸出,且形成有多个容置空间以容置芯片,每一容置空间的底部设有至少一贯穿孔;一叠合部,分别由该承载部的侧面底部向外且向下延伸,且形成一与该承载部配合的叠合空间;一可封闭的抽气结构,设置于该叠合部的一侧壁;及一密封膜,设置于该抽气结构下方且连接该叠合空间的内侧表面。
A chip carrying device includes a carrying part, which has a plurality of partition ribs protruding from its upper surface, and is formed with a plurality of accommodating spaces for accommodating chips, and the bottom of each accommodating space is provided with at least one through hole; a stack of The joint part extends outward and downward from the side bottom of the bearing part respectively, and forms a superimposed space matched with the bearing part; a closeable air suction structure is arranged on the side wall of the superimposed part; and a sealing film, which is arranged under the air pumping structure and connected to the inner surface of the overlapping space.
Description
技术领域technical field
本实用新型涉及一种芯片承载装置,特别指用以承载未封装的芯片的装置,以储存及运输芯片。The utility model relates to a chip carrying device, in particular to a device for carrying unpackaged chips for storing and transporting the chips.
背景技术Background technique
半导体集成电路(Integrated Circuit,IC)工业被视为是“点沙成金”的科技,利用还原、纯化的方法获得高纯度的硅,再经熔化、生长、切割、表面处理等过程,得到一片片圆形的“硅晶片”薄片。广义的半导体集成电路技术包含电路设计、光罩制作、晶片制造、测试与封装等部分。半导体产业发展至今已经逐渐成为垂直分工的产业模式,发展出无晶片厂的专业IC设计公司及专业晶片代工服务的分工领域。IC设计公司专注于产品结构的设计、产品效能及品质的提升,而晶片代工工厂则提供优异的集成电路制造服务以作为后盾。The semiconductor integrated circuit (Integrated Circuit, IC) industry is regarded as a technology that "turns sand into gold". It uses reduction and purification methods to obtain high-purity silicon, and then undergoes processes such as melting, growth, cutting, and surface treatment to obtain pieces of silicon. Circular thin slices of "silicon wafers". Semiconductor integrated circuit technology in a broad sense includes circuit design, mask making, chip manufacturing, testing and packaging. The development of the semiconductor industry has gradually become an industrial model of vertical division of labor, and the division of labor of professional IC design companies without chip factories and professional chip foundry services has been developed. IC design companies focus on product structure design, product performance and quality improvement, while chip foundries provide excellent integrated circuit manufacturing services as a backing.
就制造过程概略的说,IC设计完成后交予晶片代工厂制造,在晶片完成后需要进行芯片切割(Die Saw),目的为将前制程加工完成的晶片上一颗颗的晶粒(die)切割分离。又需要将晶片送至芯片包装厂切割、封装,最终再经过电测试。因此IC组件的生产过程愈来愈需要重视在工厂之间储藏及运输的问题,在储藏及运送过程势必要有周密保护措施的承载装置,以避免储藏及运送过程中不必要的损坏。尤其是封装前是芯片最脆弱的阶段,只要稍有静电或震动就可能使芯片受损。As far as the manufacturing process is concerned, after the IC design is completed, it is handed over to the chip foundry for manufacturing. After the chip is completed, chip cutting (Die Saw) is required, the purpose is to separate the dies on the chip that has been processed by the previous process. Cut and separate. In addition, the wafer needs to be sent to the chip packaging factory for cutting, packaging, and finally electrical testing. Therefore, the production process of IC components needs to pay more and more attention to the problem of storage and transportation between factories. During the storage and transportation process, it is necessary to have a carrying device with careful protection measures to avoid unnecessary damage during storage and transportation. Especially before packaging is the most fragile stage of the chip, as long as there is a little static electricity or vibration, the chip may be damaged.
请参阅图1至图3,分别为公知技术中的芯片承载装置的俯视图、仰视图及侧面剖视图。该芯片承载装置9,或称芯片匣(Chip tray),为塑料材质制成,其具有一矩形的承载部91及一叠合部95由该承载部91周围向外向下延伸。该承载部91具有多条分隔肋92自其上表面突起,而形成有多个格栅状的容置空间93以容置芯片94。该叠合部95形成有一叠合空间96供另一个芯片承载装置9以堆栈的方式容置于其下方,两芯片承载装置9之间加上一片防静电膜97以保护芯片,避免因静电而毁损。公知技术的该芯片承载装置9通常以六个为一单位层层堆栈,以利储藏及运输。其只在平面上限制芯片94在一预定的范围内,而无法固定芯片94在X和Y方向上,更无法在垂直的Z方向上固定芯片。并且芯片94的金属线路是向上摆置,在运输过程中遇到摇晃或震动的状况,更是容易刮伤芯片94而造成损坏,使得完成的芯片功亏一篑,影响封装和最终测试。Please refer to FIG. 1 to FIG. 3 , which are respectively a top view, a bottom view and a side sectional view of a chip carrier device in the prior art. The chip carrying device 9, or called a chip tray (Chip tray), is made of plastic material, and has a rectangular carrying
由上可知,上述公知的芯片承载装置,在实际使用中,显然具有不便与缺陷存在,而有待加以改善。It can be seen from the above that the above-mentioned known chip carrying device obviously has inconveniences and defects in actual use, and needs to be improved.
发明内容Contents of the invention
本实用新型的主要目的是提供一种芯片承载装置,能使芯片固定于X、Y、Z方向上,以利储存及运输芯片,并且避免芯片在运输过程中被刮伤。The main purpose of the utility model is to provide a chip carrying device, which can fix the chips in X, Y, and Z directions, facilitate the storage and transportation of the chips, and prevent the chips from being scratched during transportation.
为达上述目的,本实用新型提供一种芯片承载装置,包括一承载部,具有多条分隔肋自其上表面凸出且形成有多个容置空间以容置芯片,每一容置空间的底部设有至少一贯穿孔;一叠合部,分别由该承载部的侧面底部向外且向下延伸且形成与该承载部配合的叠合空间;一可封闭的抽气结构,设置于该叠合部的一侧壁;及一密封膜,设置于该抽气结构下方且连接该叠合空间的内侧表面。In order to achieve the above purpose, the utility model provides a chip carrying device, which includes a carrying part with a plurality of partition ribs protruding from its upper surface and forming a plurality of accommodating spaces for accommodating chips, each accommodating space The bottom is provided with at least one through hole; a stacking part extends outward and downward from the side bottom of the bearing part respectively and forms a stacking space matched with the bearing part; a closeable air extraction structure is arranged on the stacking part a side wall of the combined part; and a sealing film, which is arranged under the air pumping structure and connected to the inner surface of the overlapping space.
于是,本实用新型提出了一种设计合理且有效改善上述缺陷的芯片承载装置,以改善芯片运输时无谓的损坏。兹配合附图将本实用新型的较佳实施例详细说明如下,但是此说明仅用来说明本实用新型,而非对本实用新型的权利范围作任何的限制。Therefore, the utility model proposes a chip carrying device with a reasonable design and can effectively improve the above-mentioned defects, so as to improve the needless damage of the chip during transportation. The preferred embodiments of the present utility model are described in detail below in conjunction with the accompanying drawings, but this description is only used to illustrate the present utility model, not to limit the scope of rights of the present utility model.
附图说明Description of drawings
图1为公知技术芯片承载装置的俯视图。FIG. 1 is a top view of a chip carrying device in the prior art.
图2为公知技术芯片承载装置的仰视图。Fig. 2 is a bottom view of a chip carrying device in the prior art.
图3为公知技术芯片承载装置的侧面剖视图。Fig. 3 is a side sectional view of a conventional chip carrier device.
图4为本实用新型的芯片承载装置的立体剖视图。FIG. 4 is a three-dimensional cross-sectional view of the chip carrying device of the present invention.
图4A为图4中A部分抽气结构的第一实施例的侧面剖视图。FIG. 4A is a side cross-sectional view of the first embodiment of the air pumping structure at part A in FIG. 4 .
图4B为图4中A部分抽气结构的侧视图。FIG. 4B is a side view of the air pumping structure of part A in FIG. 4 .
图4C为本实用新型中抽气结构第二实施例的侧面剖视图。Fig. 4C is a side sectional view of the second embodiment of the air pumping structure in the present invention.
图4D为本实用新型中抽气结构第二实施例的侧视图。Fig. 4D is a side view of the second embodiment of the air pumping structure in the present invention.
图4E为本实用新型中抽气结构第三实施例的侧面剖视图。Fig. 4E is a side sectional view of the third embodiment of the air pumping structure in the present invention.
图4F为图4中F部分另一实施例的侧面剖视图。FIG. 4F is a side sectional view of another embodiment of part F in FIG. 4 .
图5为本实用新型的芯片承载装置的俯视图。FIG. 5 is a top view of the chip carrying device of the present invention.
图6为本实用新型的芯片承载装置的仰视图。Fig. 6 is a bottom view of the chip carrying device of the present invention.
图7为本实用新型的芯片承载装置抽气后的侧面剖视图。Fig. 7 is a side cross-sectional view of the chip carrying device of the present invention after air extraction.
图8为本实用新型的芯片承载装置放气后的侧面剖视图。Fig. 8 is a side sectional view of the deflated chip carrier device of the present invention.
图9为本实用新型的芯片承载装置堆栈组合的侧面剖视图。FIG. 9 is a side cross-sectional view of the chip carrier stack assembly of the present invention.
其中,附图标记说明如下:Wherein, the reference signs are explained as follows:
97 防静电膜97 Antistatic film
9 芯片承载装置9 Chip carrying device
91 承载部 92 分隔肋91 Bearing
93 容置空间 94 芯片93 Accommodating
95 叠合部 96 叠合空间95
1 芯片承载装置 10 承载部1
11 芯片 12 分隔肋11
14 容置空间 16 贯穿孔14 Accommodating
18 垫片 182 穿孔18 Gasket 182 Perforation
20 叠合部 22 叠合空间20 Overlapping
24 止挡凸块 26 固定环24
30、30’ 抽气结构 31 抽气部30, 30’
32 密封孔 33 卡合槽32
34 密封柱 35 操作孔34
36、37 抽气孔 370 抽气口36, 37
40 密封膜40 sealing film
50 抽气结构50 Suction structure
52 密封孔52 sealing hole
522 膨涨部 524 信道部
54 密封柱54 Sealing column
542 填封部 544 拔出部542
546 止挡部 548 密封环546
56 抽气孔56 Air extraction hole
562 抽气口 564 抽气工具562
h1、h2 高度h1, h2 height
具体实施方式Detailed ways
请参阅图4至图6,分别为本实用新型的芯片承载装置的立体剖视图、俯视图、及去掉密封膜的仰视图。该芯片承载装置1包括一承载部10、一叠合部20设于该承载部10的下方周围、一可封闭的抽气结构30设置于该叠合部20的一侧壁、及一密封膜40设置于该抽气结构30下方且置于该叠合部20的里面。Please refer to FIG. 4 to FIG. 6 , which are respectively a three-dimensional sectional view, a top view, and a bottom view with the sealing film removed of the chip carrier device of the present invention. The
该承载部10具有多条分隔肋12自其上表面凸出且形成有多个格栅状的容置空间14以容置芯片,每一容置空间14的底部设有至少一贯穿孔16。该容置空间14视芯片的尺寸而有所不同。The carrying
该叠合部20分别由该承载部10的侧面下缘向外且向下延伸,因此形成一与该承载部10配合的叠合空间22,藉此另一芯片承载装置1的承载部10可以容置于该叠合空间22内并且堆栈于该叠合部20的下方。其中该承载部10凸出该叠合部20的顶面的高度h1等于或小于该密封膜40距离该叠合部20的底面的高度h2。The stacking
该叠合部20可进一步设置有一止挡凸块24自其内侧表面向内凸出,其中该止挡凸块24的底面距离该叠合部20的底面的高度h2等于该承载部10凸出该叠合部20的顶面的高度h1。该止挡凸块24可以是多块或者可以是环绕状设置。The overlapping
请参阅图7所示,为本实用新型的芯片承载装置抽气后的侧面剖视图。该抽气结构30为至少一个设置于该叠合部20的一侧壁内,其功用在于芯片11置入该承载部10的容置空间14后,可将在该叠合部20和该密封膜40之间的空气抽出来并将其密封住,使得芯片11因真空状态而被吸附固定于该容置空间14的底面。其中该密封膜40呈一绷紧状态设于该抽气结构30下方且密封住该叠合空间22。本实用新型中的该密封膜40的材质,可以是防静电材质或普通材质皆可。Please refer to FIG. 7 , which is a side cross-sectional view of the chip carrying device of the present invention after air extraction. The
为了避免芯片11与该容置空间14的底面之间产生空隙而致使空气的泄露,其中该承载部10的该容置空间14可设为光滑的底面。或者,请参阅图4F,为图4中F部分另一实施例的放大图。该承载部10的该容置空间14底部可以进一步设置一具弹性的垫片18,该垫片18设有配合该贯穿孔16的穿孔182。该垫片18由于与芯片11直接接触,最好以具有可防静电的材质所制成。In order to avoid air leakage caused by a gap between the
请参阅图4A及图4B,分别为图4中A部分的放大图及其侧视图,其为本实用新型中抽气结构的第一实施例。该可封闭的抽气结构30设置于该叠合部20的该止挡凸块24内,其主要包括有一密封孔32设置于该叠合部20内且连通该叠合空间22,一由弹性塑料材料制成的密封柱34横向滑设于该叠合部20内以于抽气后封住该密封孔32,及至少一个抽气孔36连通该密封孔32。其中该抽气孔36水平地设置于该叠合部20内且环绕于该密封孔32的周围,该抽气孔36连通至该叠合部20的外侧表面以供抽气。Please refer to FIG. 4A and FIG. 4B , which are an enlarged view and a side view of part A in FIG. 4 respectively, which are the first embodiment of the air extraction structure in the present invention. The closable
请参阅图4C及图4D,分别为本实用新型中抽气结构的第二实施例的侧面剖视图及侧视图。为了考量塑料制造的模具设计方便,该抽气结构30’具有密封孔32设置于该叠合部20内且连通该叠合空间22、一卡合槽33连通该密封孔32且连通至外界、及一分开式可抽取空气的抽气部31卡合于该卡合槽33内,如此于模具设计时更为便利。该抽气部31具有一操作孔35以供该密封柱34滑设于内及一抽气孔37水平地设于该操作孔35外围。该抽气孔37进一步可于外端设一抽气口370供插接一抽气工具以抽取空气。Please refer to FIG. 4C and FIG. 4D , which are respectively a side sectional view and a side view of the second embodiment of the air pumping structure in the present invention. In order to consider the convenience of mold design made of plastic, the air pumping structure 30' has a sealing
请参阅图4E,为本实用新型中抽气结构的第三实施例的侧面剖视图。为了考量塑料制造的模具设计成本,该抽气结构50也可以是一体成型于该叠合部内,其主要包括有一密封孔52设置于该叠合部20内且连通该叠合空间22与外界、一密封柱54滑设于该密封孔52内、及一抽气孔56连通该密封孔52。该密封孔52具有一连于外界的膨涨部522及一由膨涨部522向叠合空间22延伸的信道部524;该密封柱54由弹性塑料材料制成,具有一相对应于该膨涨部522内的填封部542以于抽气后卡入该密封孔52的该膨涨部522、一拔出部544形成于该填封部542的末端及一止挡部546设于其另一端;该抽气孔56连通该密封孔52的膨涨部522。其中该抽气孔56向上垂直地设置于该叠合部20内,且可进一步形成一抽气口562于该叠合部20的上表面以插接一抽气工具564。其中该密封柱54进一步可设一密封环548于该拔出部544及该填封部542之间,以加强密封的效果。Please refer to FIG. 4E , which is a side sectional view of the third embodiment of the air pumping structure in the present invention. In order to consider the mold design cost of plastic manufacturing, the
该叠合部20可以进一步具有一卡合于其下方的固定环26,该固定环26夹持固定该密封膜40于该叠合部20上。或者,该固定环26也可以黏合的方式黏固于该叠合部20下方,该固定环26黏合固定该密封膜40于该叠合部20上。或者,该密封膜40可以是以黏合的方式连接于该叠合部20内侧表面或者于该止挡凸块24的底面,如图4A所示。The overlapping
请参阅图8,当要取出芯片11时,只要将该密封柱34拔出,空气由该密封孔32进入该叠合部20及该密封膜40之间,该芯片承载装置1即可恢复原状。芯片11不再被吸附固定而可以取出。Please refer to FIG. 8 , when the
请参阅图9,为本实用新型芯片承载装置堆栈组合的侧面剖视图。本实用新型的芯片承载装置1在抽气密封后,可以彼此堆栈组合以节省空间。由于本实用新型中的芯片11因真空已被吸附固定于容置空间14内,不会有因摩擦而产生静电的情况,原则上不一定需要再于芯片承载装置1之间设置防静电膜,如此可节省防静电膜的成本。Please refer to FIG. 9 , which is a side cross-sectional view of the stacked assembly of the chip carrying device of the present invention. After the
因此藉由本实用新型的芯片承载装置可以在X、Y、Z方向上固定芯片,进而避免芯片在运输过程中被刮伤。即使运输过程中摇晃或震动时,芯片仍安全地被固定,有效提升封装和最终测试的良好率。其比起先前技术已具有优越的特点及功能。Therefore, the chip carrying device of the present invention can fix the chips in X, Y, and Z directions, thereby preventing the chips from being scratched during transportation. Even when shaken or shaken during transportation, the chip is still securely fixed, effectively improving the good rate of packaging and final testing. It has superior features and functions compared to the prior art.
以上所述,仅为本实用新型的较佳实施例而已,不能以此限定本实用新型的权利范围,因此依本实用新型申请范围所做的均等变化或修饰,仍属本实用新型所涵盖的范围。The above is only a preferred embodiment of the utility model, and cannot limit the scope of rights of the utility model. Therefore, equal changes or modifications made according to the application scope of the utility model are still covered by the utility model. scope.
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CN 200420001821 CN2682578Y (en) | 2004-01-05 | 2004-01-05 | Chip bearing device |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110061069A (en) * | 2019-04-30 | 2019-07-26 | 烟台艾睿光电科技有限公司 | A kind of WLP device encapsulating products |
CN110985520A (en) * | 2019-12-24 | 2020-04-10 | 扬州海科电子科技有限公司 | Vacuum base for chip self-adsorption gel tray |
CN114823460A (en) * | 2021-01-28 | 2022-07-29 | 斯托克精密科技股份有限公司 | Chip transfer module, chip transfer and die bonding device and method |
-
2004
- 2004-01-05 CN CN 200420001821 patent/CN2682578Y/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110061069A (en) * | 2019-04-30 | 2019-07-26 | 烟台艾睿光电科技有限公司 | A kind of WLP device encapsulating products |
CN110985520A (en) * | 2019-12-24 | 2020-04-10 | 扬州海科电子科技有限公司 | Vacuum base for chip self-adsorption gel tray |
CN114823460A (en) * | 2021-01-28 | 2022-07-29 | 斯托克精密科技股份有限公司 | Chip transfer module, chip transfer and die bonding device and method |
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