CN2475099Y - Controlling signal decision mechanism for static data memory - Google Patents
Controlling signal decision mechanism for static data memory Download PDFInfo
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- CN2475099Y CN2475099Y CN 01216727 CN01216727U CN2475099Y CN 2475099 Y CN2475099 Y CN 2475099Y CN 01216727 CN01216727 CN 01216727 CN 01216727 U CN01216727 U CN 01216727U CN 2475099 Y CN2475099 Y CN 2475099Y
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- control system
- data memory
- static data
- selected control
- sheet selected
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Abstract
Disclosed is a controlling signal determining means for static data memory, wherein a controlling signal determining means is added between the digital application means and the static data memory so that the data stored in the static data memory can be integrally and accurately preserved in electricity restarting status after the digital application means is powered off.
Description
The utility model relates to the static data memory.
Static data memory (SRAM) is to be widely used in the digital display circuit, carries out a kind of important devices of data-storing.Because the power down volatibility of static data memory stored data in actual applications, often adopts standby power supply to the static data memory, preventing after system's primary power source de-energizes, the losing of its stored data.This conventional circuit of using as shown in Figure 1.
Among Fig. 1, the digital application device comprises that as the connecting line of microprocessor (CPU) and static data memory (SRAM) address bus, data bus, sheet select control line and read/write control line.Select at correct sheet under the effect of control line and read/write control line, the data of static data memory are read or write operation.
In routine is used, after system's primary power source de-energizes, in the process that restarts that powers on again, because the initial stage instability of primary power, the variation of its pin status when microprocessor resets with initialization, and the noise jamming that is produced on the line between microprocessor and static data memory influence, often causing the confusion of stored data in the static data memory, the work after making application system power on to restart is undesired.
Data in the data memory change, and must be that corresponding sheet selects on control line and the read/write control line and produced unnecessary level signal.As if the level of one of above-mentioned control line of energy positive lock, just can guarantee the integrality of stored data in the static data memory, starting point of the present utility model that Here it is.
The purpose of this utility model will overcome the conventional abnormal conditions that is occurred of using exactly, guarantees the data integrity of stored data in the heavy electrifying startup process of system in the static data memory.
The technical solution of the utility model is to increase by a control signal decision maker between digital application device and static data memory, make data in the static data memory, in the process of restarting that powers on behind the digital application system cut-off, be able to complete maintenance correctly.
Referring to Fig. 2.The utility model is achieved in that the sheet between digital application device (as microprocessor 2) and static data memory 1 selects between the control line line, serial connection sheet selected control system signal determining device 3.The primary power incoming end of this chip selection signal decision maker 3 links to each other with the standby power supply output terminal with primary power respectively with the standby power supply incoming end, sheet selected control system signal input part can insert the sheet selected control system signal that digital application device (CPU2) provides, and sheet selected control system signal output part links to each other with the sheet selected control system input end of static data memory 1.
The effect of sheet selected control system signal determining device 3 is such: when having only the sheet selected control system signal that provides when primary power and digital application device (CPU2) all to stablize, just make the sheet choosing end of static data memory 1 obtain sheet selected control system signal.
When primary power disconnects, the sheet selected control system input end of sheet selected control system signal determining device 3 was had under the undesired level signal situation; Or normal at primary power, under the situation of output chip selected control system signal, the sheet selected control system output terminal of sheet selected control system signal determining device 3 all can not produce the sheet selected control system signal that 1 of static data memory is selected input end to digital application device (CPU2).Like this, just guarantee static data memory 1 is carried out the correctness of reading and writing operation, also just guaranteed the data integrity in the heavy electrifying startup process of system.
Below to the description of embodiment, to further specify thought of the present utility model.
Fig. 1 is the conventional line synoptic diagram of static data memory and microprocessor;
Fig. 2 is the static data memory of the utility model band decision maker and the line synoptic diagram of microprocessor;
Fig. 3 is the enforcement circuit diagram of the utility model control signal decision maker.
Referring to Fig. 3.In the present embodiment, constitute the circuit of chip selection signal decision makers with NPN triode Q301 and peripheral resistance R 301, R302, capacitor C 301.Wherein, the end of resistance R 301 and R302 links to each other with primary power and standby power supply respectively, the emitter of triode Q301 is as sheet selected control system input end, link to each other with the sheet selected control system output terminal of digital application device, the node of its collector and resistance R 302 is as sheet selected control system signal determining output terminal, the sheet that is connected to static data memory chip U301 selects input end, and capacitor C 301 is connected on the sheet selected control system signal determining output terminal of triode Q301 collector node, can further improve the reliability of judgement.
Because standby power supply is connected to the collector of triode Q301 all the time through resistance R 302, triode Q301 is under the condition of possibility conducting, if triode Q301 conducting, must main power voltage appear in its base stage, and its emitter sheet selected control system signal of existing the digital application device to send.In addition, work as primary power source de-energizes, or main power voltage do not reach stable before, when low level selected control system signal do not appear in its sheet selected control system signal input part that is connected to the digital application device, its chip selection signal output terminal that is connected to static data memory U301 just low level can not occur, this has just been avoided powering on the starting stage during primary power source de-energizes or at primary power, the voltage fluctuation of primary power end is disturbed and is selected input end to cause the appearance of " false sheet choosing " situation to static data memory U301 sheet, has also just prevented the destruction to static data memory U301 stored data effectively.In these cases, both made static data memory U301 read/write control input end unnecessary write signal occur, also can't carry out " writing " operation, and so just made the data of storage in the sheet obtain complete preservation static data memory U301.Have only and work as under the stable situation of primary power, and the digital application device sends effective chip selection signal, can make the collector voltage step-down of triode Q301, make static data memory U301 obtain authentic and valid sheet selected control system input signal, just can carry out smoothly the reading and writing of static number memory U301 data.
In the foregoing description,, under thought guidance of the present utility model, also can construct slice selected control system signal and be the circuit of the sheet selected control system signal determining device of high level when effective though the required sheet selected control system signal of static data memory is that low level is effective.
Claims (2)
1, a kind of static data memory control signal decision maker, it is characterized in that the sheet between digital application device and static data memory selects between the control line line, serial connection sheet selected control system signal determining device, the primary power incoming end of this chip selection signal decision maker links to each other with the standby power supply output terminal with primary power respectively with the standby power supply incoming end, sheet selected control system signal input part can insert the sheet selected control system signal that the digital application device provides, and sheet selected control system signal output part links to each other with the sheet selected control system input end of static data memory 1.
2, a kind of static data memory control signal decision maker according to claim 1 is characterized in that constituting with NPN triode Q301 and peripheral resistance R 301, R302, capacitor C 301 circuit of chip selection signal decision makers; Wherein, the end of resistance R 301 and R302 links to each other with primary power and standby power supply respectively, the emitter of triode Q301 is as sheet selected control system input end, link to each other with the sheet selected control system output terminal of digital application device, the node of its collector and resistance R 302 is as sheet selected control system signal determining output terminal, the sheet that is connected to static data memory chip U301 selects input end, and capacitor C 301 is connected on the sheet selected control system signal determining output terminal of triode Q301 collector node.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01216727 CN2475099Y (en) | 2001-02-28 | 2001-02-28 | Controlling signal decision mechanism for static data memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01216727 CN2475099Y (en) | 2001-02-28 | 2001-02-28 | Controlling signal decision mechanism for static data memory |
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| Publication Number | Publication Date |
|---|---|
| CN2475099Y true CN2475099Y (en) | 2002-01-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 01216727 Expired - Fee Related CN2475099Y (en) | 2001-02-28 | 2001-02-28 | Controlling signal decision mechanism for static data memory |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280151A (en) * | 2013-06-14 | 2016-01-27 | 青岛海信电器股份有限公司 | Gamma correction snubber circuit and anti-interference method for the gamma correction snubber circuit |
-
2001
- 2001-02-28 CN CN 01216727 patent/CN2475099Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280151A (en) * | 2013-06-14 | 2016-01-27 | 青岛海信电器股份有限公司 | Gamma correction snubber circuit and anti-interference method for the gamma correction snubber circuit |
| CN105280151B (en) * | 2013-06-14 | 2019-01-29 | 青岛海信电器股份有限公司 | Gamma correction buffer circuit and anti-interference method for Gamma correction buffer circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: XIAMEN OVERSEAS CHINESE ELECTRONIC ENTERPRISE CO. Free format text: FORMER OWNER: HUAQIAO ELECTRONIC ENTERPRISE CO., LTD., XIAMEN Effective date: 20070119 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20070119 Address after: 361006, Huang Hongtao, 22 Huli Avenue, Fujian, Xiamen Patentee after: Xiamen Overseas Chinese Electronic Co., Ltd. Address before: 361006, Huang Hongtao, 22 Huli Avenue, Fujian, Xiamen Patentee before: Xiamen Huaqiao Electronic Enterprise Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20020130 |