CN223024424U - Optical Components on Board Devices, Master Gateways and FTTR Systems - Google Patents
Optical Components on Board Devices, Master Gateways and FTTR Systems Download PDFInfo
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- CN223024424U CN223024424U CN202421743420.4U CN202421743420U CN223024424U CN 223024424 U CN223024424 U CN 223024424U CN 202421743420 U CN202421743420 U CN 202421743420U CN 223024424 U CN223024424 U CN 223024424U
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Abstract
The application provides an optical component on-board device, a main gateway and FTTR systems, belonging to the technical field of optical communication. The optical assembly comprises a receiving assembly and a single board in the board device, wherein the plurality of pins of the receiving assembly comprise reset pins, the distance between every two pins meets the direct-insert welding condition, and the receiving assembly can be directly insert welded with the single board through the plurality of pins.
Description
Technical Field
The application relates to the technical field of optical communication, in particular to an optical assembly on-board device, a main gateway and FTTR systems.
Background
With the technological development of fiber optic communications, fiber-to-room (Fiber To The Room, FTTR) technology has evolved to meet the better internet surfing needs of users. In FTTR technology, a home is deployed with a main gateway and a plurality of sub-gateways, the main gateway is connected with an in-home optical fiber, the main gateway is connected with the plurality of sub-gateways through optical fibers, and each sub-gateway is located in a room. The main gateway comprises a first Optical component on-board device and a second Optical component on-board device, wherein the first Optical component on-board device is connected with an Optical line terminal (Optical LINE TERMINAL, OLT) through a home-entering Optical fiber and is continuously received, and the second Optical component on-board device is connected with each sub-gateway. In the uplink communication, each sub-gateway transmits an optical signal to the second optical component in time division in the board device, the second optical component receives the optical signal transmitted by each sub-gateway in burst in the board device, converts the optical signal into an electrical signal, transmits the electrical signal to the first optical component in the board device, modulates the electrical signal into an optical signal in the board device, and transmits the optical signal to the OLT.
In the existing primary gateway, signals with transmission rate below 10G are generally transmitted, and the second optical component adopts 5 pins in the board device, but with the development of optical fiber communication technology, optical signals with transmission rate above 10G and 10G may also be transmitted, so that it is necessary to provide an optical component on the board device that receives optical signals above 10G and 10G in a burst manner.
Disclosure of utility model
The application provides an optical component on-board device, a main gateway and FTTR system, which can realize burst receiving of high-speed optical signals and adopts the following technical scheme:
In a first aspect, the present application provides an optical component on-board device, where the optical component on-board device includes a receiving component and a single board, the receiving component includes a plurality of pins, the plurality of pins includes a reset pin, a center distance between every two pins satisfies a direct-insert welding condition, and the receiving component is directly insert welded with the single board through the plurality of pins.
In the scheme shown in the application, the center distance of each two pins in the receiving assembly meets the direct-insert welding condition, so that the receiving assembly and the single board can be fixedly connected through direct-insert welding. In addition, in the receiving component, a reset pin exists in a plurality of pins, so that the reset processing can be rapidly performed, and the high-speed optical signal is received in a burst mode.
In an alternative way, the in-line welding condition is that the minimum center distance between the pins is greater than 1.17mm, so that the pins do not influence each other when the pins are in-line welding with the single board.
In an alternative manner, the number of the plurality of pins is 6, and the plurality of pins further comprises a power pin, a photodiode power pin, a pair of high-speed signal pins and a ground pin, wherein the pair of high-speed signal pins are symmetrical with respect to the ground pin.
In an alternative manner, the reset pin is adjacent to a positive pin of the pair of high speed pins and adjacent to the photodiode power pin, the power pin is adjacent to the photodiode power pin and adjacent to a negative pin of the pair of high speed pins, or the reset pin is adjacent to the positive pin and adjacent to the power pin, and the photodiode power pin is adjacent to the power pin and adjacent to the negative pin. In this way, a possible distribution of the plurality of pins is provided.
In an alternative manner, the distance between the center of the ground pin and the center of the positive pin is 1.46mm, and the distance between the center of the reset pin and the center of the positive pin is 1.40mm. In this way, a possible distance between pins is provided.
In an alternative manner, the reset pin is adjacent to a negative pin of the pair of high speed pins and adjacent to a power pin, the photodiode power pin is adjacent to a positive pin of the pair of high speed pins and adjacent to the power pin, or the reset pin is adjacent to the negative pin and adjacent to the photodiode power pin, and the power pin is adjacent to the positive pin and adjacent to the photodiode power pin. In this way, a possible distribution of the plurality of pins is provided.
In an alternative manner, the reset pin is adjacent to the power pin and adjacent to a photodiode power pin, the photodiode power pin is adjacent to a positive pin of the pair of high speed pins, the power pin is adjacent to a negative pin of the pair of high speed signal pins, or the reset pin is adjacent to the power pin and adjacent to the photodiode power pin, the power pin is adjacent to the positive pin, and the photodiode power pin is adjacent to the negative pin. In this way, a possible distribution of the plurality of pins is provided.
In an alternative manner, the first distance is greater than the second distance and greater than the third distance, the first distance is a center distance between the ground pin and the positive pin, the second distance is a center distance between the positive pin and a pin other than the ground pin in the adjacent pins, and the third distance is a center distance between the negative pin and a pin other than the ground pin in the adjacent pins.
In the scheme shown in the application, the heat dissipation of the grounding pin is faster, so that the distance between the grounding pin and the centers of other pins is set to be larger, and the connection of tin is prevented.
In an alternative manner, the receiving component is a receiving component for receiving optical signals at transmission rates of 10G and above.
In a second aspect, the application provides a primary gateway comprising the optical assembly of the first aspect, or in any alternative of the first aspect, in a panel arrangement.
In a third aspect, the present application provides a system FTTR, the system FTTR comprising a main gateway and a sub-gateway, the main gateway including the first aspect, or an optical component in any optional manner of the first aspect, the main gateway being connected to the sub-gateway through the optical component in the board device, and the main gateway being configured to connect to an in-home optical fiber.
In the scheme shown in the application, in the board device of the optical component connected with the main gateway and the sub-gateway, the plurality of pins included in the receiving component comprise reset pins, the center distance of each two pins meets the direct-insert welding condition, and the receiving component can be directly insert welded with the single board through the plurality of pins, so that the fixed connection between the receiving component and the single board can be realized through direct-insert welding, and the reset pins exist, and the reset processing can be rapidly carried out, thereby enabling the main gateway to receive high-speed optical signals in a burst mode.
Drawings
FIG. 1 is a schematic diagram of an optical communication system provided by an exemplary embodiment of the present application;
FIG. 2 is a schematic diagram of an optical assembly on board apparatus according to an exemplary embodiment of the present application;
Fig. 3 is a schematic diagram of a receiving assembly according to an exemplary embodiment of the present application;
FIG. 4 is a schematic diagram of the distribution of pins provided by an exemplary embodiment of the present application;
FIG. 5 is a schematic diagram of the distribution of pins provided by another exemplary embodiment of the present application;
FIG. 6 is a schematic diagram of the distribution of pins provided by yet another exemplary embodiment of the present application;
FIG. 7 is a schematic diagram of the distribution of pins provided by yet another exemplary embodiment of the present application;
FIG. 8 is a schematic diagram of the distribution of pins provided by yet another exemplary embodiment of the present application;
FIG. 9 is a schematic diagram of the distribution of pins provided by yet another exemplary embodiment of the present application;
FIG. 10 is a schematic diagram of the distribution of pins provided by yet another exemplary embodiment of the present application;
fig. 11 is a schematic structural view of an optical transceiver module according to an exemplary embodiment of the present application;
Fig. 12 is a networking diagram of FTTR provided in an exemplary embodiment of the present application.
Description of the drawings
1. A receiving assembly; 2, a veneer, 3, a transmitting component, 4, a wave plate;
11. a base, a trans-impedance amplifier, and a detector.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
In the field of optical communications, an optical network terminal (optical network terminal, ONT) is an important terminal device on a client side, and FTTR is a new form of ONT application scenario, in which optical fiber placement and coverage are performed in each room of a user, so that better internet surfing requirements of the user are met. Specifically, referring to fig. 1, in a FTTR scenario of a passive optical network (passive optical network, PON), an ONT side includes a main gateway and at least one sub-gateway, the main gateway is connected to an in-home optical fiber, the in-home optical fiber is connected to an optical distribution network (optical distribution network, ODN), the optical distribution network includes at least one stage of an optical splitter, the optical distribution network is connected to an optical line terminal (optical LINE TERMINAL, OLT), the main gateway is connected to each sub-gateway through an optical fiber, the sub-gateways are deployed in a room, and different sub-gateways are deployed in different rooms, terminal devices in the room determine a gateway with the best signal quality through quality detection, the gateway is connected wirelessly, or a user connects the terminal device to the gateway using a network cable, the gateway is a sub-gateway or a main gateway.
During downlink communication, the OLT sends a downlink optical signal to the ONT side in a broadcast manner, the main gateway receives the downlink optical signal, converts the downlink optical signal into an electrical signal, determines a sub-gateway to which the electrical signal belongs, converts the electrical signal into an optical signal, and sends the optical signal to the sub-gateway, and the sub-gateway converts the received optical signal into an electrical signal and sends the electrical signal to the terminal device to which the sub-gateway belongs.
And when in uplink communication, the terminal equipment sends uplink data to the connected gateway, if the gateway is a sub-gateway, the sub-gateway modulates the uplink data to an optical signal, the optical signal is sent to the main gateway, the main gateway converts the optical signal into an electric signal, then the electric signal is converted into an optical signal, and the optical signal is sent to the OLT through the fiber-to-the-home. If the gateway is a primary gateway, the primary gateway modulates the uplink data onto an optical signal, and sends the optical signal to the OLT through the fiber to the home.
Thus, in the downlink communication, if the terminal device to which the downlink data belongs is connected to the sub-gateway, the photoelectric conversion is performed once in the main gateway, and then the electro-optical conversion is performed once. In the uplink communication, if the terminal device to which the uplink data belongs is connected to the sub-gateway, the main gateway performs photoelectric conversion once and then performs electro-optical conversion once. The main gateway comprises two optical component on-board devices, namely a first optical component on-board device and a second optical component on-board device, wherein the first optical component is connected with the service optical fiber on the board device, and the second optical component is connected with each sub-gateway on the board device. For the first optical component on-board device, because the first optical component on-board device is always connected with the fiber for entering a home, the fiber is continuously received, and for the second optical component on-board device, under the condition that the second optical component on-board device is connected with a plurality of sub-gateways, the plurality of sub-gateways transmit uplink data in a time division multiplexing way, so that the second optical component on-board device receives the uplink data transmitted by each sub-gateway and is burst-receiving, the second optical component on-board device needs to have burst-receiving capability, and for high-rate burst-receiving, a reset (reset) pin is required to be arranged in the second optical component on-board device to realize high-rate burst-receiving. For example, for burst reception at rates of 10G and above, a reset pin is required in the board device at the second optical component to help a trans-impedance amplifier (trans-IMPEDANCE AMPLIFIER, TIA) for burst reception to quickly adjust the gain to be able to receive the signal.
In the existing optical module with reset pins, the receiving component and the single board are connected by adopting a soft board, the soft board connection is unfavorable for device welding, and the receiving component and the single board are not fixedly connected.
Based on this, the embodiment of the application provides an optical component on-board device, in which a receiving component and a single board are directly welded through pins, which is not only beneficial to device welding, but also can fixedly connect the receiving component and the single board.
The optical component on-board device provided by the embodiment of the application not only can be applied to burst receiving with high-speed requirements, but also can be used as burst receiving with low-speed requirements.
Fig. 2 provides a schematic structural view of the optical assembly in a board arrangement. Referring to fig. 2, the optical assembly comprises a receiving assembly 1 and a single board 2 in a board arrangement. The receiving assembly 1 includes a plurality of pins, the plurality of pins include reset pins, a center distance between every two pins in the plurality of pins meets a direct-insert welding condition, the direct-insert welding condition is a condition that the center distance between pins meets when the pins realize direct-insert welding, for example, a section of each pin is circular, and the center distance between the pins is a distance between circle centers of section of each pin. The single board 2 is provided with jacks matched with the positions of a plurality of pins for inserting the pins. The receiving component 1 is directly welded with the single board 2 through the plurality of pins, so that not only is the electric connection between the receiving component 1 and the single board 2 realized, but also the fixed connection between the receiving component 1 and the single board 2 is realized.
In addition, the single board 2 further includes a laser driver for driving the laser.
In an alternative, the in-line welding condition is that the minimum center distance between pins is greater than 1.17mm, such that the center distance between each two pins is greater than 1.17mm. For example, the minimum center distance between the plurality of pins is 1.40mm.
In an alternative form, the number of pins is 6, including a reset pin, a power pin, a photodiode power (voltage photodiode, VPD) pin, a pair of high speed signal pins, and a ground pin. The power supply pin is also referred to as a supply voltage (volt current condenser, VCC) pin, and the pair of high-speed signal pins includes a positive pin and a negative pin, and the ground pin is also referred to as a Ground (GND) pin. The power pin is used for supplying power, the photodiode power pin is used for supplying power for a Photodiode (PD), and the pair of high-speed signal pins is used for receiving a pair of high-speed differential signals.
When a plurality of pins are arranged, a pair of high-speed signal pins are symmetrical about a ground pin.
In an alternative, fig. 3 provides a schematic structural view of the receiving assembly 1. Referring to fig. 3, the receiving assembly 1 includes a base 11, a transimpedance amplifier 12, and a detector 13. The plurality of pins are arranged on the base 11, a pair of high-speed signal pins in the plurality of pins are connected with the transimpedance amplifier 12, the pair of high-speed signal pins comprise a TIA+ pin and a TIA-pin, the TIA+ pin is a positive pin, the TIA-pin is a complex pin, the transimpedance amplifier 12 is connected with the detector 13, and the detector 13 is a photodiode type detector. When the receiving module 1 receives an optical signal, the detector 13 converts the optical signal into an electrical signal, and sends the electrical signal to the transimpedance amplifier 12, and the transimpedance amplifier 12 amplifies the electrical signal and sends the electrical signal to the board 2 through the pair of high-speed signal pins.
Alternatively, the material of the base 11 may be an alloy or the like.
In an alternative, fig. 4-9 provide schematic illustrations of the distribution of multiple pins on the base 11. In fig. 4 to 9, the base 11 is cylindrical. Referring to fig. 4, the reset pin is adjacent to the tia+ pin, the reset pin is also adjacent to the photodiode power pin, the power pin is also adjacent to the TIA-pin, and the tia+ pin and the TIA-pin are located on both sides of the ground pin and are symmetrical about the ground pin.
Referring to fig. 5, the reset pin is adjacent to the tia+ pin, the reset pin is also adjacent to the power pin, the power pin is adjacent to the photodiode power pin, the photodiode power pin is also adjacent to the TIA-pin, and the tia+ pin and the TIA-pin are located on both sides of the ground pin and are symmetrical about the ground pin.
Referring to fig. 6, the reset pin is adjacent to the power pin, and the reset pin is adjacent to the TIA-pin, the photodiode power pin is adjacent to the power pin, and the photodiode power pin is adjacent to the tia+ pin, which is located on both sides of the ground pin and is symmetrical about the ground pin.
Referring to fig. 7, the reset pin is adjacent to the photodiode power pin, and the reset pin is adjacent to the TIA-pin, the photodiode power pin is adjacent to the power pin, the power pin is adjacent to the tia+ pin, and the tia+ pin and the TIA-pin are located on both sides of the ground pin and are symmetrical about the ground pin.
Referring to fig. 8, the reset pin is adjacent to the power pin, and the reset pin is adjacent to the photodiode power pin, the photodiode power pin is adjacent to the tia+ pin, the power pin is adjacent to the TIA-pin, and the tia+ pin and the TIA-pin are located on both sides of the ground pin and are symmetrical about the ground pin.
Referring to fig. 9, the reset pin is adjacent to the power pin, and the reset pin is adjacent to the photodiode power pin, which is adjacent to the tia+ pin, which is adjacent to the TIA-pin, which is located on both sides of the ground pin and is symmetrical with respect to the ground pin.
In the embodiment of the present application, in several distribution modes shown in fig. 4 to 9, as long as the center distance between pins is greater than 1.17mm, specific numerical values may be set according to actual needs, and the present application is not limited to this.
Optionally, in the arrangement shown in fig. 4, the embodiment of the present application further provides a possible center distance between pins, referring to fig. 10, the center distance between the ground pin and tia+ pin is 1.46mm, the center distance between the ground pin and TIA-pin is 1.46mm, the center distance between the tia+ pin and the reset pin is 1.40mm, and the center distance between the photodiode power pin and the reset pin is 1.40mm.
In an alternative way, in order to prevent tin connection at the time of soldering, the first distance is set to be greater than the second distance, which is a center distance between the ground pin and the tia+ pin, the second distance is a center distance between the tia+ pin and a pin other than the ground pin among the adjacent pins, and the third distance is a center distance between the TIA-pin and a pin other than the ground pin among the adjacent pins. This is because the ground pin dissipates heat relatively quickly, and if the center distance between the ground pin and the adjacent pin is relatively short, the tin of the ground pin is easily melted during soldering, resulting in tin connection.
In an alternative manner, the optical component is a device integrating receiving and transmitting in the board device, that is, the optical component is a bidirectional optical component in the board device (bidirectional optical sub-assembly on Board, BOB) device, in the board device, the optical receiving and transmitting component further comprises a transmitting component 3 and a wave plate 4, the transmitting component 3 can be connected with the single board 2 through a flexible board, or the transmitting component 3 can be connected with the single board 2 through direct insertion welding. Referring to fig. 11, the receiving unit 1 is located on the reflection optical path of the wave plate 4, the wavelength of the optical signal received by the receiving unit 1 is a wavelength a, the transmitting unit 3 is located on the transmission optical path of the wave plate 4, and the wavelength of the optical signal transmitted by the transmitting unit 3 is a wavelength b, where the wavelength a is different from the wavelength b. The optical signal transmitted by the optical module at the board device is referred to as a first optical signal, the received optical signal is referred to as a second optical signal, and when the board device transmits the first optical signal, the first optical signal is transmitted and output through the wave plate 4, and is coupled to and output from the optical fiber to which the optical module is connected at the board device. When the plate device receives the second optical signal, the second optical signal is reflected by the wave plate 4 and then enters the receiving component 1, and the receiving component 1 receives the second optical signal.
Furthermore, the receiving assembly 1 may also comprise a cap or the like having an optical window for optical signal input.
In an embodiment of the present application, there is also provided a gateway, which includes the optical component-in-board device provided in the foregoing. The gateway may be the main gateway in FTTR or other gateways for burst reception.
In the embodiment of the present application, there is further provided a FTTR system, where the FTTR system includes a main gateway and a sub-gateway, referring to fig. 12, the main gateway is connected to an in-home fiber, and the in-home fiber is connected to an optical module in the OLT. The primary gateway comprises a first optical component on board device and an optical component on board device (referred to as a second optical component on board device) provided above, the primary gateway is connected with each sub-gateway at the board device through the second optical component, and the second optical component receives optical signals from the plurality of sub-gateways at the time of the board device when the board device is connected with the plurality of sub-gateways. For example, the second optical component is connected to two sub-gateways in the board device, where the two sub-gateways include a first sub-gateway and a second sub-gateway, and the second optical component receives an optical signal sent by the first sub-gateway and then receives an optical signal sent by the second sub-gateway in the board device, and at this time, the reset pin helps the second optical component to adjust the gain quickly in the board device by using TIA to receive the optical signal sent by the second sub-gateway.
The first optical component on-board device may be an optical component on-board device provided by the embodiment of the present application, or may be a 5-pin optical component on-board device, which is not limited by the embodiment of the present application, and the 5-pin optical component on-board device includes a power pin, a photodiode power pin, a pair of high-speed signal pins, and a ground pin, and does not include a reset pin.
Each sub-gateway comprises an optical component on-board device, and because each sub-gateway is continuously received, the optical component on-board device can be an optical component on-board device provided by the embodiment of the application, or can be an optical component on-board device with 5 pins, and the embodiment of the application is not limited.
Pins referred to in embodiments of the present application may be referred to as pins or pin pins. In addition, the main gateway and the sub gateway mentioned in the embodiment of the present application may also be referred to as a light cat.
In the embodiment of the application, the ONT may also be regarded as an optical network unit (optical network unit, ONU).
The terms "first" and "second" and the like in the present application are used to distinguish between identical items or similar items that have substantially the same function and function, and it should be understood that there is no logical or chronological dependency between the "first" and the "second" and that no limitation is imposed on the number and order of execution. It will also be understood that, although the following description uses the terms "first" and "second," etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another element. For example, a first distance may be referred to as a second distance, and similarly, a second distance may be referred to as a first distance, without departing from the scope of the various examples. The first distance and the second distance may both be distances, and in some cases may be separate and distinct distances.
The term "at least one" in the present application means one or more, and the term "plurality" in the present application means two or more.
The above description is merely an exemplary embodiment of the present application, but the scope of the present application is not limited thereto, and any equivalent modifications or substitutions will be apparent to those skilled in the art within the scope of the present application, and they should be included in the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.
Claims (11)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421743420.4U CN223024424U (en) | 2024-07-22 | 2024-07-22 | Optical Components on Board Devices, Master Gateways and FTTR Systems |
| PCT/CN2025/080027 WO2026020819A1 (en) | 2024-07-22 | 2025-02-28 | Optical assembly on-board apparatus, main gateway, and fttr system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421743420.4U CN223024424U (en) | 2024-07-22 | 2024-07-22 | Optical Components on Board Devices, Master Gateways and FTTR Systems |
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| CN223024424U true CN223024424U (en) | 2025-06-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202421743420.4U Active CN223024424U (en) | 2024-07-22 | 2024-07-22 | Optical Components on Board Devices, Master Gateways and FTTR Systems |
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| CN (1) | CN223024424U (en) |
| WO (1) | WO2026020819A1 (en) |
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| JP5112962B2 (en) * | 2008-06-11 | 2013-01-09 | 日本電信電話株式会社 | package |
| CN111198420B (en) * | 2018-11-19 | 2022-10-11 | 中兴通讯股份有限公司 | Coupling position adjusting method and device, optical assembly, storage medium and single board |
| CN115483315B (en) * | 2022-10-19 | 2023-06-06 | 武汉云岭光电股份有限公司 | TO-CAN packaging method and device for high-speed detector chip |
| CN220961938U (en) * | 2023-08-28 | 2024-05-14 | 华为技术有限公司 | Optical modules and optical module connectors |
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| WO2026020819A1 (en) | 2026-01-29 |
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