CN222582593U - Speaker current detection circuit and device - Google Patents
Speaker current detection circuit and device Download PDFInfo
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Abstract
本申请提供一种扬声器电流检测电路以及装置，电流检测电路包括：第一电流测量路径以及第二电流测量路径；测量模块，测量模块的第一输入端与第一电流测量路径的输出端连接，测量模块的第二输入端与第二电流测量路径的输出端连接；失配消除模块，失配消除模块的第一输出端耦合至第一电流测量路径，失配消除模块的第二输出端耦合至第二电流测量路径，以消除第一阻抗元件与第二阻抗元件之间的失配差模电流。本申请通过失配消除模块消除第一阻抗元件与第二阻抗元件之间的失配差模电流，从而避免了由于第一阻抗元件与第二阻抗元件失配而导致的扬声器电流检测精度降低的现象。
The present application provides a speaker current detection circuit and device, the current detection circuit includes: a first current measurement path and a second current measurement path; a measurement module, the first input end of the measurement module is connected to the output end of the first current measurement path, and the second input end of the measurement module is connected to the output end of the second current measurement path; a mismatch elimination module, the first output end of the mismatch elimination module is coupled to the first current measurement path, and the second output end of the mismatch elimination module is coupled to the second current measurement path, so as to eliminate the mismatch differential mode current between the first impedance element and the second impedance element. The present application eliminates the mismatch differential mode current between the first impedance element and the second impedance element through the mismatch elimination module, thereby avoiding the phenomenon of reduced speaker current detection accuracy caused by the mismatch between the first impedance element and the second impedance element.
Description
Technical Field
The application relates to the technical field of integrated circuits, in particular to a loudspeaker current detection circuit and a device.
Background
Currently, an output stage of an audio device drives a speaker using an H-bridge circuit, and in order to prevent a phenomenon that the speaker is damaged due to an excessive current, the current detection circuit is often used to detect the current on the speaker. In the related art, since a high-precision current detection circuit is required in applications such as battery management, motor control, overcurrent protection, etc. of an audio device, a speaker current detection scheme connects a sampling resistor in series with a speaker, and directly obtains a speaker current by measuring the current of the sampling resistor.
In order to further improve the current detection accuracy, referring to fig. 1, fig. 1 shows a schematic diagram of a speaker current detection scheme in the related art, differential mode voltages at two ends of a sampling resistor are generally converted into differential mode currents through a resistor 1 and a resistor 2, then the differential mode currents are converted into differential voltage signals with a preset multiple with an original differential mode voltage through an amplifying circuit, finally the amplified differential voltage signals are measured by an analog-to-digital converter, and actual differential mode voltages at two ends of the sampling circuit are calculated according to the amplification factor of the amplifying circuit and the measurement result of the analog-to-digital converter. However, when the differential mode voltage across the sampling resistor is converted into a differential mode current, there is a certain error in the differential mode current input to the amplifying circuit due to the mismatch phenomenon of the resistor 1 and the resistor 2, which reduces the accuracy of speaker current detection.
Disclosure of utility model
The application provides a loudspeaker current detection circuit and a device, which aim to solve the technical problem that the current detection precision of a loudspeaker is reduced due to mismatch of current impedance elements.
In a first aspect, the present application provides a speaker current detection circuit for detecting a current flowing through a measuring resistor and a speaker connected in series, comprising:
The input end of the first current measurement path is connected with one end of the measuring resistor, and the input end of the second current measurement path is connected with the other end of the measuring resistor;
The first input end of the measuring module is connected with the output end of the first current measuring path, and the second input end of the measuring module is connected with the output end of the second current measuring path so as to measure the differential mode voltage at two ends of the resistor;
The first current measuring path is connected with a first impedance element in series, the second current measuring path is connected with a second impedance element in series, and mismatch differential mode current is arranged between the first impedance element and the second impedance element;
The speaker current detection circuit includes a mismatch cancellation module having a first output coupled to the first current measurement path and a second output coupled to the second current measurement path to cancel a mismatch differential mode current between the first impedance element and the second impedance element.
In some embodiments, the first output of the mismatch cancellation module is configured to input a first compensation current to the first current measurement path;
The second output end of the mismatch elimination module is used for inputting a second compensation current to the second current measurement path;
The difference value of the first compensation current and the second compensation current is equal to the magnitude of the mismatch differential mode current.
In some embodiments, the mismatch cancellation module includes a first fully differential operational amplifier, a first adjustable resistor, and a second adjustable resistor:
a first differential current signal is connected between the non-inverting input end and the inverting input end of the first fully differential operational amplifier;
One end of the first adjustable resistor is connected with the non-inverting input end of the first fully differential operational amplifier, and the other end of the first adjustable resistor is connected with the inverting output end of the first fully differential operational amplifier;
One end of the second adjustable resistor is connected with the inverting input end of the first fully differential operational amplifier, and the other end of the second adjustable resistor is connected with the non-inverting output end of the first fully differential operational amplifier;
The inverting output end of the first fully differential operational amplifier is connected to the first current measuring path to input a first compensation current, and the non-inverting output end of the first fully differential operational amplifier is connected to the second current measuring path to input a second compensation current.
In some embodiments, the mismatch cancellation module includes a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, and a third adjustable resistor;
A first differential voltage signal is connected between the non-inverting input end of the first operational amplifier and the non-inverting input end of the second operational amplifier;
One end of the first resistor is connected with the inverting input end of the first operational amplifier, and the other end of the first resistor is connected with the output end of the first operational amplifier;
one end of the second resistor is connected with the inverting input end of the second operational amplifier, and the other end of the second resistor is connected with the output end of the second operational amplifier;
One end of the third adjustable resistor is connected with the inverting input end of the first operational amplifier, and the other end of the third adjustable resistor is connected with the inverting input end of the second operational amplifier;
The output end of the first operational amplifier is connected to the first current measuring path to input a first compensation current, and the output end of the second operational amplifier is connected to the second current measuring path to input a second compensation current.
In some embodiments, the first current measurement path inputs a first extraction current to a first output of the mismatch cancellation module;
The second current measurement path inputs a second extraction current to a second output end of the mismatch elimination module;
The difference value of the first extraction current and the second extraction current is equal to the magnitude of the mismatch differential mode current.
In some embodiments, the mismatch cancellation module includes a first MOS transistor, a second MOS transistor, and a first adjustable current source;
A first differential voltage signal is connected between the control end of the first MOS tube and the control end of the second MOS tube;
The first end of the first MOS tube and the first end of the second MOS tube are connected with the input end of a first adjustable current source, and the output end of the first adjustable current source is connected with the grounding end;
The second end of the first MOS tube is connected to the first current measuring path to receive the first extraction current, and the second end of the second MOS tube is connected to the second current measuring path to receive the second extraction current.
In some embodiments, the mismatch cancellation module includes a first tunable MOS transistor, a second tunable MOS transistor, and a first fixed current source;
a first differential voltage signal is connected between the control end of the first adjustable MOS tube and the control end of the second adjustable MOS tube;
The first end of the first adjustable MOS tube and the first end of the second adjustable MOS tube are connected with the input end of a first fixed current source, and the output end of the first fixed current source is connected with the grounding end;
The second end of the first adjustable MOS tube is connected to the first current measuring path to receive the first extraction current, and the second end of the second adjustable MOS tube is connected to the second current measuring path to receive the second extraction current.
In some embodiments, the measurement module includes an amplifier and an analog-to-digital converter;
The first input end of the amplifier is connected with the output end of the first current measuring path, and the second input end of the amplifier is connected with the output end of the second current measuring path so as to amplify the differential mode voltage at two ends of the measuring resistor;
The input end of the analog-to-digital converter is connected with the output end of the amplifier to measure the differential mode voltage at two ends of the resistor.
In some embodiments, the first and second outputs of the mismatch cancellation module are connected to the internal circuitry of the amplifier, or
The first and second outputs of the mismatch cancellation module are connected to the connection path between the amplifier and the analog-to-digital converter, or
The first output end and the second output end of the mismatch elimination module are connected with the internal circuit of the analog-to-digital converter.
In a second aspect, the present application provides a loudspeaker current detection device comprising a loudspeaker current detection circuit as described in the first aspect.
According to the application, the first impedance element is connected in series with the first current measurement path, and the second impedance element is connected in series with the second current measurement path, so that the first impedance element and the second impedance element can convert the differential mode voltage at two ends of the measurement resistor into differential mode current, and the measurement module can convert the differential mode current into a voltage signal which is in a preset multiple with the differential mode voltage and perform measurement. Meanwhile, since the first output end of the mismatch elimination module is coupled to the first current measurement path, and the second output end of the mismatch elimination module is coupled to the second current measurement path, the mismatch elimination module can indirectly or directly control the first current measurement path and the second current measurement path, so that mismatch differential mode current between the first impedance element and the second impedance element can be eliminated, and finally, the phenomenon of reduced detection precision of the loudspeaker current caused by mismatch of the first impedance element and the second impedance element is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a related art speaker current detection scheme;
FIG. 2 is a schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
FIG. 3 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
FIG. 4 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
FIG. 5 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
FIG. 6 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
FIG. 7 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
fig. 8 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
fig. 9 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
fig. 10 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
FIG. 11 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application;
fig. 12 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the application.
Wherein, the resistance R0 and the loudspeaker LO are measured;
11a first current measurement path, 12 a second current measurement path, 13a first impedance element, 14 a second impedance element, 20 a measurement module, 21 an amplifier, 22 an analog-to-digital converter, 30 a mismatch cancellation module;
The first compensating current I1, the second compensating current I2, the first extracting current I3, the second extracting current I4, the first differential current signal DeltaIi and the first differential voltage signal DeltaVi;
a first fully differential operational amplifier OP, a first adjustable resistor Rt1, a second adjustable resistor Rt2;
The first operational amplifier OP1, the second operational amplifier OP2, the first resistor R1, the second resistor R2 and the third adjustable resistor Rt3;
the first MOS tube M1, the second MOS tube M2 and the first adjustable current source It1;
The first adjustable MOS tube Mt1, the second adjustable MOS tube Mt2 and the first fixed current source Is1.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.
In the present utility model, the term "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described as "exemplary" in this disclosure is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the utility model. In the following description, details are set forth for purposes of explanation. It will be apparent to one of ordinary skill in the art that the present utility model may be practiced without these specific details. In other instances, well-known structures and processes have not been described in detail so as not to obscure the description of the utility model with unnecessary detail. Thus, the present utility model is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
It should be noted that in embodiments of the present application, "connected" may be understood as electrically connected, and two electrical components may be connected directly or indirectly between the two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.
The first pole/first end of each transistor employed in the embodiments of the present application is one of the source and the drain, and the second pole/second end of each transistor is the other of the source and the drain. Since the source and drain of the transistor may be symmetrical in structure, the source and drain may be indistinguishable in structure, that is, the first pole/first terminal and the second pole/second terminal of the transistor in embodiments of the present application may be indistinguishable in structure. The first pole/first end of the transistor is illustratively the source and the second pole/second end is the drain in the case of a P-type transistor, and the first pole/first end of the transistor is illustratively the drain and the second pole/second end is the source in the case of an N-type transistor.
In the circuit structure provided by the embodiment of the application, the first node, the second node and other nodes do not represent actually existing components, but represent the junction points of the related coupling in the circuit diagram, that is, the nodes are equivalent nodes formed by the junction points of the related coupling in the circuit diagram.
The embodiment of the application provides a loudspeaker current detection circuit and a loudspeaker current detection device, which are respectively described in detail below.
Referring to fig. 2, fig. 2 is a schematic diagram of a speaker current detection circuit according to an embodiment of the present application, wherein the current detection circuit is configured to detect a current flowing through a measurement resistor R0 and a speaker LO connected in series, and the speaker current detection circuit includes:
a first current measurement path 11 and a second current measurement path 12, wherein an input end of the first current measurement path 11 is connected with one end of the measurement resistor R0, and an input end of the second current measurement path 12 is connected with the other end of the measurement resistor R0;
The first input end of the measuring module 20 is connected with the output end of the first current measuring path 11, and the second input end of the measuring module 20 is connected with the output end of the second current measuring path 12 so as to measure the differential mode voltage at two ends of the resistor R0;
The first current measuring path 11 is connected in series with a first impedance element 13, the second current measuring path 12 is connected in series with a second impedance element 14, and mismatch differential mode current exists between the first impedance element 13 and the second impedance element 14;
The speaker current detection circuit comprises a mismatch cancellation module 30, a first output of the mismatch cancellation module 30 being coupled to the first current measurement path 11 and a second output of the mismatch cancellation module 30 being coupled to the second current measurement path 12 to cancel a mismatch differential mode current between the first impedance element 13 and the second impedance element 14.
Specifically, the measuring resistor R0 and the speaker LO are connected in series between the first node M1 and the second node M2 of the H-bridge circuit, the input end of the first current measuring path 11 is connected to one end of the measuring resistor R0, and the input end of the second current measuring path 12 is connected to the other end of the measuring resistor R0, so that the first current measuring path 11 and the second current measuring path 12 can access the differential mode voltage (i.e., the potential signal across the measuring resistor R0) across the measuring resistor R0. Meanwhile, since the first input terminal of the measurement module 20 is connected to the output terminal of the first current measurement path 11, and the second input terminal of the measurement module 20 is connected to the output terminal of the second current measurement path 12, the measurement module 20 may measure the differential mode voltage across the measurement resistor R0 through the first current measurement path 11 and the second current measurement path 12.
In the embodiment of the present application, the first current measurement path 11 is connected in series with the first impedance element 13, the second current measurement path 12 is connected in series with the second impedance element 14, and the first impedance element 13 and the second impedance element 14 can convert the differential mode voltage at two ends of the measurement resistor R0 into the differential mode current, so that the measurement module 20 amplifies the differential mode current into a voltage signal, thereby improving the measurement accuracy of the differential mode voltage at two ends of the measurement resistor R0. Illustratively, the first impedance element 13 may be any one or a combination of a plurality of resistances, capacitances, or inductances.
In this case, the first impedance element 13 and the second impedance element 14 have a mismatch phenomenon, for example, taking the first impedance element 13 and the second impedance element 14 as resistors, the resistance values of the first impedance element 13 and the second impedance element 14 are ideally equal, but are limited by the manufacturing process and the material influence, and the dimensions (such as the current flow cross-sectional area) of the first impedance element 13 and the second impedance element 14 and the conductor material are not completely consistent, so that the resistance values of the first impedance element 13 and the second impedance element 14 are not equal, and the mismatch phenomenon occurs between the first impedance element 13 and the second impedance element 14.
With continued reference to fig. 2, in an ideal case where the impedances of the first impedance element 13 and the second impedance element 14 are equal, the current flowing through the first impedance element 13 is Ir1, the current flowing through the second impedance element 14 is Ir2, and the voltage difference across the measuring resistor R0 is Δv, the following relationship is satisfied between the current flowing through the first impedance element 13, the current flowing through the second impedance element 14, and the voltage difference across the resistor:
△V/Z=Ir1-Ir2
△V=V1-V2
Wherein Z is an ideal impedance value of the first impedance element 13 and the second impedance element 14, V1 is a voltage value at one end of the measuring resistor R0, and V2 is a voltage value at the other end of the measuring resistor R0.
However, since the first impedance element 13 and the second impedance element 14 have a mismatch phenomenon, a mismatch differential mode current is generated between the first impedance element 13 and the second impedance element 14, and the mismatch differential mode current has the following magnitude:
△Ir=△V/△Z
Wherein ΔIr is a mismatch differential mode current, and ΔZ is an impedance difference between the first impedance and the second impedance.
That is, after passing through the first impedance element 13 and the second impedance element 14, the differential mode current actually output by the first current measurement path 11 and the second current measurement path 12 is:
Ir=△V/Z+△V/△Z
Therefore, since the first impedance element 13 and the second impedance element 14 have a mismatch phenomenon, there is a certain error in the differential mode current input to the measurement module 20, which reduces the accuracy of the speaker LO current detection.
In the embodiment of the present application, since the first output end of the mismatch cancellation module 30 is coupled to the first current measurement path 11 and the second output end of the mismatch cancellation module 30 is coupled to the second current measurement path 12, the mismatch cancellation module 30 may extract the currents on the first current measurement path 11 and the second current measurement path 12, or the mismatch cancellation module 30 may inject the currents into the first current measurement path 11 and the second current measurement path 12, so as to cancel the mismatch differential mode current between the first impedance element 13 and the second impedance element 14, and finally avoid the phenomenon of reduced detection accuracy of the speaker LO current caused by the mismatch between the first impedance element 13 and the second impedance element 14.
It should be noted that, in the present application, the first output end of the mismatch cancellation module 30 is coupled to the first current measurement path 11, the second output end of the mismatch cancellation module 30 is coupled to the second current measurement path 12, which may mean that the first output end of the mismatch cancellation module 30 is directly connected to the first current measurement path 11, the second output end of the mismatch cancellation module 30 is directly connected to the second current measurement path 12, or that the first output end of the mismatch cancellation module 30 is indirectly connected to the first current measurement path 11 through other circuit modules (such as the amplifier 21 or the analog-to-digital converter 22), and the second output end of the mismatch cancellation module 30 is connected to the second current measurement path 12 through other circuit modules.
In some embodiments of the present application, for example, for embodiments in which the mismatch cancellation module 30 may inject current into the first current measurement path 11 and the second current measurement path 12, referring to fig. 3, fig. 3 shows another schematic diagram of a speaker current detection circuit in an embodiment of the present application, where a first output terminal of the mismatch cancellation module 30 is used to input a first compensation current I1 to the first current measurement path 11, and a second output terminal of the mismatch cancellation module 30 is used to input a second compensation current I2 to the second current measurement path 12, where a difference between the first compensation current I1 and the second compensation current I2 is equal to a magnitude of a mismatch differential mode current.
For example, the current of the first current measurement path 11 is 0.3A, the current of the second current measurement path 12 is 0.22A, the differential mode current output by the first current measurement path 11 and the second current path is 0.1A when the first impedance element 13 and the second impedance element 14 are equal in impedance, that is, the current of the second current measurement path 12 is excessively large due to the fact that the impedance of the second impedance element 14 is smaller than the impedance of the first impedance element 13, and a mismatch differential mode current of 0.02A is generated, at this time, the first output end of the mismatch elimination module 30 may input a first compensation current I1 with a magnitude of 0.05A to the first current measurement path 11, the second output end of the mismatch elimination module 30 may input a second compensation current I2 with a magnitude of 0.03A to the second current measurement path 12, so that the current magnitude output by the first current measurement path 11 is 0.35A, the current magnitude output by the second current measurement path 12 is 0.25A, and the mismatch between the first current measurement path 11 and the second current measurement path 1 and the second current measurement path 14 is finally eliminated, and the mismatch between the first output end of the mismatch elimination module 30 and the second current 1 is finally input to the first current measurement path 14.
Referring to fig. 4, fig. 4 shows another schematic diagram of a speaker current detection circuit according to an embodiment of the present application, wherein the mismatch cancellation module 30 includes a first fully differential operational amplifier OP, a first adjustable resistor Rt1, and a second adjustable resistor Rt2, a first differential current signal Δii is connected between a non-inverting input terminal and an inverting input terminal of the first fully differential operational amplifier OP, one end of the first adjustable resistor Rt1 is connected to the non-inverting input terminal of the first fully differential operational amplifier OP, the other end is connected to an inverting input terminal of the first fully differential operational amplifier OP, one end of the second adjustable resistor Rt2 is connected to the inverting input terminal of the first fully differential operational amplifier OP, the other end is connected to the non-inverting output terminal of the first fully differential operational amplifier OP, the inverting output terminal of the first fully differential operational amplifier OP is connected to the first current measurement path 11 to input a first compensation current I1, and the output terminal of the first fully differential operational amplifier OP is connected to the second current measurement path 12 to input a second compensation current I2.
Specifically, after the first differential current signal Δii is connected between the non-inverting input terminal and the inverting input terminal of the first fully differential operational amplifier OP, the magnitudes of the voltages at the inverting output terminal and the non-inverting output terminal of the first fully differential operational amplifier OP can be changed by changing the resistances of the first adjustable resistor Rt1 and the second adjustable resistor Rt2, after the voltages pass through the resistors R01 and R02, the first compensation current I1 can be input to the first current measurement path 11, the second compensation current I2 can be input to the second current measurement path 12, and the difference between the first compensation current I1 and the second compensation current I2 can be equal to the magnitude of the mismatch differential mode current.
As another exemplary embodiment of the mismatch cancellation module 30, referring to fig. 5, fig. 5 shows another schematic diagram of the speaker current detection circuit in the embodiment of the present application, the mismatch cancellation module 30 includes a first operational amplifier OP1, a second operational amplifier OP2, a first resistor R1, a second resistor R2, and a third adjustable resistor Rt3, a first differential voltage signal Δvi is connected between the non-inverting input terminal of the first operational amplifier OP1 and the non-inverting input terminal of the second operational amplifier OP2, one end of the first resistor R1 is connected to the inverting input terminal of the first operational amplifier OP1, the other end is connected to the output terminal of the first operational amplifier OP1, one end of the second resistor R2 is connected to the inverting input terminal of the second operational amplifier OP2, the other end is connected to the output terminal of the second operational amplifier OP2, one end of the third adjustable resistor Rt3 is connected to the inverting input terminal of the first operational amplifier OP1, the other end is connected to the inverting input terminal of the second operational amplifier OP2, and the first output terminal of the first operational amplifier OP1 is connected to the first compensating path of the first operational amplifier OP1 to the second input path of the first input current compensation circuit 12 of the first operational amplifier OP 1.
Specifically, a first differential voltage signal Δvi is connected between the non-inverting input terminal of the first operational amplifier OP1 and the non-inverting input terminal of the second operational amplifier OP2, the current difference between the first compensation current I1 and the second compensation current I2 satisfies the following relation, I1-i2= Δvi/(r1+r2+rt3), and since the resistance of the third adjustable resistor Rt3 is adjustable, the difference between the first compensation current I1 and the second compensation current I2 can be equal to the magnitude of the mismatch differential mode current, and finally the purpose of counteracting the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 is achieved.
In some embodiments of the present application, for example, for embodiments in which the mismatch cancellation module 30 may extract the current of the first current measurement path 11 and the second current measurement path 12, referring to fig. 6, fig. 6 shows another schematic diagram of a speaker current detection circuit in an embodiment of the present application, where the first current measurement path 11 inputs a first extraction current I3 to a first output terminal of the mismatch cancellation module 30, and the second current measurement path 12 inputs a second extraction current I4 to a second output terminal of the mismatch cancellation module 30, and a difference between the first extraction current I3 and the second extraction current I4 is equal to a magnitude of a mismatch differential mode current.
For example, the current of the first current measurement path 11 is 0.4A, the current of the second current measurement path 12 is 0.48A, the differential mode current output by the first current measurement path 11 and the second current path is 0.1A when the first impedance element 13 and the second impedance element 14 are equal, i.e. the current of the second current measurement path 12 is too small to generate a mismatch differential mode current of 0.02A due to the impedance of the second impedance element 14 being larger than the impedance of the first impedance element 13, at this time, the first output end of the mismatch cancellation module 30 may extract a first extraction current I3 with the first current measurement path 11 of 0.1A, the second output end of the mismatch cancellation module 30 may extract a second extraction current I4 with the second current measurement path 12 of 0.08A, so that the current of the first current measurement path 11 is 0.3A, the current of the second current measurement path 12 is 0.4A, and the mismatch between the first current measurement path 11 and the second current measurement path 14 and the second current measurement path 12 is cancelled out by the mismatch cancellation module 30.
As another exemplary embodiment of the mismatch cancellation module 30, referring to fig. 7, fig. 7 shows another schematic diagram of a speaker current detection circuit in the embodiment of the present application, where the mismatch cancellation module 30 includes a first MOS transistor M1, a second MOS transistor M2, and a first adjustable current source It1, a first differential voltage signal Δvi is connected between a control end of the first MOS transistor M1 and a control end of the second MOS transistor M2, a first end of the first MOS transistor M1 and a first end of the second MOS transistor M2 are connected to an input end of the first adjustable current source It1, an output end of the first adjustable current source It1 is connected to a ground end, a second end of the first MOS transistor M1 is connected to the first current measurement path 11 to receive the first extraction current I3, and a second end of the second MOS transistor M2 is connected to the second current measurement path 12 to receive the second extraction current I4.
Specifically, after the first differential voltage signal Δvi is connected between the control end of the first MOS transistor M1 and the control end of the second MOS transistor M2, the current difference between the current flowing through the first MOS transistor M1 (i.e., the first extraction current I3) and the current flowing through the second MOS transistor M2 (i.e., the second extraction current I4) is controlled by the first differential voltage signal Δvi and the current of the first adjustable current source It1, so that the difference between the first extraction current I3 and the second extraction current I4 can be changed by changing the current of the first adjustable current source It1, so that the difference between the first extraction current I3 and the second extraction current I4 is equal to the magnitude of the mismatch differential mode current, and finally, the purpose of counteracting the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 is achieved.
Referring to fig. 8, fig. 8 shows another schematic diagram of a speaker current detection circuit according to an embodiment of the present application, wherein the mismatch cancellation module 30 includes a first adjustable MOS transistor Mt1, a second adjustable MOS transistor Mt2, and a first fixed current source Is1, a first differential voltage signal Δvi Is connected between a control end of the first adjustable MOS transistor Mt1 and a control end of the second adjustable MOS transistor Mt2, a first end of the first adjustable MOS transistor Mt1 and a first end of the second adjustable MOS transistor Mt2 are connected to an input end of the first fixed current source Is1, an output end of the first fixed current source Is1 Is connected to a ground end, a second end of the first adjustable MOS transistor Mt1 Is connected to a first current measurement path 11 to receive a first extraction current I3, and a second end of the second adjustable MOS transistor Mt2 Is connected to a second current measurement path 12 to receive a second extraction current I4.
It should be noted that, the first adjustable MOS tube Mt1 and the second adjustable MOS tube Mt2 may refer to a plurality of MOS tubes connected in parallel, and the control end of each MOS tube is connected to a differential voltage signal, when the number of the parallel MOS tubes in the first adjustable MOS tube Mt1 and the second adjustable MOS tube Mt2 is changed, the current flowing through the first adjustable MOS tube Mt1 (i.e., the first extraction current I3) may be changed, and the current flowing through the second adjustable MOS tube Mt2 (i.e., the second extraction current I4) may be changed, so that the difference value between the first extraction current I3 and the second extraction current I4 is equal to the magnitude of the mismatch differential mode current, and finally the purpose of counteracting the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 is achieved.
It should be understood that the foregoing embodiments are merely exemplary descriptions of the implementation of the present application, and those skilled in the art may make equivalent modification designs based on the present application, for example, the mismatch elimination module 30 may further include a first tunable MOS transistor Mt1, a second tunable MOS transistor Mt2, and a first tunable current source It1, and the difference between the first extraction current I3 and the second extraction current I4 is equal to the magnitude of the mismatch differential mode current by adjusting the first tunable MOS transistor Mt1, the second tunable MOS transistor Mt2, and the first tunable current source It 1.
It should be noted that, in the above embodiment, the first differential voltage signal Δvi and the first differential current signal Δii may be obtained through an external circuit, or may be obtained through an internal circuit structure of a speaker current detection circuit, for example, refer to fig. 9, fig. 9 shows another schematic diagram of the speaker current detection circuit in the embodiment of the present application, where a resistor R05 and a resistor R06 are connected in series at one end of the measurement resistor R0, and the first differential voltage signal Δvi may be output through two ends of the resistor R06 and then converted into the first differential current signal Δii through the resistor R03 and the resistor R04, and further, for example, referring to fig. 10, fig. 10 shows another schematic diagram of the speaker current detection circuit in the embodiment of the present application, and further, a resistor R07 may be connected in series on the first current measurement path 11, and a resistor R08 may be connected in series on the second current measurement path 12, and the first differential voltage signal Δvi may be output through two ends of the resistor R07.
In some embodiments of the present application, with continued reference to fig. 11, fig. 11 shows another schematic diagram of a speaker current detection circuit according to an embodiment of the present application, wherein the measurement module 20 includes an amplifier 21 and an analog-to-digital converter 22, a first input terminal of the amplifier 21 is connected to an output terminal of the first current measurement path 11, a second input terminal of the amplifier 21 is connected to an output terminal of the second current measurement path 12, so that a differential mode voltage across the measurement resistor R0 can be amplified, and an input terminal of the analog-to-digital converter 22 is connected to an output terminal of the amplifier 21, so as to measure the differential mode voltage across the measurement resistor R0 and convert the differential mode voltage into a digital signal.
In some embodiments of the present application, for example, for an embodiment in which the first output terminal of the mismatch cancellation module 30 is indirectly connected to the first current measurement path 11 through another circuit module (such as the amplifier 21 or the analog-to-digital converter 22), and the second output terminal of the mismatch cancellation module 30 is connected to the second current measurement path through another circuit module, referring to fig. 12, fig. 12 shows another schematic diagram of the speaker current detection circuit in the embodiment of the present application, in which the first output terminal and the second output terminal of the mismatch cancellation module 30 are connected to the connection path between the amplifier 21 and the analog-to-digital converter 22, after the differential mode voltage across the measurement resistor R0 is amplified by the amplifier 21, the mismatch cancellation module 30 may compensate the differential mode voltage output by the amplifier 21, so as to indirectly cancel the measurement error caused by the mismatch of the first impedance element 13 and the second impedance element 14.
It should be noted that the foregoing description of the speaker current detection circuit is intended to clearly illustrate the implementation verification process of the present application, and those skilled in the art may also make equivalent modification designs under the guidance of the present application, for example, the first output terminal and the second output terminal of the mismatch cancellation module 30 may also be connected to the internal circuit of the amplifier 21, and for example, the first output terminal and the second output terminal of the mismatch cancellation module 30 may also be connected to the internal circuit of the analog-to-digital converter 22, so as to indirectly cancel the measurement error caused by the mismatch of the first impedance element 13 and the second impedance element 14.
Further, in order to better implement the speaker current detection circuit in the embodiment of the present application, the present application further provides a speaker LO current detection device based on the speaker current detection circuit, where the speaker LO current detection device includes the speaker current detection circuit according to any one of the above embodiments. The speaker LO current detection device in the embodiment of the present application has all the beneficial effects of the speaker current detection circuit because the speaker current detection circuit in the above embodiment is provided, and will not be described herein.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and the portions of one embodiment that are not described in detail in the foregoing embodiments may be referred to in the foregoing detailed description of other embodiments, which are not described herein again.
While the basic concepts have been described above, it will be apparent to those skilled in the art that the foregoing detailed disclosure is by way of example only and is not intended to be limiting. Although not explicitly described herein, various modifications, improvements and adaptations of the application may occur to one skilled in the art. Such modifications, improvements, and modifications are intended to be suggested within the present disclosure, and therefore, such modifications, improvements, and adaptations are intended to be within the spirit and scope of the exemplary embodiments of the present disclosure.
Meanwhile, the present application uses specific words to describe embodiments of the present application. Reference to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic is associated with at least one embodiment of the application. Thus, it should be emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various positions in this specification are not necessarily referring to the same embodiment. Furthermore, certain features, structures, or characteristics of one or more embodiments of the application may be combined as suitable.
Similarly, it should be noted that in order to simplify the description of the present disclosure and thereby aid in understanding one or more inventive embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof. This method of disclosure does not imply that the subject utility model requires more features than are set forth in the claims. Indeed, less than all of the features of a single embodiment disclosed above.
In some embodiments, numbers describing the components, number of attributes are used, it being understood that such numbers being used in the description of embodiments are modified in some examples by the modifier "about," approximately, "or" substantially. Unless otherwise indicated, "about," "approximately," or "substantially" indicate that the number allows for a 20% variation. Accordingly, in some embodiments, numerical parameters set forth in the specification and claims are approximations that may vary depending upon the desired properties sought to be obtained by the individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and employ a method for preserving the general number of digits. Although the numerical ranges and parameters set forth herein are approximations in some embodiments for use in determining the breadth of the range, in particular embodiments, the numerical values set forth herein are as precisely as possible.
Each patent, patent application publication, and other material, such as articles, books, specifications, publications, documents, etc., cited herein is hereby incorporated by reference in its entirety except for any application history file that is inconsistent or otherwise conflict with the present disclosure, which places the broadest scope of the claims in this application (whether presently or after it is attached to this application). It is noted that the description, definition, and/or use of the term in the appended claims controls the description, definition, and/or use of the term in this application if there is a discrepancy or conflict between the description, definition, and/or use of the term in the appended claims.
The foregoing describes a speaker current detection circuit and apparatus provided in embodiments of the present utility model in detail, and specific examples are provided herein to illustrate the principles and embodiments of the present utility model, and the above description of the embodiments is provided to assist in understanding the method and core concept of the present utility model, and meanwhile, the present disclosure should not be construed as limiting the utility model to any extent possible, as long as the person skilled in the art can make any change in the specific embodiments and application scope in accordance with the concept of the present utility model.
Claims (10)
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| CN202420659354.6U CN222582593U (en) | 2024-04-01 | 2024-04-01 | Speaker current detection circuit and device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202420659354.6U CN222582593U (en) | 2024-04-01 | 2024-04-01 | Speaker current detection circuit and device |
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| CN222582593U true CN222582593U (en) | 2025-03-07 |
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