CN222300028U - Bus type centralized control keyboard for mine - Google Patents

Abstract

The utility model discloses a bus-type mining centralized control keyboard, which is applied to the field of mining equipment. It aims at the problem that the traditional mining centralized control operation keyboard adopts an integrated design and has a hardware circuit board area that is too large, resulting in high production costs. The utility model comprises: a main control board, an independent scanning key board, and a matrix scanning key board. The independent key board and the matrix key board are connected to the main control board by means of a bus. The main control board provides at least 2 independent keys and matrix key bus interfaces as needed, and the main control board retains a certain number of keys and LED lights. In this way, by using the hardware circuit provided by the utility model, the number of key function boards used can be flexibly matched according to the number of keys actually used.

Description

Bus type centralized control keyboard for mine

Technical Field

The utility model belongs to the field of mining equipment, and particularly relates to a mining centralized control keyboard.

Background

The mining centralized control operation keyboard generally comprises a coal mining machine operation keyboard, a two-stand support operation keyboard and a four-stand support operation keyboard, wherein the traditional mining centralized control operation keyboard adopts an integrated design, and is planned in the same hardware circuit according to the maximum usage amount of keys, a display and LED lamps.

The traditional mining centralized control operation keyboard uses a single wired data transmission mode, when equipment is installed in a place easy to vibrate, a transmission cable is easy to loosen due to long-term vibration, data transmission fails, and application requirements of the mining centralized control operation keyboard in a high-frequency vibration environment in the mining field are limited.

Disclosure of utility model

In order to solve the problems, the method adopts a split type hardware design, the key function board and the main controller are divided into different hardware independent boards, and the key function board and the main control board are connected in a bus mode.

The technical scheme adopted by the utility model is that the bus type mining centralized control keyboard comprises a main control board, an independent scanning key board and a matrix scanning key board, wherein the main control board is respectively connected with the independent scanning key board and the matrix scanning key board through buses;

The main control board comprises a core processor, a power supply unit and a bus interface, wherein the core processor is realized by adopting a chip with the model of STM32F407ZET 6;

The independent scanning key board comprises a P1 interface, a first matrix chip and a first group of LED lamps, wherein the core processor is in communication connection with the first matrix chip through a bus, the P1 interface comprises an independent key bus interface connected with the core processor, a column scanning control bus interface connected with the first matrix chip and a row scanning control bus interface connected with the first matrix chip;

the matrix scanning key board comprises a CN1 interface, a second matrix chip and a second group of LED lamps, wherein the core processor is in communication connection with the second matrix chip through a bus, the CN1 interface comprises a matrix key bus interface connected with the core processor, a column scanning control bus interface connected with the second matrix chip and a row scanning control bus interface connected with the second matrix chip, and the second group of LED lamps work under the drive of the second matrix chip.

The device has the beneficial effects that the device adopts a split type hardware design, 3 types of functional veneers are divided according to different functional units, namely independent keys, an LED lamp veneer, a matrix key, an LED lamp veneer and a main control board veneer, and all veneers are connected by adopting a bus, so that the defects of large circuit area of integrally designed hardware and large overall appearance and heavy volume of equipment are effectively reduced;

The independent keys and the LED lamp single boards provide controllable 16 keys and LED lamps, the matrix keys and the LED lamp single boards provide controllable 32 keys and LED lamps, the main control board provides controllable 8 keys and LED lamps, the main control board is respectively provided with 2 independent and matrix key single board bus interfaces, 104 controllable keys and LED lamps can be provided for the whole device, and according to different functional requirements of the coal mining machine centralized control operation keyboard, the two-upright centralized control operation keyboard and the four-upright centralized control operation keyboard, different single board numbers are reasonably and flexibly matched, so that the condition of key and LED lamp waste in the integrated design is avoided, and the whole cost of the device can be reduced;

The device adopts a split type hardware design, so that the overall function partition layout of the device is not limited by the split type hardware design, and the hardware has more flexibility in the installation of the centralized control console shell;

The device adopts a split type hardware design, and according to different functional single board designs, the functional single board can be rapidly positioned in the later use and maintenance of the device, so that the time for checking and maintenance is saved;

The device adopts a split type hardware design, when hardware needs to be replaced in maintenance, compared with the integral replacement of the integrated design, the split type device only needs to replace a single maintenance veneer, so that the maintenance cost is reduced;

the device adopts two modes of wired and wireless to transmit data, the wired transmission channel provides common RS422, RS485, CAN and Ethernet channels, the wireless channel adopts WIFI to transmit data, and multiple transmission channels of the two modes CAN be matched and used arbitrarily, so that stability and reliability of data transmission are guaranteed, and the device CAN be flexibly applied to different environments.

Drawings

FIG. 1 is a general block diagram of a device of a bus type mining centralized control keyboard provided by the utility model;

FIG. 2 is a schematic diagram of a communications circuit for an interface portion of an STM32F407ZET6 chip provided by the present utility model;

FIG. 3 shows an independent key and LED lamp control circuit provided by the utility model;

FIG. 4 is a circuit diagram of an independent key and an LED lamp panel provided by the utility model;

FIG. 5 shows a matrix key and LED lamp control circuit provided by the utility model;

fig. 6 is a circuit diagram of a matrix key and an LED lamp panel provided by the present utility model.

Detailed Description

The present utility model will be further explained below with reference to the drawings in order to facilitate understanding of technical contents of the present utility model to those skilled in the art.

As shown in fig. 1, the mining centralized control keyboard adopts a split type hardware design, a key function board and a main controller are divided into different hardware independent boards, and the key function board and the main control board are connected in a bus mode.

The main control board mainly comprises a core processor MCU, an LED nixie tube display unit, a bus interface and a power supply unit. The power supply unit is a power supply core of the whole centralized control keyboard system and supplies power to an external key function board through a bus interface, and the core processor MCU is a processing operation unit of the whole centralized control keyboard system, and key state scanning, LED lamp control, LED nixie tube display and data communication are all controlled by the core processor MCU. The bus interface is the interface unit in fig. 1.

In this embodiment, the keys are classified into 2 modes of independent scanning keys and matrix scanning keys, different modes are made into independent hardware circuit boards, 1 hardware circuit board is designed to support 16 independent keys and LED lamps according to different functional usage amounts, and the matrix scanning key board is designed to support 32 matrix keys and LED lamps for 1 hardware circuit board. The independent scanning key board and the matrix scanning key board are connected with the main control board in a bus mode, the main control board can provide at least 2 paths of independent key and matrix key bus interfaces according to needs, and meanwhile, the main control board keeps a certain number of keys and LED lamps, so that the hardware circuit of the method can flexibly match the number of the key function boards according to the number of the keys actually used.

The main control panel provides related information of the LED data tube display device;

in order to solve the problem of single data transmission mode in the traditional mining, two modes of wire and wireless are adopted in a main control panel to transmit data, wherein a wire transmission channel provides a common RS422, RS485, CAN and Ethernet channel, a wireless channel adopts a WIFI mode to transmit data, and multiple transmission channels in the two modes CAN be used in a random collocation mode, so that the stability and the reliability of data transmission are ensured, and the purposes of operation control and status readback are achieved. I.e. the bus interface comprises an RS485 interface, an RS422 interface, a CAN interface, an ethernet interface.

In the utility model, a main control core processor adopts an STM32F407ZET6 chip, and as shown in figure 2, an interface part communication circuit of the STM32F407ZET6 chip is provided;

the RS485 interface is realized by adopting a TD541S485H control chip, a drive port of the RS485 is connected with the MCU by adopting a UART interface, and specifically UART3 of the main control chip is adopted, namely the main controller drives the RS485 communication interface through the UART3, and drive pins are 77, 78 and 79 pins of the control chip and are respectively a transmitting port, a receiving port and a control port of the RS485 communication interface.

The RS422 interface is realized by adopting an RSM422 control chip, a driving port of the RS422 is connected with a MCU of the main controller by adopting a UART interface, and specifically UART2 of the main controller is adopted, namely the main controller drives the RS422 communication interface through the UART2, and driving pins are pins 117, 118, 119 and 122 of the control chip and are respectively a sending control port, a receiving control port, a sending port and a receiving port of the RS422 communication interface.

The WIFI communication interface is realized by using a control chip ESP8266, UART driving control is adopted, and UART4 of a main control chip is adopted specifically, namely, the main controller drives the WIFI communication interface through the UART4, driving pins are 111 and 112 pins of the control chip, and the driving pins are respectively a transmitting port and a receiving port of the WIFI communication interface.

The main controller adopts a CAN2 function module of the main controller chip to drive a CAN communication interface, namely pins 114 and 115 of the main controller chip are CAN2_RXD and CAN2_TXD ports respectively.

The PHY chip used for ethernet communication is a LAN8720A chip, which is driven by the ethernet control module of the main controller, and the driving pins are 35, 36, 43, 27, 29, 44, 45, 70, 73, and 74, respectively.

The hardware circuit of the independent scanning KEY board is shown in fig. 3, the P1 interface board is a double-row interface adopting 2×16, the model is Header 16×2, 3.3V and GND are direct current power supply interfaces, the hardware circuit is an output power supply interface circuit outside the main control board, brd_key0-brd_key15 are independent KEY bus interfaces for external scanning of the main control board, led_r0-led_r7 are output column scanning control buses controlled by a matrix chip CH452A, led_c4-led_c7 are output row scanning control buses controlled by a matrix chip CH452A, and because the independent KEY scanning control circuit 1 interface supports 16 independent KEY scanning operations, P1 provides control of 32 LED matrix lamps for 4-way line scanning, only two row scanning lines of led_c6 and led_c7 are needed in the independent scanning KEY board in actual use, and the led_c4 and led_c5 row scanning lines are not used, so that the aim of controlling 16 independent KEYs and 16 matrix scanning lamps in actual use is achieved.

The U2 chip adopts a CH452A matrix scanning chip, the chip is a matrix control chip driven by an LED lamp, the U2 chip adopts a 3-wire SPI mode for driving, an SPI interface consists of a DCLK signal of a chip control 27 pin, a DIN signal of a 26 pin and a DOUT pin of a 24 pin, the SPI pin is connected to an SPI control pin of an MCU, and a 25 pin of the U2 chip is a LOAD loading enabling control pin, is enabled at a high level and disabled at a low level, so that the 25 pin is connected to the control pin of the MCU, and the effect that the MCU can control the matrix scanning chip U2 is achieved. The 14 pins of the matrix scanning chip U2 are grounded through a 0 omega resistor, the chip can work normally, the reset pins of the chip are 12 pins and 13 pins, the purpose of resetting operation can be achieved by using only 12 pins, the 13 pins are suspended, the 12 pins of the matrix scanning chip U2 are reset by adopting low level and level control of high level normal operation, therefore, a 1K pull-up resistor is added to a VDD_LED power supply (the VDD_LED power supply and a 3.3V power supply are connected through an isolation coupling magnetic bead) through R15 at the control pin, and voltage fluctuation filtering is carried out through a C8 capacitor, so that the purposes of isolating coupling and preventing level mutation by using 10 omega resistor between the matrix chip U2 and a main controller MCU are achieved. Pins 15 to 22 of the matrix chip U2 are column scanning control pins connected to the corresponding connection buses of the P1 interface, and pins 1 to 8 of the matrix chip are row scanning control pins connected to the corresponding connection buses of the P1 interface. The 8 pins and 9 pins of the matrix chip U2 need to be connected to GND to enable the chip to form a normal circuit loop.

The main control core processor adopts an STM32F407ZET6 chip, besides the conventional control pins, the 23 pins and the 24 pins of the chip are also required to be connected into a 25MHz crystal oscillator chip, and in order to ensure the stability of the 25MHz crystal oscillator, starting capacitors C2 and C4 to GND are required to be added, and 1 resistor R6 of 1MΩ is required to be connected in parallel, so that the stability and reliability of the crystal oscillator can be ensured. The 138 pin of the main control chip is a BOOT0 control pin, and needs to be connected to GND through 1 pull-down resistor of 10KΩ, so that the processor chip can work stably when being powered on. The 25 pins of the MCU are chip RESET control pins, the chip uses low level RESET and high level normally works, so that a pull-up circuit is formed outside the 25 pins through R9 and R10 to a 3.3V power supply, and in order to ensure that the chip RESET is not caused by power supply fluctuation, a C7 filter capacitor is added in the pull-up circuit, so that the error RESET operation caused by the power supply fluctuation can be effectively reduced. The pin 143 of the main control chip is pulled up to a 3.3V power supply through a resistor R8, and the pin 71 and the pin 106 are pulled down to GND through a capacitor C5 and a capacitor C6, so that the main control chip can work normally. In this embodiment, the resistor R9 has a value of 470 Ω, the resistor R10 has a value of 10KΩ, the resistor R8 has a value of 10Ω, and the capacitors C5 and C6 have values of 2.2uF.

As can be seen from the independent scan KEY and LED lamp control circuit in FIG. 4, the MCU core processor adopts STM32F407ZET6 chip, the independent scan KEY adopts IO port direct drive scan control, the electrical network reference numerals BRD_KEY0-BRD_KEY 15 are a group of independent KEY scan bus groups, the network is electrically and directly connected with the bus interface P1, the independent KEY board is directly driven, the LED lamps are controlled by matrix scan chip CH452A, the core processor and the matrix scan chip adopt SPI interface for communication, the matrix communication interfaces are LED_DCLK, LED_DIN, LED_DOUT, LED_LOAD and LED_RST, wherein the LED_LOAD is LED matrix scan chip enable control, the LED_RTS is LED matrix scan chip reset control, the matrix scan chip adopts low level reset, therefore, a pull-up resistor is required to be added at a reset pin, the reset pin is ensured to be at high level during operation, the capacitor C8 is added in order to eliminate false reset condition caused by jitter, and the reset pin LED_RST is connected to the matrix scan chip 12 through 1 isolation coupling resistor R14. LED_DCLK, LED_DIN, LED_DOUT are 3 line system SPI communication interface, can pass the on-off operating condition of this interface control LED lamp, the matrix scanning divide into row and column scanning (that is LED_C0~ LED_C7 is the row scanning output signal, LED_R0~ LED_R7 is the row scanning output signal), row and column scanning output signal is to P1 interface, this interface is the connection bus interface of external independent button and LED lamp plate, can scan specific independent button and control LED lamp on-off condition through this bus interface, as shown in FIG. 4 is independent scanning button and LED lamp plate circuit diagram.

According to the circuit diagram of the independent scanning key and the LED lamp panel shown in the figure 4, the LED lamps are driven by matrix scanning, and 1 isolation coupling resistor of 20 omega is added into a column scanning signal bus, so that misoperation caused by signal fluctuation caused by bus length can be increased, and the driving stability of the LED lamps is improved. After the independent scanning key passes through the bus, the SWx key is driven in a low-level effective mode, so that 1 terminal of the SWx key is connected to GND, and the other 1 terminal is required to pass through 1 resistor of 10KΩ to 3.3V power supply, so that when the key is not pressed down, the scanning is high-level, and when the key is pressed down, the key is low-level, thereby achieving the purpose of independently scanning to acquire the key state, and in order to ensure the stability of the bus, 1 capacitor of 0.1uF is connected to GND in parallel in a scanning line, reducing bus fluctuation and reducing key scanning misoperation caused by bus fluctuation. Those skilled in the art will appreciate that x in SWx represents the xth key, and the upper limit of the value of x is the total number of independent keys on the corresponding circuit board.

Each independent key is driven by a low-level effective mode by a switch key after passing through the bus.

The matrix scanning key and LED lamp control circuit specifically comprises a main control chip, a U2 matrix chip, a CN1 interface and a U3 matrix scanning key chip, wherein the main control chip and the U2 matrix chip in the matrix scanning key and LED lamp control circuit are the same as the main control chip and the U2 matrix chip in the independent scanning key in principle. While the CN1 interface functions similarly to the previous P1 interface.

As shown in FIG. 5, the main control board core processor adopts STM32F407ZET6, the matrix scanning KEY chip adopts CH452A chip (U3), the core processor and the matrix chip adopt SPI interfaces for communication, the KEY communication interfaces are KEY_DCLK, KEY_DIN, KEY_DOUT, KEY_LOAD and KEY_RST, wherein KEY_LOAD is KEY matrix chip enabling control, KEY_RTS is KEY matrix chip resetting control, the matrix chip adopts low level resetting, and therefore, a pull-up resistor is required to be added at a resetting pin through R71 to ensure that the resetting pin is at a high level during operation, and a capacitor C66 is added for eliminating false resetting caused by jitter. Key_dclk, key_din, key_dout are 3-wire SPI communication interfaces through which the status information of matrix KEYs can be obtained, the KEY matrix scanning is divided into row-column scanning (i.e., key_c0 to key_c7 are column scanning output signals, key_r0 to key_r7 are row scanning output signals), the row-column scanning output signals are sent to CN1 interface, the interface is a bus interface connecting the matrix KEYs and the LED lamp panel, through which specific KEY conditions can be scanned, as shown in fig. 6, which is a circuit diagram of the matrix KEYs and the LED lamp panel.

As can be seen from FIG. 6, the main control board is connected with the matrix keys and the LED lamp panels by buses, in order to ensure the stability of key scanning, a 10K resistor is added in a column scanning line to be pulled up to a 3.3V power supply, then 120 omega of isolation coupling resistor is added in column scanning, and error operation caused by fluctuation on the buses is reduced. The operation of the LED lamp is controlled by a matrix chip, and the LED matrix scanning is realized by adding 1 isolation coupling resistor of 20 omega into a column scanning bus, so that the stability of the LED is improved.

Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present utility model and should be understood that the scope of the utility model is not limited to such specific statements and embodiments. Various modifications and variations of the present utility model will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the scope of the claims of the present utility model.

Claims (7)

1. A bus type mining centralized control keyboard is characterized by comprising a main control board, an independent scanning key board and a matrix scanning key board, wherein the main control board is connected with the independent scanning key board and the matrix scanning key board through buses respectively;

The main control board comprises a core processor, a power supply unit and a bus interface, wherein the core processor is realized by adopting a chip with the model of STM32F407ZET 6;

The independent scanning key board comprises a P1 interface, a first matrix chip, independent keys and a first group of LED lamps, wherein the core processor is in communication connection with the first matrix chip through a bus, the P1 interface comprises an independent key bus interface connected with the core processor, a column scanning control bus interface connected with the first matrix chip and a row scanning control bus interface connected with the first matrix chip, and the independent keys and the first group of LED lamps are respectively connected with the P1 interface;

The matrix scanning key board comprises a CN1 interface, a second matrix chip, matrix keys and a second group of LED lamps, wherein the core processor is in communication connection with the second matrix chip through a bus, the CN1 interface comprises a matrix key bus interface connected with the core processor, a column scanning control bus interface connected with the second matrix chip and a row scanning control bus interface connected with the second matrix chip, and the matrix keys and the second group of LED lamps are respectively connected with the CN1 interface.

2. The bus type mining centralized control keyboard according to claim 1, wherein the first matrix chip and the second matrix chip are specifically realized by matrix scanning chips with the model number of CH 452A.

3. A bus type mining centralized control keyboard as claimed in claim 2, wherein each independent key is driven in a low-level effective manner by a switch key after passing through the bus.

4. A bus type mining centralized control keyboard as set forth in claim 3, wherein each independent key is further corresponding to a scanning line for acquiring the state of the independent key.

5. The bus type mining centralized control keyboard according to claim 4, wherein each scanning line is connected with 1 capacitor of 0.1uF in parallel to GND.

6. A bus type mining centralized control keyboard as claimed in claim 2, wherein each column scanning line of the matrix key is connected in parallel with a 10kΩ resistor, each 10kΩ resistor is also connected to a 3.3V power supply, and each column scanning line of the matrix key is also connected in series with a 20 Ω isolation coupling resistor.

7. The mining centralized control keyboard of claim 6, wherein an isolation coupling resistor of 20Ω is connected in series in each corresponding column scan line of the second set of LED lamps.