CN222028567U

CN222028567U - Computing device, optical signal memory expansion device and computing system

Info

Publication number: CN222028567U
Application number: CN202420358394.7U
Authority: CN
Inventors: 赵亚强; 黄涛; 梁永贵
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2024-02-26
Filing date: 2024-02-26
Publication date: 2024-11-19
Anticipated expiration: 2034-02-26

Abstract

Embodiments of the present application provide a computing device, an optical signal memory expansion device, and a computing system, and relate to the technical field of servers. The computing device includes a first circuit board, a processor, and a first optical interface module. The processor is disposed on the first circuit board and connected to the first circuit board. The first optical interface module is disposed on the first circuit board. The first optical interface module includes a first photoelectric conversion chip and a first optical interface, and the electrical interface of the first photoelectric conversion chip is connected to the first circuit board and connected to the processor through the first circuit board. The optical interface of the first photoelectric conversion chip is connected to the first optical interface, and the first optical interface is used to connect to the optical signal memory expansion device. In an embodiment of the present application, the computing device can support optical signal transmission. Optical signals are more suitable for long-distance transmission than electrical signals, which is conducive to the construction of computing device clusters and shared memory pools.

Description

Computing device, optical signal memory expansion device, and computing system

Technical Field

The embodiment of the application relates to the technical field of servers, in particular to a computing device, an optical signal memory expansion device and a computing system.

Background

The computing device includes a processor and a memory bank coupled to the processor, the processor capable of retrieving data stored in the memory bank and writing the data to the memory bank. Memory banks have limited storage capacity and in some cases require expansion of the memory of the computing device.

In the related art, when the memory of a computing device is extended, the memory extension device is usually required to be placed near the computing device, which affects the construction of a computing device cluster and a shared memory pool.

Disclosure of utility model

The embodiment of the application provides a computing device, an optical signal memory expansion device and a computing system, which are beneficial to the construction of a computing device cluster and a shared memory pool.

In one aspect, embodiments of the present application provide a computing device. The computing device includes a first circuit board, a processor, and a first optical interface conversion module. The processor is arranged on the first circuit board and connected with the first circuit board. The first optical interface module is arranged on the first circuit board and comprises a first photoelectric conversion chip and a first optical interface. The electric interface of the first photoelectric conversion chip is connected with the first circuit board and is connected with the processor through the first circuit board. The optical interface of the first photoelectric conversion chip is connected with the first optical interface, and the first optical interface is used for being connected with the optical signal memory expansion equipment.

In the embodiment of the application, the first photoelectric conversion chip of the first optical interface module is connected with the optical signal memory expansion device through the first optical interface, and the first photoelectric conversion chip of the first optical interface module is connected with the processor through the first circuit board, so that the first optical interface module can perform photoelectric conversion between the processor of the computing device and the optical signal memory expansion device.

In this way, optical fibers may be used to connect the computing device to the optical signal memory expansion device, and optical signals may be transmitted between the computing device and the optical signal memory expansion device via the optical fibers. Compared with the electrical signals, the optical signals are more suitable for long-distance transmission, so that the limitation of the computing equipment and the memory expansion equipment (optical signal memory expansion equipment) on the physical distance can be reduced, and the construction of the computing equipment cluster and the shared memory pool is facilitated.

In addition, the first photoelectric conversion chip of the first optical interface module is connected with the first circuit board, so that the main board of the computing device can directly output optical signals, namely, the computing device can support optical signal transmission, an external converter and the like are not needed, connection convenience of the computing device and the optical signal memory expansion device is improved, complexity of a computing device cluster and a shared memory pool in deployment is reduced, and cost of a computing system is reduced.

In some possible implementations, the number of the first optical interface modules is a plurality, the plurality of first optical interface modules are all connected with the first circuit board, and the first optical interfaces of the plurality of first optical interface modules are used for being connected with the plurality of optical signal memory expansion devices in a one-to-one correspondence manner. The configuration enables the processor to be connected with the plurality of optical signal memory expansion devices through the plurality of first optical interface modules, so that the computing device can expand more memories.

In some possible implementations, the number of processors is plural, and any one processor is connected to at least two first optical interface modules. By the arrangement, any processor can access at least two optical signal memory expansion devices through at least two first optical interface modules, so that the computing device can expand more memories.

In some possible implementations, the plurality of first optical interface modules are spaced apart. So set up, compare in the adjacent setting of a plurality of first optical interface modules, can do benefit to first optical interface module heat dissipation, ensure that first optical interface module can normally work.

In some possible implementations, the computing device further includes a generic interface disposed on the first circuit board and coupled to the processor. The universal interface is positioned between two adjacent first optical interface modules and is used for being connected with the electrical signal memory expansion equipment. It can be understood that, on the basis that the computing device includes the first optical interface module, the computing device is further provided with a universal interface, so that the computing device can be compatible with the electrical signal and the optical signal, and can be connected with the electrical signal memory expansion device and the optical signal memory expansion device, and the applicability of the computing device is improved. The universal interface is arranged between the two adjacent first optical interface modules, so that the universal interface can isolate the two adjacent first optical interface modules, heat dissipation of the first optical interface modules is facilitated, and normal operation of the first optical interface modules is ensured.

In some possible implementations, the first optical interface is connected to a side of the first photoelectric conversion chip facing away from the first circuit board. By the arrangement, shielding of the first photoelectric conversion chip on the first optical interface can be reduced, and connection convenience between the first optical interface and the optical signal memory expansion device is improved.

In some possible implementations, the computing device further includes a first heat dissipation component disposed on a side of the first optical interface module and in contact with the first photoelectric conversion chip. The arrangement can play a role in heat dissipation on the first optical interface module (especially the first photoelectric conversion chip) so as to ensure that the first optical interface module can work normally.

In another aspect, an embodiment of the present application provides a memory expansion device. The memory expansion device comprises a memory expansion card and a second optical interface module. The second optical interface module comprises a second photoelectric conversion chip and a second optical interface, the electrical interface of the second photoelectric conversion chip is connected with the memory expansion card, the optical interface of the second photoelectric conversion chip is connected with the second optical interface, and the second optical interface is used for being connected with the computing equipment. The second photoelectric conversion chip of the second optical interface module is connected with the computing device through the second optical interface, and the second photoelectric conversion chip of the second optical interface module is connected with the memory expansion card, so that the second optical interface module can perform photoelectric conversion between the processor of the computing device and the memory expansion card of the optical signal memory expansion device. In this way, optical fibers may be used to connect the computing device to the optical signal memory expansion device, and optical signals may be transmitted between the computing device and the optical signal memory expansion device via the optical fibers. Compared with the electrical signals, the optical signals are more suitable for long-distance transmission, so that the limitation of the computing equipment and the memory expansion equipment (optical signal memory expansion equipment) on the physical distance can be reduced, and the construction of the computing equipment cluster and the shared memory pool is facilitated.

In some possible implementations, the signal memory expansion device includes a third circuit board, and the second optical interface module is disposed on the third circuit board. The electrical interface of the second photoelectric conversion chip is connected with the third circuit board and is connected with the memory expansion card through the third circuit board. The second optical interface is connected to one side of the second photoelectric conversion chip, which is away from the third circuit board. The arrangement is such that the photoelectric conversion chip can be connected with the memory expansion card to perform photoelectric conversion between the memory expansion card and the computing device. And shielding of the second photoelectric conversion chip on the second optical interface can be reduced, and connection convenience between the second optical interface and the computing equipment is improved.

In some possible implementations, the number of second optical interface modules is a plurality. The second optical interface modules are connected with the memory expansion card, and the second optical interfaces of the second optical interface modules are used for being connected with the computing devices in a one-to-one correspondence mode. The memory expansion card can be connected with a plurality of computing devices through a plurality of second optical interface modules, so that the utilization rate of the optical signal memory expansion device is improved.

In some possible implementations, the plurality of second optical interface modules are spaced apart. So set up, compare in the adjacent setting of a plurality of second optical interface modules, can do benefit to second optical interface module heat dissipation, ensure that second optical interface module can normally work.

In some possible implementations, the computing device further includes a second heat dissipation component disposed on a side of the second optical interface module and in contact with the second photoelectric conversion chip. The second optical interface module (especially the second photoelectric conversion chip) can be subjected to heat dissipation, so that the second optical interface module can work normally.

In yet another aspect, embodiments of the present application provide a computing system. The computing system comprises the computing device and the optical signal memory expansion device. The second optical interface of the optical signal memory expansion device is connected with the first optical interface of the computing device through an optical fiber.

The computing system provided by the embodiment of the application comprises the computing device and the optical signal memory expansion device, so that the computing system has all the beneficial effects and is not repeated herein.

In some possible implementations, the computing system further includes an electrical signal memory expansion device that interfaces with a general purpose interface of the computing device via a general purpose cable. By the arrangement, the processor of the computing device can access the electrical signal memory expansion device and the optical signal memory expansion device, and the memory expansion rate of the computing device is improved.

In some possible implementations, the number of computing devices is multiple, and the number of optical signal memory expansion devices is multiple. The plurality of computing devices are connected with the plurality of optical signal memory expansion devices. By the arrangement, the connection flexibility between the computing equipment and the optical signal memory expansion equipment can be improved, and the computing equipment cluster and the shared memory pool can be built. And the optical signal memory expansion device connected with the computing device can be dynamically increased, reduced or changed, so that the flexibility in expanding the memory of the computing device is improved, and the utilization rate of the optical signal memory expansion device is improved.

In some possible implementations, the computing system further includes a memory conversion device including a controller, a plurality of third optical interface modules, and a plurality of fourth optical interface modules. The third optical interface module comprises a third photoelectric conversion chip and a third optical interface. The electrical interface of the third photoelectric conversion chip is connected with the controller, the optical interface of the third photoelectric conversion chip is connected with the third optical interface, and the third optical interface is used for being connected with the computing equipment. The fourth optical interface module comprises a fourth photoelectric conversion chip and a fourth optical interface. The electrical interface of the fourth photoelectric conversion chip is connected with the controller, the optical interface of the fourth photoelectric conversion chip is connected with the fourth optical interface, and the fourth optical interface is used for being connected with the optical signal memory expansion equipment. By the arrangement, the utilization rate of the optical signal memory expansion device can be improved, the expansion rate of the computing device is improved, and the requirements of a plurality of computing devices are met.

Drawings

FIG. 1 is a schematic diagram of a computing system according to some embodiments of the present application;

FIG. 2 is a schematic diagram of a computing device according to some embodiments of the application;

FIG. 3 is a schematic block diagram of a motherboard according to some embodiments of the present application;

FIG. 4 is a schematic diagram of a computing device according to further embodiments of the present application;

fig. 5 is a schematic structural diagram of a motherboard according to some embodiments of the present application;

fig. 6 is a schematic structural diagram of a first optical interface module according to some embodiments of the present application;

Fig. 7A is a schematic diagram illustrating a connection relationship between a first optical interface module and a first circuit board according to some embodiments of the present application;

FIG. 7B is a schematic diagram illustrating a connection relationship between a first optical interface module and a first circuit board according to other embodiments of the present application;

FIG. 8 is a schematic diagram illustrating connection relationships among a first optical interface module, a processor and an optical signal memory expansion device according to some embodiments of the present application;

FIG. 9 is a schematic block diagram of an optical signal memory expansion device according to some embodiments of the present application;

FIG. 10 is a schematic diagram illustrating a connection relationship between a computing device and an optical signal memory expansion device according to some embodiments of the present application;

fig. 11 is a schematic diagram of connection between a computing device and an optical signal memory expansion device according to another embodiment of the present application.

Detailed Description

The following description of the embodiments of the present disclosure will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by one of ordinary skill in the art based on the embodiments provided by the present disclosure are within the scope of the present disclosure.

Throughout the specification and claims, unless the context requires otherwise, the word "comprise" and its other forms such as the third person referring to the singular form "comprising" and the present word "comprising" are to be construed as open, inclusive meaning, i.e. as "comprising, but not limited to. In the description of the present specification, the terms "one embodiment," "some embodiments," "example embodiments," "examples," "particular examples," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.

As used herein, "parallel", "perpendicular", "equal" includes the stated case and an approximation to the stated case, the range of which is within an acceptable deviation range as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximately parallel, where the acceptable deviation range for approximately parallel may be, for example, a deviation within 5 °; "vertical" includes absolute vertical and near vertical, where the acceptable deviation range for near vertical may also be deviations within 5 °, for example. "equal" includes absolute equal and approximately equal, where the difference between the two, which may be equal, for example, is less than or equal to 5% of either of them within an acceptable deviation of approximately equal.

In describing some embodiments, the expression "connected" and its derivatives may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other.

FIG. 1 is a schematic diagram of a computing system according to some embodiments of the application. Fig. 2 is a schematic structural diagram of a computing device according to some embodiments of the present application. Fig. 3 is a schematic block diagram of a motherboard according to some embodiments of the present application.

As shown in FIG. 1, an embodiment of the present application provides a computing system 300. Computing system 300 may include computing device 100. Computing device 100 may be a server, computer, or the like that requires extended memory. In some examples, the number of computing devices 100 is multiple, and the variety of computing devices 100 may be the same or different. For example, a plurality of computing devices 100 located in an area may be referred to as a cluster of computing devices.

As shown in fig. 2, the computing device 100 may include a first housing 101 and a main board 110, where the main board 110 is located in a receiving space enclosed by the first housing 101. In some examples, motherboard 110 includes a first circuit board 111 and a processor 112, i.e., computing device 100 includes first circuit board 111 and processor 112, processor 112 being disposed on first circuit board 111 and connected to first circuit board 111.

The first circuit board 111 may be a printed circuit board (english: printed circuit board, english: PCB). The first circuit board 111 includes, for example, a plurality of conductive layers and insulating layers alternately stacked, and conductive traces are provided on the conductive layers, and the processor 112 may be connected to the conductive traces.

The processor 112 may be a central processing unit (english: central processing unit, english: CPU), an image processing unit (english: graphics processing unit, english: GPU), or other processing units. Embodiments of the present application do not further limit the type of processor 112.

In some examples, as shown in fig. 2 and 3, the number of processors 112 is plural, and the kinds of the plural processors 112 may be the same or different. The plurality of processors 112 are disposed on the first circuit board 111 at intervals, and are respectively connected to the first circuit board 111.

For example, the plurality of processors 112 may be disposed on the first circuit board 111 at intervals along the first direction X. Or a plurality of processors 112 may be disposed on the first circuit board 111 at intervals along the second direction Y. The first direction X intersects the second direction Y. The first direction X is, for example, perpendicular to the second direction Y.

As shown in fig. 2, the motherboard 110 may further include a first memory bank 113, where the first memory bank 113 is disposed on the first circuit board 111 and connected to the first circuit board 111. For example, a first memory slot may be disposed on the first circuit board 111, and the first memory stripe 113 is plugged into the first memory slot, so that the first memory stripe 113 can be connected to the first circuit board 111.

The first memory bank 113 is used for storing data. For example, the first memory bank 113 may be a dual inline memory module (english: dual inline memory modules, english: DIMM). For example, the first memory bank 113 may be a DDR memory module. The number of the first memory banks 113 may be plural, and the plural first memory banks 113 are disposed at intervals. The storage capacities of the plurality of first memory banks 113 may be the same or different.

It will be appreciated that the first memory bank 113 and the processor 112 are connected through the first circuit board 111, and that the processor 112 is capable of retrieving data stored in the first memory bank 113 and writing data into the first memory bank 113.

Taking the number of processors 112 as two, two processors 112 are arranged at intervals along the first direction X as an example, as shown in fig. 2, a plurality of first memory banks 113 are arranged at intervals along the first direction X on both sides of each processor 112. Alternatively, the two processors 112 may be disposed at intervals along the second direction Y, and the plurality of first memory banks 113 may be disposed at intervals along the second direction Y on both sides of each processor 112. It will be appreciated that a portion of the plurality of first memory banks 113 (one, two or more first memory banks 113) is connected to one processor 112, and another portion of the plurality of first memory banks 113 (one, two or more first memory banks 113) is connected to another processor 112.

By way of example, as shown in fig. 2, the motherboard 110 may also include electronics 115, such as capacitors, resistors, switches, etc., in addition to the processor 112 and the first memory bank 113. The plurality of electronic devices 115 are disposed on the first circuit board 111 at intervals and connected to the first circuit board 111.

It should be understood that the drawing (e.g., fig. 2) of the present application only shows a part of the components contained in the motherboard 110, the arrangement positions of the components, and the like, and is not limited to the case shown in the drawing of the present application.

In the field of artificial intelligence (full english: ARTIFICIAL INTELLIGENCE, abbreviated english: AI), various deep learning algorithms and models require a large amount of memory to store data and calculation results. For example, training a deep learning model requires a large amount of memory to store multiple data batches simultaneously for parallel computation. In addition, to improve model accuracy and generalization capability, a large amount of data is required to be used in the training process, which also requires a large amount of memory to store.

In the field of cloud computing, a large amount of memory is required for supporting various applications and services. For example, database services, cache services, message queues, etc. all require a large amount of memory to store data and run applications. Furthermore, virtualization technology in a cloud computing environment also requires a large amount of memory to support the operation of each virtual machine.

Memory expansion of computing device 100 is often required to meet the memory requirements of various applications. In some examples, computing system 300 may include a shared memory pool (english: memory pool) that includes at least one memory expansion device 200, i.e., computing system 300 includes memory expansion device 200. The memory expansion device 200 is connected to the computing device 100.

As shown in fig. 1, the memory expansion device 200 includes a second housing 201 and a memory expansion card 210, where the memory expansion card 210 is located in an accommodating space enclosed by the second housing 201. The memory expansion card 210 may be a high-speed computing interconnect expansion card (english: compute express link expander card, english: CXL expander card), and the memory expansion device 200 may be a CXL device (english: device). It is understood that CXL is a cache coherence interconnect protocol for supporting processors, memory extensions, and accelerators.

The memory expansion card 210 may include a second circuit board 211 and a memory 212, the memory 212 being connected to the second circuit board 211. The second circuit board 211 may be a PCB. The memory 212 is used to store data, and the memory 212 may include any one of a memory granule and a second memory bank to implement a memory function, as examples.

When the memory 212 includes a second memory bank, the second circuit board 211 is provided with a second memory slot, and the second memory bank is plugged into the second memory slot. The second memory bank may be a dual inline memory module (english: dual inline memory modules; english: DIMM). For example, the second memory bank may be a DDR memory module. The number of the second memory banks may be plural, and the plural second memory banks are disposed on the second circuit board 211 at intervals. The storage capacities of the plurality of second memory banks may be the same or different. The number of second memory banks and first memory banks 113, the storage capacity, and the like may be the same or different.

The storage capacity of the second memory bank may be 4GB (english: gigabyte), 8GB, 16GB, 32GB, 64GB, or the like. Memory expansion card 210 may include 2, 4, 8, or other numbers of second memory banks. For example, the number of second memory banks plugged onto the second circuit board 211 and the storage capacity of each second memory bank may be set according to the need. In some examples, the second memory slot on the second circuit board 211 may be full.

It will be appreciated that when memory expansion device 200 is connected to computing device 100, computing device 100 can access memory 212 of memory expansion card 210, thereby enabling processor 112 to write data to memory 212 and to retrieve data stored in memory 212 to enable memory expansion for computing device 100. The manner of connection between memory expansion device 200 and computing device 100 is illustrated below.

In some possible cases, as shown in fig. 2 and 3, the computing device 100 includes a universal interface (universal bay connector, abbreviated as UBC in english) 114, and the universal interface 114 is disposed on the first circuit board 111 and connected to the processor 112. By way of example, the generic interface 114 may be connected to a PCIe interface of the processor 112.

It will be appreciated that the universal interface 114 is a connector with plug and play functionality, and may be used to connect and disconnect external devices conveniently without additional configuration or operation, e.g., the universal interface 114 may connect or disconnect the memory expansion device 200 or a high-speed serial computing expansion bus standard (english: PERIPHERAL COMPONENT INTERCONNECT EXPRESS, english: PCIe) device.

The number of the universal interfaces 114 may be plural, and the plural universal interfaces 114 are disposed on the first circuit board 111 at intervals. Taking the number of processors 112 as two for example, the number of universal interfaces 114 may be eight as shown in fig. 2 and 3. Four of the universal interfaces 114 are coupled to one processor 112, and the other four universal interfaces 114 are coupled to another processor 112. In this way, the two processors 112 are enabled to be respectively connected to other devices (e.g., the memory expansion device 200) through different general-purpose interfaces 114.

By way of example, computing system 300 includes an electrical signal memory expansion device 200b, and generic interface 114 is used to connect with electrical signal memory expansion device 200 b.

For example, a first universal socket (not shown) may be provided on the first housing 101 of the computing device 100, the first universal socket being connected to the universal interface 114. The second housing 201 of the electrical signal memory expansion device 200b may be provided with a second universal socket (not shown) that is connected to the second circuit board 211 of the memory expansion card 210.

Connecting the first universal socket and the second universal socket using a universal cable (e.g., UBC cable) may enable the processor 112 to connect with the memory expansion card 210 of the electrical signal memory expansion device 200b, with electrical signals being transferred between the processor 112 and the memory expansion card 210 of the electrical signal memory expansion device 200b, enabling the processor 112 to access the memory 212 to effect memory expansion for the computing device 100.

However, the electrical signal decays rapidly and is not suitable for long-range transmission, which places a limit on the physical distance between the computing device 100 and the memory expansion device 200 (electrical signal memory expansion device 200 b). In this way, the placement of the computing device 100 and the memory expansion device 200 is limited to a great extent, which affects the construction of the computing device cluster and the shared memory pool.

If long-distance transmission of the electrical signal is achieved using UBC cable, it is necessary to increase the strength of the electrical signal by means of additional devices (e.g., repeater or amplifier, etc.) in order to secure the signal quality. In this way, transmission latency increases and the complexity of the connection between computing device 100 and memory expansion device 200 increases, resulting in increased cost of computing system 300.

FIG. 4 is a schematic diagram of a computing device according to further embodiments of the present application. Fig. 5 is a schematic structural diagram of a motherboard according to some embodiments of the present application. Fig. 6 is a schematic structural diagram of a first optical interface module according to some embodiments of the present application. Fig. 7A is a schematic diagram illustrating a connection relationship between a first optical interface module and a first circuit board according to some embodiments of the present application. Fig. 7B is a schematic diagram illustrating a connection relationship between a first optical interface module and a first circuit board according to another embodiment of the application. Fig. 8 is a schematic diagram of connection relationships among a first optical interface module, a processor and an optical signal memory expansion device according to some embodiments of the present application.

Based thereon, embodiments of the present application provide a computing system 300. The computing system 300 includes a computing device 100 and an optical signal memory expansion device 200a. The optical signal memory expansion device 200a is connected to the computing device 100 through an optical fiber (english: cable).

It will be appreciated that the amount of data transmitted by the optical fiber and the speed at which the data is transmitted are much greater than those of copper cables (e.g. UBC cables), and that the stability of the signal is maintained over long distances, making the optical fiber suitable for long distance transmission. In addition, the optical fiber has strong electromagnetic interference resistance, the error rate is very low, the interference from industrial environments such as transformer stations, heating, ventilation and the like is small, and the signal transmission reliability is improved. In addition, the diameter of the optical fiber is very small, for example, the diameter of a single OM3 type multimode optical fiber is about 2mm (unit: millimeter), so that the space is saved and the installation is easy. Optical fibers also have the characteristic of low power consumption during transmission, which makes them advantageous in terms of energy efficiency. That is, the optical fiber has the advantages of suitability for long-distance transmission, high transmission speed, strong electromagnetic interference resistance, small volume, light weight, low power consumption and the like.

In this way, the computing device 100 and the optical signal memory expansion device 200a are connected through the optical fiber, and the optical signal can be transmitted between the computing device 100 and the optical signal memory expansion device 200a through the optical fiber, so that the physical distance between the computing device 100 and the memory expansion device 200 (the optical signal memory expansion device 200 a) is not limited by transmission, and the physical distance between the computing device 100 and the memory expansion device 200 (the optical signal memory expansion device 200 a) can be prolonged, which is beneficial to long-distance connection of the computing device and the shared memory pool, and a larger-scale shared memory pool can be built.

In addition, because the loss of the optical signal transmitted by the optical fiber is small, devices such as an amplifier or a repeater are not required to be arranged even if the optical signal is transmitted for a long distance, the connection structure between the computing device 100 and the memory expansion device 200 (the optical signal memory expansion device 200 a) is simplified, the connection convenience between the computing device and the memory expansion device is improved, and the cost of the computing system 300 is reduced.

By way of example, the physical distance between the computing device 100 and the optical signal memory expansion device 200a may be between 30 meters and 100 meters, which is sufficient to enable a cross-distance setup in the computing system 300, which is advantageous for long-distance setup between the computing device cluster and the shared memory pool.

It will be appreciated that the physical distance between the computing device 100 and the optical signal memory expansion device 200a may be set to other values according to the requirement, and the value of the physical distance between the computing device 100 and the optical signal memory expansion device 200a is not further limited in the embodiments of the present application.

The structures of the computing device 100 and the optical signal memory expansion device 200a are respectively illustrated below.

In some examples, as shown in fig. 4 and 5, the computing device 100 includes a motherboard 110, the motherboard 110 includes a first circuit board 111, a processor 112, and a first optical interface module 120, i.e., the computing device 100 includes the first circuit board 111, the processor 112, and the first optical interface module 120. The processor 112 is disposed on the first circuit board 111 and is connected to the first circuit board 111.

It should be understood that the foregoing embodiments of the present application have been illustrated for the first circuit board 111 and the processor 112, etc., and will not be described herein. The first optical interface module 120 is illustrated below.

In some examples, as shown in fig. 4 and 5, the first optical interface module 120 is disposed on the first circuit board 111. The first optical interface module 120 includes a first photoelectric conversion chip 125 and a first optical interface 121. The electrical interface 125b of the first photoelectric conversion chip 125 is connected to the first circuit board 111, and is connected to the processor 112 through the first circuit board 111. The optical interface 125a of the first photoelectric conversion chip 125 is connected to the first optical interface 121, and the first optical interface 121 is used to connect to the optical signal memory expansion device 200 a.

The first optical interface 121 may be a connector. By way of example, the first optical interface 121 may be a PCIe X8 optical interface. It will be appreciated that the first optical interface 121 is configured to connect with the memory expansion card 210 of the optical signal memory expansion device 200 a. In some examples, the first optical interface 121 may be indirectly connected to the memory expansion card 210 of the optical signal memory expansion device 200a through other optical-to-electrical conversion means (e.g., the second optical interface 221 of the second optical interface module 220).

In some examples, as shown in fig. 6 and 7A, the first optical interface module 120 further includes a first electrical interface 122, which first electrical interface 122 may be a connector. The electrical interface 125b of the first photoelectric conversion chip 125 is connected to the first electrical interface 122, and the first electrical interface 122 is connected to the first circuit board 111, so that the first photoelectric conversion chip 125 can be connected to the processor 112 through the first circuit board 111.

For example, as shown in fig. 6, the first optical interface 121 and the first electrical interface 122 may be disposed opposite to each other along a third direction Z intersecting a plane in which the first direction X and the second direction Y are located. In some examples, the third direction Z is perpendicular to a plane in which the first direction X and the second direction Y lie.

In some examples, as shown in fig. 7A, the first electrical interface 122 is proximate to the first circuit board 111 relative to the first optical interface 121, the first optical interface 121 being located on a side of the first photoelectric conversion chip 125 facing away from the first circuit board 111.

By this arrangement, the connection convenience between the first electrical interface 122 and the first circuit board 111 can be improved. And the influence of the first photoelectric conversion chip 125 on the first optical interface 121 can be reduced, and the connection convenience between the first optical interface 121 and the optical signal memory expansion device 200a can be improved.

In other examples, the first optical interface module 120 may also include only the first optical interface 121 and not include the first electrical interface 122, as shown in fig. 7B, where the electrical interface 125B of the first photoelectric conversion chip 125 is directly connected to the first circuit board 111 and connected to the processor 112 through the first circuit board 111. The arrangement is beneficial to miniaturization of the first optical interface module 120 and can improve the integration level between the first optical interface module 120 and the first circuit board 111.

The embodiment of the present application takes the first optical interface module 120 including the first optical interface 121 and the first electrical interface 122 as an example, and the description is continued.

As shown in fig. 8, the first photoelectric conversion chip 125 is connected to the processor 112 through the first electrical interface 122, and the optical interface 125a of the first photoelectric conversion chip 125 is connected to the optical signal memory expansion device 200a through the first optical interface 121, so that the processor 112 can be connected to the memory 212 through the first optical interface module 120 to realize memory expansion for the computing device 100.

The first photoelectric conversion chip 125 can realize a photoelectric conversion function, that is, the first photoelectric conversion chip 125 can convert not only an electric signal into an optical signal but also an optical signal into an electric signal. As an example, as shown in fig. 8, the first photoelectric conversion chip 125 includes a first electronic integrated circuit (english: electronic integrated circuit, abbreviated as EIC) 123 and a first photonic integrated circuit (english: photonic integrated circuits, abbreviated as PIC) 124, the first electronic integrated circuit 123 being capable of converting an electrical signal into an optical signal, and the first photonic integrated circuit 124 being capable of converting an optical signal into an electrical signal. The first electronic integrated circuit 123 and the first photonic integrated circuit 124 are connected to the first optical interface 121 and the first electrical interface 122, respectively, so that the first optical interface module 120 can implement a photoelectric conversion function.

The first photoelectric conversion chip 125 receives an electrical signal from the processor 112 through the first electrical interface 122, then converts the electrical signal into an optical signal, and transmits the optical signal to the optical signal memory expansion device 200a through the first optical interface 121. The first photoelectric conversion chip 125 is capable of receiving an optical signal from the optical signal memory expansion device 200a through the first optical interface 121, converting the optical signal into an electrical signal, and transmitting the electrical signal to the processor 112 through the first electrical interface 122.

In the embodiment of the present application, the first photoelectric conversion chip 125 of the first optical interface module 120 is connected to the optical signal memory expansion device 200a through the first optical interface 121, and the first photoelectric conversion chip 125 of the first optical interface module 120 is connected to the processor 112 through the first circuit board 111, so that the first optical interface module 120 can perform photoelectric conversion between the processor 112 of the computing device 100 and the optical signal memory expansion device 200 a.

In this manner, optical fibers may be used to connect computing device 100 to optical signal memory expansion device 200a, and optical signals may be transmitted between computing device 100 and optical signal memory expansion device 200a via the optical fibers. Compared with the electrical signals, the optical signals are more suitable for long-distance transmission, so that the limitation of the computing device 100 and the memory expansion device 200 (the optical signal memory expansion device 200 a) on the physical distance can be reduced, and the construction of the computing device cluster and the shared memory pool is facilitated.

In addition, the first photoelectric conversion chip 125 of the first optical interface module 120 in the embodiment is connected with the first circuit board 111, so that the motherboard 110 of the computing device 100 can directly output optical signals, that is, the computing device 100 can support optical signal transmission, no external converter is required to be arranged, so that the connection convenience of the computing device 100 and the optical signal memory expansion device 200a is improved, the complexity of the computing device cluster and the shared memory pool in deployment is reduced, and the cost of the computing system 300 is reduced.

In some examples, as shown in fig. 4 and 5, the number of first optical interface modules 120 is a plurality. The plurality of first optical interface modules 120 are connected to the first circuit board 111, and the first optical interfaces 121 of the plurality of first optical interface modules 120 are used for being connected to the plurality of optical signal memory expansion devices 200a in a one-to-one correspondence manner.

It is understood that the electrical interfaces 125b of the first photoelectric conversion chips 125 of the plurality of first optical interface modules 120 are respectively connected to the first circuit board 111, so that the plurality of first optical interface modules 120 can be respectively connected to the processor 112 through the first circuit board 111. For example, the electrical interfaces 125b of the plurality of first photoelectric conversion chips 125 may be connected to the plurality of first electrical interfaces 122 in a one-to-one correspondence, and the plurality of first electrical interfaces 122 may be connected to the first circuit board 111, respectively.

The number of the first optical interface modules 120 may be the same as or different from the number of the processors 112. One processor 112 may be connected to one first optical interface module 120, and one processor 112 may also be connected to two, three, or more first optical interface modules 120.

It may be appreciated that the optical interfaces 125a of the first photoelectric conversion chips 125 of the plurality of first optical interface modules 120 are connected in one-to-one correspondence with the plurality of first optical interfaces 121, and the plurality of first optical interfaces 121 are connected in one-to-one correspondence with the plurality of optical signal memory expansion devices 200a, so that the plurality of first optical interface modules 120 can be connected in one-to-one correspondence with the plurality of optical signal memory expansion devices 200 a.

By setting the number of the first optical interface modules 120 to be plural, the processor 112 can be connected to the plurality of optical signal memory expansion devices 200a through the plurality of first optical interface modules 120, so that the computing device 100 can expand more memories.

In some examples, as shown in fig. 4 and 5, any one of the processors 112 is connected to at least two first optical interface modules 120.

So configured, any one of the processors 112 is enabled to access at least two optical signal memory expansion devices 200a through at least two first optical interface modules 120, thereby enabling the computing device 100 to expand more memory.

In some examples, motherboard 110 also includes a generic interface 114. The universal interface 114 is used to connect with the electrical signal memory expansion device 200 b.

In some examples, the plurality of first optical interface modules 120 are spaced apart.

So set up, compare in the adjacent setting of a plurality of first optical interface module 120, can do benefit to first optical interface module 120 heat dissipation, ensure that first optical interface module 120 can normally work.

In some examples, the computing device 100 further includes a first heat dissipation component (not shown in the figures) disposed on a side of the first optical interface module 120 and in contact with the first photoelectric conversion chip 125.

For example, the first heat dissipation component may be a heat dissipation fin or heat dissipation silicone grease, etc. for dissipating heat of the first optical interface module 120. It is understood that the side of the first optical interface module 120 is parallel to the third direction Z. The first heat dissipation part may be located at one side of the first circuit board 111, and located at a side of the first optical interface module 120, and contact the first photoelectric conversion chip 125. The first heat sink member may be in direct contact with the first photoelectric conversion chip 125 or in indirect contact with the first photoelectric conversion chip.

For example, the number of the first heat dissipation members may be plural or plural. One first heat dissipation component may dissipate heat for one first optical interface module 120, and one first heat dissipation component may also dissipate heat for a plurality of first optical interface modules 120.

By providing the first heat dissipation component, the first optical interface module 120 (especially, the first photoelectric conversion chip 125) can be subjected to heat dissipation, so that the first optical interface module 120 can work normally.

In other examples, the first heat dissipation member may also be located on the top surface of the first photoelectric conversion chip 125 (the surface of the first photoelectric conversion chip 125 remote from the first circuit board 111). Or the first heat sink member may be located elsewhere.

By way of example, computing system 300 includes an optical signal memory expansion device 200a and an electrical signal memory expansion device 200b, the second optical interface 221 of optical signal memory expansion device 200a being coupled to the first optical interface 121 of computing device 100 via an optical fiber, and electrical signal memory expansion device 200b being coupled to the universal interface of computing device 100 via a universal cable.

It will be appreciated that the physical distance between the electrical signal memory expansion device 200b and the computing device 100 is relatively short, and that a universal cable (e.g., UBC cable) may be employed to connect the universal interface 114 of the computing device 100 and the electrical signal memory expansion device 200b, through which electrical signals are transmitted between the computing device 100 and the electrical signal memory expansion device 200 b. The physical distance between the optical signal memory expansion device 200a and the computing device 100 is far, and the optical signal may be transmitted between the computing device 100 and the optical signal memory expansion device 200a through an optical fiber by connecting the first optical interface module 120 of the computing device 100 and the optical signal memory expansion device 200a through an optical fiber.

On the basis that the computing device 100 includes the first optical interface module 120, the computing device 100 is further configured to include the universal interface 114, so that the computing device 100 can be compatible with electrical signals and optical signals, and can be connected with the electrical signal memory expansion device 200b and the optical signal memory expansion device 200a, thereby improving the applicability of the computing device 100.

In some examples, as shown in fig. 4 and 5, the universal interface 114 is located between two adjacent first optical interface modules 120. It can be appreciated that the universal interface 114 is located between two adjacent first optical interface modules 120, so that the universal interface 114 can isolate two adjacent first optical interface modules 120, which is beneficial to heat dissipation of the first optical interface modules 120, and ensures that the first optical interface modules 120 can work normally.

For example, as shown in fig. 4 and 5, one processor 112 may be connected with two universal interfaces 114 and two first optical interface modules 120. The two first optical interface modules 120 are disposed at intervals, and the two universal interfaces 114 are located between the two first optical interface modules 120 disposed at intervals.

In other examples, two universal interfaces 114 and two first optical interface modules 120 connected to the same processor 112 may also be sequentially and alternately arranged. In still other examples, two universal interfaces 114 connected to the same processor 112 are disposed adjacent, as are two first optical interface modules 120 connected to the same processor 112, and a universal interface 114 and a first optical interface module 120 connected to the same processor 112 are disposed adjacent.

Fig. 9 is a schematic block diagram of an optical signal memory expansion device according to some embodiments of the present application.

In some examples, as shown in fig. 9, the optical signal memory expansion device 200a includes a memory expansion card 210 and a second optical interface module 220. It should be understood that the foregoing embodiments of the present application have been illustrated for the memory expansion card 210, and will not be described herein. The second optical interface module 220 is illustrated below.

The second optical interface module 220 may be located in the second housing 201 of the optical signal memory expansion device 200 a. In some examples, the second optical interface module 220 includes a second photoelectric conversion chip (not shown in the figures) and a second optical interface 221. The electrical interface of the second photoelectric conversion chip is connected to the memory expansion card 210, the optical interface of the second photoelectric conversion chip is connected to the second optical interface 221, and the second optical interface 221 is used to connect to the computing device 100.

Illustratively, the electrical interface of the second photoelectric conversion chip is connected to the second circuit board 211 of the memory expansion card 210. The second optical interface 221 may be a connector. The second optical interface 221 may be a PCIe X8 optical interface, the second optical interface 221 being for connecting with the first optical interface 121 of the computing device 100.

In some examples, the optical signal memory expansion device 200a includes a third circuit board, the second optical interface module 220 is disposed on the third circuit board, and the electrical interface of the second photoelectric conversion chip is connected to the third circuit board and connected to the memory expansion card 210 through the third circuit board.

By way of example, the second optical interface module 220 may include a second electrical interface, which may be a connector. The electrical interface of the second photoelectric conversion chip is connected to the second electrical interface, the second electrical interface is connected to the third circuit board, and the third circuit board is connected to the second circuit board 211 of the memory expansion card 210, so that the second photoelectric conversion chip can be connected to the storage 212 of the memory expansion card 210.

The second optical interface 221 and the second electrical interface may be disposed opposite along the third direction Z. In some examples, the second electrical interface is close to the third circuit board relative to the second optical interface 221, and the second optical interface 221 is connected to a side of the second photoelectric conversion chip facing away from the third circuit board.

By the arrangement, the connection convenience between the second electrical interface and the third circuit board can be improved, shielding of the second optical interface 221 by the second photoelectric conversion chip can be reduced, and the connection convenience between the second optical interface 221 and the computing device 100 is improved.

In other examples, the second optical interface module 220 may also include only the second optical interface 221, and not include the second electrical interface, where the electrical interface of the second photoelectric conversion chip is directly connected to the third circuit board and is connected to the second circuit board 211 of the memory expansion card 210 through the third circuit board. The arrangement is beneficial to miniaturization of the second optical interface module 220, and the integration level between the second optical interface module 220 and the third circuit board can be improved.

The embodiment of the present application takes the second optical interface module 220 including the second optical interface 221 and the second electrical interface as an example, and the description will be continued.

The electrical interface of the second photoelectric conversion chip is connected to the memory expansion card 210, and the optical interface of the second photoelectric conversion chip is connected to the computing device 100 through the second optical interface 221, so that the processor 112 can be connected to the memory 212 through the second optical interface module 220 to realize memory expansion for the computing device 100.

The second photoelectric conversion chip can realize a photoelectric conversion function, that is, the second photoelectric conversion chip can not only convert an electric signal into an optical signal, but also convert the optical signal into an electric signal. The second photoelectric conversion chip includes a second electronic integrated circuit (english: electronic integrated circuit, abbreviated to EIC) capable of converting an electrical signal into an optical signal, and a second photonic integrated circuit (english: photonic integrated circuits, abbreviated to PIC) capable of converting an optical signal into an electrical signal, for example. The second electronic integrated circuit and the second photonic integrated circuit are connected to the second optical interface 221 and the second electrical interface, respectively, so that the second optical interface module 220 can implement a photoelectric conversion function.

The second photoelectric conversion chip receives the electrical signal from the memory expansion card 210 through the second electrical interface, then converts the electrical signal into an optical signal, and transmits the optical signal to the computing device 100 through the second optical interface 221. And, the second photoelectric conversion chip can receive the optical signal from the computing device 100 through the second optical interface 221, then convert the optical signal into an electrical signal, and send the electrical signal to the memory expansion card 210 through the second electrical interface.

As can be appreciated, the second photoelectric conversion chip of the second optical interface module 220 is connected to the computing device 100 through the second optical interface 221, and the second photoelectric conversion chip of the second optical interface module 220 is connected to the memory expansion card 210, so that the second optical interface module 220 can perform photoelectric conversion between the processor 112 of the computing device 100 and the memory expansion card 210 of the optical signal memory expansion device 200 a.

In some examples, memory expansion card 210 of optical signal memory expansion device 200a may be a multi-headed memory expansion card. It will be appreciated that the multi-headed memory expansion card includes a plurality of ports. When the memory expansion card 210 of the optical signal memory expansion device 200a is a multi-head memory expansion card, as shown in fig. 9, the number of the second optical interface modules 220 is plural. The plurality of second optical interface modules 220 are connected to the memory expansion card 210, and the second optical interfaces 221 of the plurality of second optical interface modules 220 are used for connecting to the plurality of computing devices 100 in a one-to-one correspondence.

It can be appreciated that the electrical interfaces of the second photoelectric conversion chips of the plurality of second optical interface modules 220 are respectively connected to the third circuit board, so that the plurality of second optical interface modules 220 can be respectively connected to the second circuit board 211 of the memory expansion card 210 through the third circuit board. For example, the electrical interfaces of the plurality of second photoelectric conversion chips may be connected in one-to-one correspondence with the plurality of second electrical interfaces, which are respectively connected with the third circuit board.

It may be appreciated that the optical interfaces of the second photoelectric conversion chips of the plurality of second optical interface modules 220 are connected in one-to-one correspondence with the plurality of second optical interfaces 221, and the plurality of second optical interfaces 221 are connected in one-to-one correspondence with the plurality of computing devices 100, so that the second optical interfaces 221 of the plurality of second optical interface modules 220 can be connected in one-to-one correspondence with the plurality of computing devices 100.

The number of the second optical interface modules 220 is set to be plural, so that the memory expansion card 210 can be connected with the plurality of computing devices 100 through the plurality of second optical interface modules 220, thereby improving the utilization rate of the optical signal memory expansion device 200 a.

For example, the number of the second optical interface modules 220 is the same as the number of the ports of the multi-head expansion card, and the plurality of second optical interface modules 220 are connected to the plurality of ports of the multi-head expansion card in a one-to-one correspondence.

In other examples, the memory expansion card 210 of the optical signal memory expansion device 200a may also be a single-ended memory expansion card, and it is understood that the single-ended memory expansion card includes one port. The number of the second optical interface modules 220 may be one, and the number of the second photoelectric conversion chips is also one. The electrical interface of the second photoelectric conversion chip is connected with the port of the single-head memory expansion card, and the optical interface of the second photoelectric conversion chip is connected with the computing device 100.

In some examples, optical signal memory expansion device 200a may include multiple memory expansion cards 210, any of which memory expansion cards 210 may be multi-headed memory expansion cards or single-headed memory expansion cards. Fig. 9 shows only one case of the optical interface memory expansion device 200a, and the number of memory expansion cards 210 and the number of second optical interface modules 220 included in the optical interface memory expansion device 200a according to the embodiment of the present application are not further limited.

In some examples, the plurality of second optical interface modules 220 are spaced apart.

Therefore, compared with the adjacent arrangement of the plurality of second optical interface modules 220, the arrangement can facilitate the heat dissipation of the second optical interface modules 220, and ensure that the second optical interface modules 220 can work normally.

In some examples, the computing device 100 further includes a second heat dissipation component (not shown in the figure) disposed on a side of the second optical interface module 220 and in contact with the second photoelectric conversion chip.

For example, the second heat dissipation component may be a heat dissipation fin or heat dissipation silicone grease, etc. for dissipating heat of the second optical interface module 220. It will be appreciated that the side of the second optical interface module 220 is parallel to the third direction Z. The second heat dissipation part may be located at one side of the third circuit board, and located at a side of the second optical interface module 220, and contact with the second photoelectric conversion chip. The second heat dissipation member may be in direct contact with the second photoelectric conversion chip or in indirect contact with the second photoelectric conversion chip.

For example, the number of the second heat dissipation members may be plural or plural. One second heat dissipation part may dissipate heat for one second optical interface module 220, and one second heat dissipation part may also dissipate heat for a plurality of second optical interface modules 220.

By arranging the second heat dissipation component, the second optical interface module 220 (especially the second photoelectric conversion chip) can be subjected to heat dissipation, so that the second optical interface module 220 can work normally.

In other examples, the second heat dissipation member may also be located on the top surface of the second photoelectric conversion chip (the surface of the second photoelectric conversion chip remote from the third circuit board). Or the second heat sink piece may be located elsewhere.

In some examples, the computing device 100 includes a first optical interface module 120 and the optical signal memory expansion device 200a includes a second optical interface module 220.

By way of example, a first optical receptacle (not shown) may be provided on the first housing 101 of the computing device 100, the first optical receptacle being connected to the first optical interface 121. The second housing 201 of the optical signal memory expansion device 200a may be provided with a second optical socket (not shown in the drawing) connected to the second optical interface 221. The first optical interface 121 and the second optical interface 221 can be connected by plugging one end of the optical fiber into the first optical socket and plugging the other end into the second optical socket.

The first electrical interface 122 receives the electrical signal from the processor 112, and the first photoelectric conversion chip 125 converts the electrical signal into an optical signal and transmits the optical signal to the second optical interface 221 via the first optical interface 121. The second optical interface 221 receives the optical signal, and the second photoelectric conversion chip converts the optical signal into an electrical signal and sends the electrical signal to the memory expansion card 210 of the optical signal memory expansion device 200a via the second electrical interface.

Similarly, the second electrical interface receives the electrical signal from the memory expansion card 210, and the second photoelectric conversion chip converts the electrical signal into an optical signal and sends the optical signal to the first optical interface 121 via the second optical interface 221. The first optical interface 121 receives the optical signal, and the first photoelectric conversion chip 125 converts the optical signal into an electrical signal and sends the electrical signal to the processor 112 via the first electrical interface 122.

In other examples, computing device 100 includes first optical interface module 120 and optical signal memory expansion device 200a does not include second optical interface module 220. At this time, a photoelectric conversion module may be disposed at a position close to the optical signal memory expansion device 200a, and the photoelectric conversion module includes a photoelectric conversion chip, which can realize a photoelectric conversion function. The first optical interface 121 is connected to an optical interface of the photoelectric conversion module, and an electrical interface of the photoelectric conversion module is connected to the memory expansion card 210.

The first electrical interface 122 receives the electrical signal from the processor 112, and the first photoelectric conversion chip 125 converts the electrical signal into an optical signal and transmits the optical signal to the optical interface of the photoelectric conversion module via the first optical interface 121. The optical interface of the photoelectric conversion module receives the optical signal, and the photoelectric conversion module converts the optical signal into an electrical signal and sends the electrical signal to the memory expansion card 210 of the optical signal memory expansion device 200a via the electrical interface of the photoelectric conversion module.

Similarly, the electrical interface of the photoelectric conversion module receives the electrical signal from the memory expansion card 210, and the photoelectric conversion module converts the electrical signal into an optical signal and sends the optical signal to the first optical interface 121 via the optical interface of the photoelectric conversion module. The first optical interface 121 receives the optical signal, and the first photoelectric conversion chip converts the optical signal into an electrical signal and sends the electrical signal to the processor 112 via the first electrical interface 122.

In still other examples, the computing device 100 does not include the first optical interface module 120 and the optical signal memory expansion device 200a includes the second optical interface module 220. At this time, the photoelectric conversion module may be disposed at a position close to the computing device 100. The electrical interface of the photoelectric conversion module is connected to the processor 112, and the optical interface of the photoelectric conversion module is connected to the second optical interface 221.

The electrical interface of the photoelectric conversion module receives the electrical signal from the processor 112, and the photoelectric conversion module converts the electrical signal into an optical signal and sends the optical signal to the second optical interface 221 via the optical interface of the photoelectric conversion module. The second optical interface 221 receives the optical signal, and the second photoelectric conversion chip converts the optical signal into an electrical signal and sends the electrical signal to the memory expansion card 210 of the optical signal memory expansion device 200a via the second electrical interface.

Similarly, the second electrical interface receives the electrical signal from the memory expansion card 210, and the second photoelectric conversion chip converts the electrical signal into an optical signal, and sends the optical signal to the optical interface of the photoelectric conversion module via the second optical interface 221. The optical interface of the photoelectric conversion module receives the optical signal, and the photoelectric conversion module converts the optical signal into an electrical signal and sends the electrical signal to the processor 112 via the electrical interface of the photoelectric conversion module.

Fig. 10 is a schematic diagram of connection between a computing device and an optical signal memory expansion device according to some embodiments of the present application. Fig. 11 is a schematic diagram of connection between a computing device and an optical signal memory expansion device according to another embodiment of the present application.

In some examples, as shown in fig. 10 and 11, the number of optical signal memory expansion devices 200a is plural, and a plurality of computing devices 100 are connected to a plurality of optical signal memory expansion devices 200 a.

It will be appreciated that the storage capacities of the plurality of optical signal memory expansion devices 200a may also be different. Multiple computing devices 100 are connected to multiple optical signal memory expansion devices 200a, i.e., one computing device 100 may be connected to one optical signal memory expansion device 200a, or one computing device 100 may be connected to multiple optical signal memory expansion devices 200 a. Similarly, one optical signal memory expansion device 200a may be connected to one computing device 100, or one optical signal memory expansion device 200a may be connected to a plurality of computing devices 100.

For example, the multiple computing devices 100 and the multiple optical signal memory expansion devices 200a may be directly connected, or may be connected through other components.

The plurality of computing devices 100 and the plurality of optical signal memory expansion devices 200a are connected, so that the connection flexibility between the computing devices 100 and the optical signal memory expansion devices 200a can be improved, and the construction of a computing device cluster and a shared memory pool is facilitated. And, the optical signal memory expansion device 200a connected to the computing device 100 can be dynamically increased, decreased or changed, flexibility in expanding the memory of the computing device 100 can be improved, and the utilization of the optical signal memory expansion device 200a can be improved.

In some examples, as shown in fig. 11, computing system 300 further includes memory translation device 310. For example, memory conversion device 310 may be a CXL switch (English: switch). The memory conversion device 310 may include a controller 312, a plurality of third optical interface modules 313, and a plurality of fourth optical interface modules 314.

As shown in fig. 11, the memory conversion device 310 further includes a fourth circuit board 311, and the controller 312, the plurality of third optical interface modules 313, and the plurality of fourth optical interface modules 314 are disposed on the fourth circuit board 311 and connected to the fourth circuit board 311.

In some examples, the third optical interface module 313 includes a third photoelectric conversion chip and a third optical interface 313a. The electrical interface of the third photoelectric conversion chip is connected to the controller, the optical interface of the third photoelectric conversion chip is connected to the third optical interface 313a, and the third optical interface 313a is used to connect to the computing device 100. The third optical interface 313a may be a connector. The plurality of third optical interfaces 313a of the plurality of third optical interface modules 313 can be connected with the plurality of computing devices 100 in a one-to-one correspondence. Exemplary.

The third optical interface module 313 also includes a third electrical interface, which may be a connector, for example. It is understood that the third electrical interfaces of the plurality of third optical interface modules 313 are all connected to the fourth circuit board 311, and are connected to the controller 312 through the fourth circuit board 311.

In some examples, the fourth optical interface module 314 includes a fourth photoelectric conversion chip and a fourth optical interface 314a. The electrical interface of the fourth photoelectric conversion chip is connected to the controller, the optical interface of the fourth photoelectric conversion chip is connected to the fourth optical interface 314a, and the fourth optical interface 314a is used to connect to the optical signal memory expansion device 200 a. It is understood that the plurality of fourth optical interfaces 314a of the plurality of fourth optical interface modules 314 can be connected to the plurality of optical signal memory expansion devices 200a in a one-to-one correspondence. By way of example, the fourth optical interface 314a may be a connector.

Illustratively, the fourth optical interface module 314 further includes a fourth electrical interface, which may be a connector. It is understood that the fourth electrical interfaces of the plurality of fourth optical interface modules 314 are all connected to the fourth circuit board 311, and are connected to the controller 312 through the fourth circuit board 311.

The third optical interface 313a may be an uplink port (english: UP port) of the memory conversion device 310, and the fourth optical interface 314a may be a downlink port (english: down port) of the memory conversion device 310.

It is appreciated that the controller 312 is capable of allocating at least a portion of the memory space of any one of the optical signal memory expansion devices 200a to any one of the computing devices 100. For example, as shown in fig. 11, the plurality of computing devices 100 includes a first computing device 100a, a second computing device 100b, a third computing device 100c, and a fourth computing device 100d. The plurality of optical signal memory expansion devices 200a includes a first optical signal memory expansion device 200a1, a second optical signal memory expansion device 200a2, a third optical signal memory expansion device 200a3, and a fourth optical signal memory expansion device 200a4. It will be appreciated that the first optical signal memory expansion device 200a1, the second optical signal memory expansion device 200a2, the third optical signal memory expansion device 200a3, and the fourth optical signal memory expansion device 200a4 can constitute a shared memory pool.

Taking the example that the controller 312 allocates at least a portion of the storage space of any one of the optical signal memory expansion devices 200a to any one of the computing devices 100, when the first computing device 100a needs to expand the memory, the memory conversion apparatus 310 may allocate at least a portion of the storage space of at least one of the first optical signal memory expansion device 200a1, the second optical signal memory expansion device 200a2, the third optical signal memory expansion device 200a3, and the fourth optical signal memory expansion device 200a4 to the first computing device 100a for connection.

When the first computing device 100a is connected to a part (one, two, or three) of the optical signal memory expansion devices 200a, the optical signal memory expansion devices 200a that are not connected to the first computing device 100a may be connected to other computing devices 100 (the second computing device 100b, the third computing device 100c, and the fourth computing device 100 d) according to the need.

For example, the memory conversion apparatus 310 may divide at least a portion of the storage space of the second optical signal memory expansion device 200a2, the third optical signal memory expansion device 200a3, and the fourth optical signal memory expansion device 200a4 into at least one of the second computing device 100b, the third computing device 100c, and the fourth computing device 100d according to the requirements of the second computing device 100b, the third computing device 100c, and the fourth computing device 100 d.

When the first computing device 100a does not need to expand the memory, the memory conversion apparatus 310 may disconnect the first optical signal memory expansion device 200a1 from the first computing device 100a, and return the first optical signal memory expansion device 200a1 to the shared memory pool.

The plurality of computing devices 100 and the plurality of optical signal memory expansion devices 200a are connected through the memory conversion device 310, so that the connection flexibility between the computing devices 100 and the optical signal memory expansion devices 200a is improved, the expansion rate of the computing devices 100 and the utilization rate of the optical signal memory expansion devices 200a are improved, and different use requirements are met.

In summary, the embodiments of the present application have at least the following advantages:

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A computing device, comprising:

a first circuit board;

a processor, the processor being disposed on the first circuit board and connected to the first circuit board; and,

A first optical interface module, wherein the first optical interface module is arranged on the first circuit board, the first optical interface module comprises a first photoelectric conversion chip and a first optical interface, the electrical interface of the first photoelectric conversion chip is connected to the first circuit board, and is connected to the processor through the first circuit board, the optical interface of the first photoelectric conversion chip is connected to the first optical interface, and the first optical interface is used to connect to an optical signal memory expansion device.

2. The computing device according to claim 1 is characterized in that the number of the first optical interface modules is multiple; the multiple first optical interface modules are all connected to the first circuit board, and the first optical interfaces of the multiple first optical interface modules are used to connect one-to-one with the multiple optical signal memory expansion devices.

3. The computing device according to claim 1 or 2 is characterized in that it also includes a universal interface, which is arranged on the first circuit board and connected to the processor; the universal interface is located between two adjacent first optical interface modules, and the universal interface is used to connect to an electrical signal memory expansion device.

4 . The computing device according to claim 3 , wherein the first optical interface is connected to a side of the first photoelectric conversion chip facing away from the first circuit board.

5 . The computing device according to claim 4 , further comprising a first heat dissipation component, which is disposed on a side of the first optical interface module and contacts the first photoelectric conversion chip.

6. An optical signal memory expansion device, comprising:

Memory expansion card;

A second optical interface module, wherein the second optical interface module comprises a second photoelectric conversion chip and a second optical interface, wherein the electrical interface of the second photoelectric conversion chip is connected to the memory expansion card, the optical interface of the second photoelectric conversion chip is connected to the second optical interface, and the second optical interface is used to connect to a computing device.

7. The optical signal memory expansion device according to claim 6 is characterized in that the number of the second optical interface modules is multiple; the multiple second optical interface modules are all connected to the memory expansion card, and the second optical interfaces of the multiple second optical interface modules are used to connect to the multiple computing devices in a one-to-one correspondence.

8. A computing system, comprising:

The computing device according to any one of claims 1 to 5;

The optical signal memory expansion device as described in claim 6 or 7, wherein the second optical interface of the optical signal memory expansion device is connected to the first optical interface of the computing device via an optical fiber.

9. The computing system according to claim 8 is characterized in that it also includes an electrical signal memory expansion device, and the electrical signal memory expansion device is connected to the universal interface of the computing device through a universal cable.

10. The computing system according to claim 8 or 9, further comprising a memory conversion device, wherein the memory conversion device comprises:

Controller;

a plurality of third optical interface modules, wherein the third optical interface module comprises a third photoelectric conversion chip and a third optical interface; the electrical interface of the third photoelectric conversion chip is connected to the controller, the optical interface of the third photoelectric conversion chip is connected to the third optical interface, and the third optical interface is used to connect to the computing device; and

A plurality of fourth optical interface modules, wherein the fourth optical interface module comprises a fourth photoelectric conversion chip and a fourth optical interface; the electrical interface of the fourth photoelectric conversion chip is connected to the controller, the optical interface of the fourth photoelectric conversion chip is connected to the fourth optical interface, and the fourth optical interface is used to connect to the optical signal memory expansion device.