CN221631566U - Push-pull pulse transformer test system - Google Patents
Push-pull pulse transformer test system Download PDFInfo
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- CN221631566U CN221631566U CN202323468231.9U CN202323468231U CN221631566U CN 221631566 U CN221631566 U CN 221631566U CN 202323468231 U CN202323468231 U CN 202323468231U CN 221631566 U CN221631566 U CN 221631566U
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Abstract
The utility model relates to a push-pull pulse transformer test system, which comprises a direct current power supply, a test module and a digital oscilloscope, wherein the test module comprises a control chip U1 and NMOS tubes Q1-2, an output pin of the control chip U1 is respectively connected with grids of the NMOS tubes Q1-2, drains of the NMOS tubes Q1-2 are connected with input pins of a tested pulse transformer, bias voltage pins and collector voltage pins of the control chip U1 are connected with the tested pulse transformer, the direct current power supply is connected with the control chip and the tested pulse transformer to form a test loop, the control chip U1 respectively controls on or off of the NMOS tubes Q1-2 by outputting positive level or zero level, and the tested pulse transformer is connected with the digital oscilloscope for measurement.
Description
Technical Field
The utility model relates to the field of transformer testing, in particular to a push-pull pulse transformer testing system.
Background
The pulse signal generator can be used for transmitting pulse signals to the pulse transformer and then testing the electrical performance of the pulse transformer through a digital oscilloscope, but the push-pull pulse transformer is provided with two input pins and a center tap, if the pulse signal generator directly transmits the pulse signals to the two input pins of the pulse transformer, the center tap is empty, the working condition and the actual discrepancy of the pulse transformer occur, the test result can deviate, and the existing pulse signal generator cannot simultaneously output unipolar pulses with the same pulse amplitude and 180 degrees of phase difference, if the center tap and the first input pin are connected to the pulse signal generator, the pulse transformer outputs positive pulse waveforms; and then the center tap and the second input pin are connected into a pulse signal generator, and the pulse transformer outputs a negative pulse waveform, namely when the pulse transformer is tested in two steps in a time-division manner, the pulse transformer outputs a positive pulse waveform or a negative pulse waveform, but the pulse transformer cannot completely output a bipolar pulse waveform, so that a test result is wrong.
Disclosure of Invention
In order to solve the defect that the test result of the prior art for testing the pulse transformer is wrong, the utility model provides a push-pull pulse transformer test system.
The technical scheme of the utility model is as follows: the push-pull pulse transformer test system comprises a direct current power supply, a test module and a digital oscilloscope, wherein the test module comprises a control chip U1 and NMOS (N-channel metal oxide semiconductor) tubes Q1-2, and the direct current power supply supplies power to the test module;
An output pin A of the control chip U1 is connected with a grid electrode of an NMOS tube Q1 through a resistor R1, a drain electrode of the NMOS tube Q1 is connected with a first input pin X1 of a pulse transformer to be tested, an output pin B of the control chip U1 is connected with a grid electrode of an NMOS tube Q2 through a resistor R2, and a drain electrode of the NMOS tube Q2 is connected with a second input pin X2 of the pulse transformer to be tested;
The positive electrode of the direct current power supply is connected with a bias voltage pin and a collector voltage pin of the control chip U1, the bias voltage pin and the collector voltage pin of the control chip U1 are connected with a center tap X3 of the pulse transformer to be tested through a resistor R3, the positive electrode of the direct current power supply is connected with the center tap X3 of the pulse transformer to be tested through the resistor R3, and the resistor R3 is connected with a capacitor C1 with the center tap X3 of the pulse transformer to be tested;
The negative electrode of the direct current power supply is connected with the grounding pin of the control chip U1, the negative electrode of the direct current power supply is respectively connected with the sources of the NMOS tubes Q1-2 through a resistor R4, and the grounding pin of the control chip U1 is respectively connected with the sources of the NMOS tubes Q1-2 through a resistor R4;
When the output pin A of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q1 to enable the NMOS tube Q1 to be conducted, the output pin B of the control chip U1 outputs zero level to the NMOS tube Q2 to enable the NMOS tube Q2 to be turned off;
When the output pin B of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q2 to enable the NMOS tube Q2 to be conducted, the output pin A of the control chip U1 outputs zero level to the NMOS tube Q1 to enable the NMOS tube Q1 to be turned off;
The output pin of the pulse transformer to be measured is connected with a resistor R5, the resistor R5 is connected with a digital oscilloscope, and the digital oscilloscope is used for measuring the pulse transformer to be measured.
Preferably, an inverting input pin of the control chip U1 is connected with a resistor R6;
The non-inverting input pin of the control chip U1 is connected with a resistor R7, and a resistor R8 is connected between the non-inverting input pin of the control chip U1 and the resistor R7;
the synchronous pin of the control chip U1 and the output pin of the oscillator are suspended;
The oscillating capacitor pin of the control chip U1 is connected with a capacitor C2, and a resistor R9 is connected between the oscillating capacitor pin of the control chip U1 and the capacitor C2;
The oscillating resistor pin of the control chip U1 is connected with a slide rheostat R10 for adjusting the working frequency of the tested pulse transformer;
The discharging pin of the control chip U1 is connected with a resistor R9;
A soft start pin of the control chip U1 is connected with a capacitor C3;
The reference voltage pin of the control chip U1 is connected with a capacitor C4, and the reference voltage pin of the control chip U1 is also connected with a resistor R8;
the compensation pin of the control chip U1 is connected with a capacitor C5;
The compensation pin of the control chip U1 is also sequentially connected with a resistor R11 and a capacitor C6;
The turn-off pin, the resistor R6, the resistor R7, the capacitor C2, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6 and the sliding rheostat of the control chip U1 are connected and then connected with the negative electrode of the power supply.
Preferably, the capacitor C1 is a capacitor with a polarity, the positive electrode of the capacitor C1 is connected with the resistor R3 and the center tap X3 of the pulse transformer to be tested, and the negative electrode of the capacitor C1 is connected with the negative electrode of the dc power supply.
The utility model has the beneficial effects that: the system can test the output voltage, waveform parameters, working frequency and the like of the push-pull pulse transformer, and solves the problem that the test result in the prior art is wrong.
Drawings
FIG. 1 is a schematic block diagram of the present utility model;
FIG. 2 is a schematic diagram of a test module circuit;
FIG. 3 is a timing diagram of the output after testing according to the present utility model.
Detailed Description
In order to better understand the inventive concept, the following description of the technical solution of the present utility model refers to the accompanying drawings and specific embodiments.
A pulse transformer test system is shown in FIG. 1 and comprises a direct current power supply, a test module and a digital oscilloscope, wherein the test module comprises a control chip U1 and NMOS tubes Q1-2, the direct current power supply supplies power to the test module, and a control chip signal is a PWM control chip with the model SG3525 of the general electric company in the United states;
As shown in fig. 2, an output pin a of the control chip U1 is connected with a gate of the NMOS transistor Q1 through a resistor R1, a drain of the NMOS transistor Q1 is connected with a first input pin X1 of the pulse transformer to be tested, an output pin B of the control chip U1 is connected with a gate of the NMOS transistor Q2 through a resistor R2, and a drain of the NMOS transistor Q2 is connected with a second input pin X2 of the pulse transformer to be tested;
The positive pole of the direct current power supply is connected with the bias voltage pin and the collector voltage pin of the control chip U1, the bias voltage pin and the collector voltage pin of the control chip U1 are connected with the center tap X3 of the pulse transformer to be tested through a resistor R3, the positive pole of the direct current power supply is connected with the center tap X3 of the pulse transformer to be tested through a resistor R3, and the resistor R3 is connected with a capacitor C1 with the center tap X3 of the pulse transformer to be tested;
the negative electrode of the direct current power supply is connected with the grounding pin of the control chip U1, the negative electrode of the direct current power supply is respectively connected with the sources of the NMOS transistors Q1-2 through a resistor R4, and the grounding of the control chip U1 is respectively connected with the sources of the NMOS transistors Q1-2 through the resistor R4;
When the pin A of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q1 to enable the NMOS tube Q1 to be conducted, the pin B of the control chip U1 outputs zero level to the NMOS tube Q2 to enable the NMOS tube Q2 to be turned off;
When the output pin B of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q2, the NMOS tube Q2 is conducted, the output pin A of the control chip U1 outputs zero level to the NMOS tube Q1, and the NMOS tube Q1 is turned off;
the two output pins of the pulse transformer to be tested are respectively connected with two ends of a resistor R5, the two ends of the resistor R5 are connected with a digital oscilloscope, the digital oscilloscope is used for measuring the voltage at the two ends of the resistor R5, the voltage at the two ends of the resistor R5 is the output load voltage of the pulse transformer to be tested, meanwhile, the waveform parameters and the frequency of the pulse transformer to be tested can be measured by the digital oscilloscope, and the output time sequence diagram of the control chip U1 is shown in figure 3.
As can be seen from fig. 2, the control chip U1 of this model includes 16 pins, wherein the "-" pin of the control chip U1 is an inverting input pin, the "+" pin is an in-phase input terminal, the "CLK" pin is a synchronous pin, the "CLKO" pin is an oscillator output pin, the "CT" pin is an oscillating capacitor pin, the "RT" pin is an oscillating resistor pin, the "D" pin is a discharging pin, the "S" pin is a soft start pin, the "VREF" pin is a reference voltage pin, the "VI" pin is a bias voltage pin, the "B" pin is an output B pin, the "VC" pin is a collector voltage pin, the "GND" is a ground pin, the "a" pin is an output a pin, the "CKS" pin is a turn-off pin, the "OFFSET" pin is a compensation pin, and the connection relationships of other pins are as follows except for the above-mentioned pin connection relationships:
The inverting input pin of the control chip U1 is connected with a resistor R6, and when the pin is used for negative feedback control, the output voltage of the power supply is divided and then compared with a reference voltage;
The non-inverting input pin of the control chip U1 is connected with a resistor R7, a resistor R8 is connected between the non-inverting input pin of the control chip U1 and the resistor R7, and the pin is used for comparing a reference comparison voltage with a sampling voltage of an inverting terminal;
the synchronous pin of the control chip U1 and the output pin of the oscillator are suspended;
The oscillating capacitor pin of the control chip U1 is connected with a capacitor C2, and a resistor R9 is connected between the oscillating capacitor pin of the control chip U1 and the capacitor C2;
The oscillating resistor pin of the control chip U1 is connected with a sliding rheostat R10 for adjusting the frequency working frequency of the tested pulse transformer, wherein the working frequency is the voltage frequency, and the sliding rheostat can carry out numerical value adjustment according to the working frequency of the tested pulse transformer;
the discharging pin of the control chip U1 is connected with a resistor R9;
The soft start pin of the control chip U1 is connected with a capacitor C3;
The reference voltage pin of the control chip U1 is connected with a capacitor C4, the reference voltage pin of the control chip U1 is also connected with a resistor R8, and the reference voltage pin is used as the reference voltage of the error amplifier after voltage division;
The compensation pin of the control chip U1 is connected with a capacitor C5, the pin is used for compensating amplitude frequency and phase frequency response characteristics of the system, and the compensation pin of the control chip U1 is also connected with a resistor R11 and a capacitor C6 in sequence;
The turn-off pin of the control chip U1, the resistor R6, the resistor R7, the capacitor C2, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6 and the slide rheostat are connected with the negative electrode of the power supply, the turn-off pin of the control chip U1 is used for controlling the on-off of a chip circuit, the pin is in a high level when the circuit works normally, and the direct current power supply output voltage is higher than or lower than the voltage of the control chip U1 when the circuit is abnormal, so that the circuit of the control chip U1 is turned off to play a role in protection.
In order to maintain stable voltage in the circuit and filter clutter and interference signals in the direct current circuit, a capacitor C1 is a capacitor with polarity, the positive electrode of the capacitor C1 is respectively connected with a resistor R3 and a center tap X3 of a pulse transformer to be tested, and the negative electrode of the capacitor C1 is connected with the negative electrode of a direct current power supply.
Using the test method of the present utility model:
The pulse transformer to be tested is put into the test module, and unipolar pulse signals are respectively sent to NMOS tubes Q1-2 through an output A pin and an output B pin of a control chip U1, and the test result is not influenced by negative level due to the fact that the unipolar pulse signals have positive level and zero level only.
When the output pin A of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q1 to enable the NMOS tube Q1 to be conducted, the output pin B of the control chip U1 outputs zero to the NMOS tube Q2 to enable the NMOS tube Q2 to be turned off, current passes through the resistor R3, the center tap X3 of the pulse transformer to be tested, the first input pin X1, the drain electrode and the source electrode of the NMOS tube Q1, the resistor R4 and the negative electrode of the DC power supply to form a loop, windings between the first input pin X1 and the center tap X3 of the pulse transformer to be tested are tested, and the pulse transformer to be tested outputs positive pulse waveforms to the digital oscilloscope;
When the output pin B of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q2 to enable the NMOS tube Q2 to be conducted, the output pin A of the control chip U1 outputs zero to the NMOS tube Q1 to enable the NMOS tube Q1 to be turned off, current passes through a resistor R3, a center tap X3 of a tested pulse transformer, a second input pin X2, a drain electrode and a source electrode of the NMOS tube Q2 from the positive electrode of a direct current power supply, a resistor R4 and the negative electrode of the direct current power supply to form a loop, windings between the second input pin X2 and the center tap X3 of the tested pulse transformer are tested, and the tested pulse transformer outputs positive pulse waveforms to a digital oscilloscope;
And finally, the digital oscilloscope measures the electrical performance data of the pulse transformer to be measured.
The foregoing description is only of the preferred embodiments of the present utility model and is not intended to limit the scope of the present utility model. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model are included in the protection scope of the present utility model.
Claims (3)
1. The push-pull pulse transformer test system comprises a direct current power supply, a test module and a digital oscilloscope, and is characterized in that: the test module comprises a control chip U1 and NMOS tubes Q1-2, and the direct current power supply supplies power to the test module;
An output pin A of the control chip U1 is connected with a grid electrode of an NMOS tube Q1 through a resistor R1, a drain electrode of the NMOS tube Q1 is connected with a first input pin X1 of a pulse transformer to be tested, an output pin B of the control chip U1 is connected with a grid electrode of an NMOS tube Q2 through a resistor R2, and a drain electrode of the NMOS tube Q2 is connected with a second input pin X2 of the pulse transformer to be tested;
The positive electrode of the direct current power supply is connected with a bias voltage pin and a collector voltage pin of the control chip U1, the bias voltage pin and the collector voltage pin of the control chip U1 are connected with a center tap X3 of the pulse transformer to be tested through a resistor R3, the positive electrode of the direct current power supply is connected with the center tap X3 of the pulse transformer to be tested through the resistor R3, and the resistor R3 is connected with a capacitor C1 with the center tap X3 of the pulse transformer to be tested;
The negative electrode of the direct current power supply is connected with the grounding pin of the control chip U1, the negative electrode of the direct current power supply is respectively connected with the sources of the NMOS tubes Q1-2 through a resistor R4, and the grounding pin of the control chip U1 is respectively connected with the sources of the NMOS tubes Q1-2 through a resistor R4;
When the output pin A of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q1 to enable the NMOS tube Q1 to be conducted, the output pin B of the control chip U1 outputs zero level to the NMOS tube Q2 to enable the NMOS tube Q2 to be turned off;
When the output pin B of the control chip U1 outputs positive level to the grid electrode of the NMOS tube Q2 to enable the NMOS tube Q2 to be conducted, the output pin A of the control chip U1 outputs zero level to the NMOS tube Q1 to enable the NMOS tube Q1 to be turned off;
The output pin of the pulse transformer to be measured is connected with a resistor R5, the resistor R5 is connected with a digital oscilloscope, and the digital oscilloscope is used for measuring the pulse transformer to be measured.
2. A push-pull pulse transformer testing system according to claim 1, wherein:
the inverting input pin of the control chip U1 is connected with a resistor R6;
The non-inverting input pin of the control chip U1 is connected with a resistor R7, and a resistor R8 is connected between the non-inverting input pin of the control chip U1 and the resistor R7;
the synchronous pin of the control chip U1 and the output pin of the oscillator are suspended;
The oscillating capacitor pin of the control chip U1 is connected with a capacitor C2, and a resistor R9 is connected between the oscillating capacitor pin of the control chip U1 and the capacitor C2;
The oscillating resistor pin of the control chip U1 is connected with a slide rheostat R10 for adjusting the working frequency of the tested pulse transformer;
The discharging pin of the control chip U1 is connected with a resistor R9;
A soft start pin of the control chip U1 is connected with a capacitor C3;
The reference voltage pin of the control chip U1 is connected with a capacitor C4, and the reference voltage pin of the control chip U1 is also connected with a resistor R8;
the compensation pin of the control chip U1 is connected with a capacitor C5;
The compensation pin of the control chip U1 is also sequentially connected with a resistor R11 and a capacitor C6;
The turn-off pin, the resistor R6, the resistor R7, the capacitor C2, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6 and the sliding rheostat of the control chip U1 are connected and then connected with the negative electrode of the power supply.
3. A push-pull pulse transformer testing system according to claim 1, wherein: the capacitor C1 is a capacitor with polarity, the positive electrode of the capacitor C1 is respectively connected with the resistor R3 and the center tap X3 of the pulse transformer to be tested, and the negative electrode of the capacitor C1 is connected with the negative electrode of the direct current power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202323468231.9U CN221631566U (en) | 2023-12-19 | 2023-12-19 | Push-pull pulse transformer test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202323468231.9U CN221631566U (en) | 2023-12-19 | 2023-12-19 | Push-pull pulse transformer test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN221631566U true CN221631566U (en) | 2024-08-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202323468231.9U Active CN221631566U (en) | 2023-12-19 | 2023-12-19 | Push-pull pulse transformer test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN221631566U (en) |
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2023
- 2023-12-19 CN CN202323468231.9U patent/CN221631566U/en active Active
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