CN220963333U - GPU module and processing equipment - Google Patents

Abstract

The utility model relates to a GPU module and processing equipment. The GPU module comprises: the device comprises a plurality of GPU units, a rewiring layer, a substrate layer and a PCB, wherein the substrate layer comprises a plurality of substrates and an interlayer medium which is used for fixedly connecting the substrates together and is positioned between the adjacent substrates, and a plurality of substrate bumps are arranged on the bottom surface of each substrate; the rewiring layer is arranged on the top surface of the substrate layer, the bottom surface through which each GPU unit passes is provided with a plurality of chip bumps which are welded and fixed at the position above the rewiring layer and matched with the corresponding substrate, and each chip bump is connected to the corresponding substrate bump by virtue of a wire in the rewiring layer and a wire in the substrate; the substrate layer is welded and fixed on the top surface of the PCB by utilizing each substrate bump; at least one GPU unit is arranged above each substrate, so that the number of the GPUs which can be distributed by the GPU module is obviously increased, and the occupied main board space of the GPU module is small and the power consumption is low.

Description

GPU module and processing equipment

Technical Field

The utility model relates to the technical field of GPUs, in particular to a GPU module and processing equipment.

Background

Graphics processor (graphics processing unit, GPU), also known as display core, vision processor, display chip, is a microprocessor that is dedicated to image and graphics related operations on personal computers, workstations, game consoles, some mobile devices (e.g., tablet computers, smartphones, etc.), and the like. Because of the use of some devices, it is often necessary to deploy multiple GPUs. Taking a server as an example, because of the large calculation amount, as many GPUs as possible are needed, but in the related art, because the space required for installing a plurality of GPU modules on a motherboard is large, the number of installed servers is limited, the power consumption is very high, and how to provide a GPU setting mode capable of reducing the power consumption and saving the space is a technical problem to be solved.

Disclosure of utility model

In view of the above, the present utility model provides a GPU module and a processing device.

According to an aspect of the present utility model, there is provided a GPU module, the GPU module comprising: a plurality of GPU units, a rewiring layer, a substrate layer and a PCB,

The substrate layer comprises a plurality of substrates and interlayer media which are used for fixedly connecting the substrates together and are positioned between the adjacent substrates, and a plurality of substrate convex blocks are arranged on the bottom surface of each substrate;

The rewiring layer is arranged on the top surface of the substrate layer, the bottom surface through which each GPU unit passes is provided with a plurality of chip bumps which are welded and fixed at positions above the rewiring layer and matched with the corresponding substrate, and each chip bump is connected to a corresponding substrate bump by virtue of a wire in the rewiring layer and a wire in the substrate;

the substrate layer is welded and fixed on the top surface of the PCB by utilizing each substrate bump;

Wherein, at least one GPU unit is arranged above each substrate.

In one possible implementation, the GPU unit includes a GPU die; or the GPU unit includes a GPU die and a dynamic random access memory.

In one possible implementation of the present invention,

The GPU unit comprises a GPU bare chip, a high-bandwidth memory and an intermediate layer, and the bottom surface of the intermediate layer is provided with a plurality of chip bumps;

The GPU bare chip is welded and fixed on the top surface of the medium layer by using a plurality of first bumps arranged on the bottom surface, and each first bump is connected to a corresponding chip bump through a wire in the medium layer;

The high-bandwidth memory is welded and fixed on the top surface of the medium layer by a plurality of second bumps arranged on the bottom surface, and each second bump is connected to a corresponding chip bump through a wire in the medium layer.

In one possible implementation, the GPU unit further includes: and the packaging layer is used for packaging the GPU bare chip and the high-bandwidth memory.

In one possible implementation, the PCB is provided with one or more slots.

In one possible implementation, the PCB includes a plurality of PCBs, and a gap exists between adjacent PCBs, and the plurality of PCBs are fixedly connected together.

In one possible implementation, one or more slots are also provided on some or all of the plurality of PCBs.

In one possible implementation, the top surface and/or the top surface of the PCB is further provided with at least one input-output connector and at least one power connector,

Each input-output connector is used for realizing communication connection between the GPU module and external equipment;

Each of the power connectors is configured to connect to a power source that powers the GPU module.

In one possible implementation, the input-output connector and the power connector provided on the PCB are located in an edge region of the PCB, the PCB module further comprises a heat dissipation member,

The heat dissipation part comprises a shell and cooling liquid in the shell, the PCB is fixedly connected with the shell, the area of the PCB except for the edge area is positioned in the shell, the edge area of the PCB is positioned outside the shell, and the input-output connector and the power connector are positioned outside the shell, and the PCB and parts mounted on the area of the PCB except for the edge area are in contact with the cooling liquid;

wherein the cooling liquid is an insulating liquid.

In one possible embodiment, at least one fastening element is provided inside the housing, by means of which the PCB is fixedly connected to the housing.

In one possible implementation, the bottom surface of the PCB is provided with one or more voltage regulation modules and/or at least one other chip,

Each GPU unit is connected to a corresponding voltage regulating module through the PCB, and each voltage regulating module is used for controlling the voltage input into the connected GPU unit;

Each of the other chips is a control chip or a logic chip.

According to another aspect of the present utility model, there is provided a processing apparatus including: above-mentioned GPU module and mainboard, GPU module fixed mounting is in on the mainboard.

According to the GPU module and the processing equipment provided by the embodiment of the utility model, the number of the laid GPUs is obviously improved, the occupied main board space of the GPU module is small, the power consumption is low, and the number of the GPUs can be flexibly set according to the GPU use requirement of the equipment to be installed.

Other features and aspects of the present utility model will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the utility model and together with the description, serve to explain the principles of the utility model.

Fig. 1 and fig. 2 are schematic cross-sectional views of a GPU module according to an embodiment of the present utility model.

Fig. 3 and fig. 4 are schematic top views of a GPU module according to an embodiment of the present utility model.

Fig. 5 to fig. 6 are schematic diagrams respectively illustrating the structure of a GPU unit according to an embodiment of the present utility model.

Fig. 7-8 are schematic cross-sectional and top views of a GPU module according to embodiments of the present utility model.

Fig. 9-10 are schematic cross-sectional and top views of a GPU module according to embodiments of the present utility model.

Detailed Description

Various exemplary embodiments, features and aspects of the utility model will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

In addition, numerous specific details are set forth in the following description in order to provide a better illustration of the utility model. It will be understood by those skilled in the art that the present utility model may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present utility model.

In order to solve the technical problems, the utility model provides the GPU module and the processing equipment, the number of the laid GPUs is obviously improved, the occupied main board space of the GPU module is small, the power consumption is low, and the number of the GPUs can be flexibly set according to the GPU use requirements of equipment to be installed. As shown in fig. 1, the GPU module 10 includes a plurality of GPU units 100, a rewiring layer 200, a substrate layer 300, and a PCB 500.

The substrate layer 300 may include a plurality of substrates (substrates) 301, and an interlayer dielectric 302 fixedly connecting the plurality of substrates 301 together and between adjacent substrates 301, and a plurality of substrate bumps 400 are disposed on a bottom surface of each of the substrates 301. The surface of the substrate layer 300 on which the bottom surface of the substrate 301 is located is also the bottom surface of the substrate layer 300.

The redistribution layer 200 is disposed on a top surface (a surface opposite to a bottom surface of the substrate layer 300) of the substrate layer 300, a plurality of chip bumps 105 are disposed on the bottom surface through which each GPU unit 100 passes and are soldered and fixed at positions above the redistribution layer 200 matching with the corresponding substrate 301, and each chip bump 105 is connected to a corresponding one of the substrate bumps 400 by means of wires in the redistribution layer 200 and wires in the substrate 301.

The substrate layer 300 is soldered to the top surface of the PCB 500 using each of the substrate bumps 400.

In this embodiment, in the manufacturing process, a plurality of substrates 301 may be fixed on a temporary carrier according to preset positions, and then an interlayer medium is filled between the substrates 301 to realize the manufacture of the substrate layer 300, and the size of the substrate layer 300 may be 150mm×150-515 mm×515mm, for example, 500mm×500mm. The material of the interlayer dielectric is an insulating material. At least one GPU unit 100 is arranged above each substrate 301. In this way, the substrate layer 300 formed by the plurality of substrates 301 and the interlayer dielectric 302 uses the panel-level fan-out (fan out) to enable the strength of the substrate layer 300 to meet the mechanical strength requirement of the whole GPU module, reduce the stress of the GPU module (reduce the stress between the substrate layer 300 and the PCB 500), and simultaneously meet the power supply requirement of the GPU unit due to the arrangement of the substrate 301. Those skilled in the art may set the number of substrate layers and the size of each substrate in the GPU module according to actual needs, which is not limited by the present utility model. In some embodiments, the substrate bumps may be BALL grid arrays (BALL GRID ARRAY, BGA) such that the structural arrangement of the substrate layer 300 may reduce BGA stress between the substrate layer 300 and the PCB 500, further reducing GPU die set stress.

In this embodiment, the number of wiring layers of the redistribution layer 200 may be set according to the number of CPU units 100 to meet the electrical connection requirements of GPU modules 10 having different numbers of GPU units 100, which is not limited in the present utility model. In this way, the rewiring layer using panel level fanout enables P-2-P connections between GPU units and the substrate layer, as well as connections between different GPU units.

The interconnection density of the GPU module 10 provided in the present embodiment is significantly improved. The area S0 of the GPU unit 100 the ratio of the effective area S1 occupied by the GPU unit 100 on the PCB 500 is also significantly improved, and the S0/S1 ratio can be as high as 90% or even higher, and the chip occupation ratio per unit area is significantly improved (i.e., the number of GPU dies that can be disposed on the same area is significantly improved). Taking a server as an example, in the related art, the GPU is directly installed on a PCIe or OAM (e.g., SXM) board as one module, only 8-16 GPU modules can be installed on a server motherboard, and power consumption between the modules is very high. The interconnection density of the GPU module 10 installed in the server is at least 6 times that of the existing server (OAM to OAM or PCIe to PCIe). For example, if the effective area of each GPU on the PCB in the related art manner in which the GPUs are mounted on PCIe or OAM is 1650cm ² (the effective area may be larger for different mounting cases), the effective area of the GPU unit on the PCB 500 may also be reduced from 1650cm ² to at least 70cm ² in this example (the different GPU unit settings make the effective area different, which may also be larger than 70cm ² but still much smaller than 1650cm ²).

In one possible implementation, as shown in fig. 1-4, fig. 1 and 2 are cross-sectional views of fig. 3 and 4, where M is located, and only some parts are schematically shown in fig. 3 and 4 for simplicity and clarity. The PCB 500 in the GPU module 10 may be one, and one or more slots 501 are provided on the PCB 500, where each slot 501 is located in a region of the PCB 500 that is not connected to the substrate bump 400. In one possible implementation, the PCB 500 in the GPU module 10 may include multiple PCBs that may be fixedly connected together by way of a snap, bolt, or the like. In some embodiments, where PCB 500 includes multiple PCBs, gaps exist between adjacent PCBs. In some embodiments, where the PCB 500 includes a plurality of PCBs, one or more slots are provided on some or all of the plurality of PCBs, each slot being located on an area of the PCB that is not connected to the substrate bump 400.

In some embodiments, each slot 501 may be located in an area other than the corresponding mounting area of GPU unit 100. In some embodiments, each of the slots 501 may be located in other areas of the PCB 500 than the projected area of the substrate 301. In some embodiments, the slit may be an "open" slit as shown in fig. 3, 4. The slit may also be a closed strip, S-shaped or other shaped structure. In this way, the provision of the gaps reduces the stress to which the substrate layer 300 and the redistribution layer 200 are subjected, so that the overall GPU module has better reliability and stability in terms of structure.

Those skilled in the art may set the width, length, structural shape and position of the slit according to the size, thickness of the substrate layer 300 and the re-wiring layer 200, the number of the substrates 301 and the size of each substrate 301, which is not limited by the present utility model.

In one possible implementation, as shown in fig. 2, the bottom surface of the PCB 500 (the surface not connected to the substrate layer 300) is provided with one or more voltage regulation modules (Voltage Regulator Module, VRM) 602 and/or at least one other chip 601. Wherein. Each voltage adjustment module 602 is connected to a corresponding component such as the GPU unit 100, other chips 601, etc. that needs to perform input voltage control through the PCB 500, and each voltage adjustment module 602 is configured to control voltages input into the connected component such as the GPU unit 100, other chips 601, etc. so as to ensure stable operation of the GPU module 10. The voltage adjustment module 602 may convert the received larger external voltage to a smaller input voltage that may be used by components in the GPU module, e.g., 40V-60V, 0.75V, 1V, etc., to the components in the GPU module. For example, the input voltage converted from 54V is 0.75V, which is not limited by the present utility model. Other chips 601 may be different chips than GPU units, which are needed in GPU module 10, such as logic chips, control chips, etc., and the utility model is not limited in this regard.

In one possible implementation, as shown in fig. 2, GPU module 10 may also include at least one input output connector (IO connector) and at least one power connector (power connector). Each input/output connector may be disposed on the top surface or the bottom surface of the PCB 500, and each input/output connector is used to implement communication connection between the GPU module 10 and an external device; for example, input-output connectors may enable communication connections between GPU unit 100, other chips 601, and external devices. The power connector is for connection to a power source for powering the GPU module 10.

In this embodiment, the mounting positions of the voltage adjustment module 602, the other chips 601, the input/output connector, and the power connector on the PCB 500 may be set according to actual needs, which is not limited by the present utility model.

In one possible implementation, as shown in fig. 5, the GPU unit 100 may include a GPU die 101 and a dynamic random access memory (Dynamic Random Access Memory, DRAM) 108, and then the bumps provided on the bottom surfaces of the GPU die 101 and the dynamic random access memory 108 are the chip bumps 105. In some embodiments, the GPU unit 100 may also include only the GPU die 101, and then the bump disposed on the bottom surface of the GPU die 101 is the chip bump 105.

In one possible implementation, as shown in fig. 6, the GPU unit 100 may include a GPU die 101, an Interposer 104, a high bandwidth memory (High Bandwidth Memory, HBM) 102, and an encapsulation layer 106. The plurality of chip bumps 105 are provided on the bottom surface of the interposer 104 (the surface corresponding to the top surface of the interposer 104). The GPU die 101 is soldered to the top surface of the interposer 104 by using a plurality of first bumps 103 disposed on the bottom surface, and each of the first bumps 103 is connected to a corresponding one of the chip bumps 105 through wires in the interposer 104. The high bandwidth memory 102 is soldered to the top surface of the interposer 104 by using a plurality of second bumps 107 disposed on the bottom surface, and each of the second bumps 107 is connected to a corresponding one of the chip bumps 105 through a wire in the interposer 104. The encapsulation layer 106 is used to encapsulate the GPU die 101 and the high bandwidth memory 102. By arranging the high-bandwidth memory 102 in the GPU unit 100, the GPU bare chip 101 in the GPU unit 100 can directly utilize the high-bandwidth memory 102, so that the distance between the GPU bare chip 101 and the corresponding high-bandwidth memory 102 is shortened, the access speed and efficiency of the GPU bare chip 101 to the high-bandwidth memory 102 are improved, the working efficiency and speed of the GPU bare chip 101 are improved, and the power consumption of the GPU bare chip 101 is reduced.

In some embodiments, as shown in fig. 6, the encapsulation layer 106 covers only a partial area of the GPU die 101 and the high bandwidth memory 102, such as only encapsulating the exposed surface of the GPU die 101 and the high bandwidth memory 102 except the top surface (the surface opposite to the bottom surface), so that the overall thickness of the GPU unit 100 can be reduced, the size of the overall GPU unit 100 can be reduced, and the size of the overall GPU module 10 can be reduced.

In some embodiments, the GPU unit 100 may also include a GPU die 101, an interposer 104, and a high bandwidth memory 102, which are different from the GPU unit illustrated in fig. 6 only in that no encapsulation layer is provided, and the related structure description refers to the corresponding example in fig. 6, so that redundancy is omitted.

In one possible implementation, as shown in fig. 7-10, the GPU module 10 may also include a heat sink assembly 700. The heat dissipation member 700 may include a housing 701 and a cooling fluid 702 inside the housing 701. Wherein the cooling fluid 702 is sealed inside the housing 701, the cooling fluid 702 may be an insulating fluid. Wherein the input/output connector and the power connector provided on the PCB 500 may be located at an edge region of the PCB 500. The PCB 500 is fixedly connected to the housing 701 and the region of the PCB 500 other than the edge region is inside the housing 701 and the edge region of the PCB 500 is outside the housing 701, so that the components mounted on the PCB 500 and the region of the PCB 500 other than the edge region are in contact with the cooling liquid 702 while the input-output connector and the power connector are outside the housing 701. In this way, the input/output connector and the power connector are placed outside the housing 701, so that the GPU module 10 and the external device can be guaranteed to be normally connected, and meanwhile, heat dissipation and cooling of other components (GPU unit, other chips, voltage regulating module and the like) on the PCB 500 are realized by means of the cooling liquid 702 capable of flowing inside the housing 701. In addition, since most of the components of the GPU module 10 are located inside the housing 701, the heat dissipation component 700 also encapsulates the GPU module 10, and provides better guarantee for reliability and stability of the GPU module 10.

The cooling liquid 702 directly contacts with the components in the GPU module 10, so that the temperature of each component can be reduced to achieve heat dissipation, and the temperature difference between the components (such as the temperature difference between the substrate 301 and the PCB 500) can be reduced. In some embodiments, the material of the cooling fluid may be an oil-type fluorinated fluid or the like.

In this embodiment, the edge area of the PCB 500 located outside the housing 701 may be set according to actual needs, and the edge area exposed out of the housing 701 may be any one or more edge areas where 4 sides of the PCB 500 are located. For example, as shown in fig. 7 and 8, only an edge area of one side of the PCB 500 may be exposed to the housing 701. The housing 701 may be exposed at edge regions of opposite sides of the PCB 500 as shown in fig. 9 and 10, which is not limited in the present utility model.

In one possible implementation, as shown in fig. 7-10, at least one fixing member K may also be provided on the housing 701 of the heat dissipating member 700. So that the PCB 500 in the GPU module 10 can be fixed inside the housing 701 by means of the fixing means. The implementation of the fixing inside the housing 701 by means of the fixing element comprises: the utility model is not limited in this regard by means of clamping, bolting, rivet connection, direct bonding, etc.

For example, holes or slots may be disposed at positions on the PCB 500 corresponding to the fixing members K, so that the holes or slots on the PCB 500 can be clamped with the corresponding fixing members K to achieve a fixed connection, so as to ensure that the PCB 500 is fixed inside the housing 701 and does not shake due to the cooling fluid 702 of the housing 701. Or the position of the PCB 500 corresponding to the fixing member K may be provided with a limiting hole, so that the limiting hole of the PCB 500 may be fixedly connected with the corresponding fixing member K by a bolt or a rivet, thereby ensuring that the PCB 500 is fixed inside the housing 701 and does not shake due to the cooling fluid 702 of the housing 701, etc.

The utility model also provides processing equipment, which comprises a main board and the GPU module 10, wherein the GPU module 10 is fixedly arranged on the main board.

It should be noted that, although the GPU module and the processing device are described above by taking the above embodiments as examples, those skilled in the art will understand that the present utility model should not be limited thereto. In fact, the user can flexibly set each part according to personal preference and/or actual application scene, so long as the technical scheme of the utility model is met.

The foregoing description of embodiments of the utility model has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvements in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (12)

1. A GPU module, the GPU module comprising: a plurality of GPU units, a rewiring layer, a substrate layer and a PCB,

The substrate layer comprises a plurality of substrates and interlayer media which are used for fixedly connecting the substrates together and are positioned between the adjacent substrates, and a plurality of substrate convex blocks are arranged on the bottom surface of each substrate;

The rewiring layer is arranged on the top surface of the substrate layer, the bottom surface through which each GPU unit passes is provided with a plurality of chip bumps which are welded and fixed at positions above the rewiring layer and matched with the corresponding substrate, and each chip bump is connected to a corresponding substrate bump by virtue of a wire in the rewiring layer and a wire in the substrate;

the substrate layer is welded and fixed on the top surface of the PCB by utilizing each substrate bump;

Wherein, at least one GPU unit is arranged above each substrate.

2. The GPU module of claim 1, wherein the GPU unit comprises a GPU die; or the GPU unit includes a GPU die and a dynamic random access memory.

3. The GPU module of claim 1, wherein the GPU unit comprises a GPU die, a high bandwidth memory, and an interposer, a bottom surface of the interposer being provided with the plurality of chip bumps;

The GPU bare chip is welded and fixed on the top surface of the medium layer by using a plurality of first bumps arranged on the bottom surface, and each first bump is connected to a corresponding chip bump through a wire in the medium layer;

The high-bandwidth memory is welded and fixed on the top surface of the medium layer by a plurality of second bumps arranged on the bottom surface, and each second bump is connected to a corresponding chip bump through a wire in the medium layer.

4. A GPU module according to claim 3, wherein the GPU unit further comprises:

And the packaging layer is used for packaging the GPU bare chip and the high-bandwidth memory.

5. The GPU module of claim 1, wherein the PCB is provided with one or more slots.

6. The GPU module of claim 1, wherein the PCB comprises a plurality of PCBs, wherein gaps exist between adjacent PCBs, and wherein the plurality of PCBs are fixedly connected together.

7. The GPU module of claim 6, wherein one or more slots are further provided on some or all of the plurality of PCBs.

8. The GPU module of claim 1, wherein the top surface and/or the top surface of the PCB is further provided with at least one input-output connector and at least one power connector,

Each input-output connector is used for realizing communication connection between the GPU module and external equipment;

Each of the power connectors is configured to connect to a power source that powers the GPU module.

9. The GPU module of claim 1 or 8, wherein the input-output connector and the power connector are disposed on the PCB in an edge region of the PCB, the PCB module further comprising a heat sink member,

The heat dissipation part comprises a shell and cooling liquid in the shell, the PCB is fixedly connected with the shell, the area of the PCB except for the edge area is positioned in the shell, the edge area of the PCB is positioned outside the shell, and the input-output connector and the power connector are positioned outside the shell, and the PCB and parts mounted on the area of the PCB except for the edge area are in contact with the cooling liquid;

wherein the cooling liquid is an insulating liquid.

10. The GPU module of claim 9, wherein at least one securing member is disposed within the housing, the PCB being fixedly connected to the housing by the at least one securing member.

11. The GPU module of claim 1, wherein the bottom surface of the PCB is provided with one or more voltage regulation modules and/or at least one other chip,

Each GPU unit is connected to a corresponding voltage regulating module through the PCB, and each voltage regulating module is used for controlling the voltage input into the connected GPU unit;

Each of the other chips is a control chip or a logic chip.

12. A processing apparatus, comprising: a GPU module and a motherboard, wherein the GPU module is fixedly mounted on the motherboard, and the GPU module is a GPU module as claimed in any one of claims 1 to 11.