CN220798228U - Power amplifier drain voltage switching circuit - Google Patents

Abstract

The utility model discloses a power amplifier drain voltage switching circuit, comprising: the logic judging module is used for responding to the switch control signal and generating a first level signal; the driving module is electrically connected with the logic judging module and is used for responding to the first level signal and generating a second level signal; the power amplifier module comprises a power amplifier, is electrically connected with the driving module, and is used for responding to the second level signal, controlling the power amplifier in the power amplifier module to be on/off and generating a third level signal; and the negative electricity protection module is electrically connected with the power amplification module and the logic judgment module and is used for responding to the third level signal, generating an internal switch control signal according to the third level signal and sending the internal switch control signal to the logic judgment module. The technical scheme provided by the utility model can solve the technical problem of high production cost of the power amplifier with negative electricity protection in the prior art.

Description

Power amplifier drain voltage switching circuit

Technical Field

The utility model relates to the technical field of electronic components, in particular to a drain voltage switching circuit of a power amplifier.

Background

The power amplifier is the main amplifier of the transmitter radio frequency front end, converting the low power signal from the communication and radar device into a high power transmission signal that is sent to the antenna. The goal of a power amplifier is to gain increase the power of a signal without degrading the signal quality.

In the prior art, in order to reduce the overall power consumption of a system in application, a voltage switch needs to be added at the drain end of the power amplifier, the power amplifier is turned off when not in use, and a driving chip is generally required to drive and control the voltage switch, so that the cost is high. Meanwhile, in order to protect the power amplifier from being burnt out due to the power-on time sequence error of the positive and negative voltages, a special chip is used for carrying out negative protection on the power amplifier, but the cost of using the chip is high. Therefore, the drain voltage switch circuit of the power amplifier with the negative electricity protection function has higher production cost.

Disclosure of utility model

The utility model provides a power amplifier drain voltage switching circuit, which aims to effectively solve the technical problem of high production cost of the power amplifier drain voltage switching circuit with a negative electricity protection function in the prior art.

The utility model provides a power amplifier drain voltage switching circuit, comprising: the logic judging module is used for responding to the switch control signal and generating a first level signal; the driving module is electrically connected with the logic judging module and is used for responding to the first level signal and generating a second level signal; the power amplifier module comprises a power amplifier, is electrically connected with the driving module, and is used for responding to the second level signal, controlling the power amplifier in the power amplifier module to be on/off and generating a third level signal; and the negative electricity protection module is electrically connected with the power amplification module and the logic judgment module and is used for responding to the third level signal, generating an internal switch control signal according to the third level signal and sending the internal switch control signal to the logic judgment module.

Further, the logic judgment module includes: the source electrode of the first PMOS tube is connected with a power supply, the grid electrode of the first PMOS tube is electrically connected with an external electronic component, the grid electrode of the first PMOS tube is used for receiving the switch control signal, and the drain electrode of the first PMOS tube is used for outputting a voltage signal; the source electrode of the second PMOS tube is electrically connected with the drain electrode of the first PMOS tube, the grid electrode of the second PMOS tube is electrically connected with the negative electricity protection module, the drain electrode of the second PMOS tube is electrically connected with the driving module, the source electrode of the second PMOS tube is used for responding to a voltage signal output by the drain electrode of the first PMOS, the grid electrode is used for responding to the switch control signal, and the drain electrode is used for generating the first level signal; the source electrode of the first NMOS tube is grounded, the grid electrode of the first NMOS tube is electrically connected with an external electronic component, the drain electrode of the first NMOS tube is electrically connected with the driving module, and the drain electrode of the first NMOS tube is used for generating the first level signal; the source electrode of the second NMOS tube is grounded, the grid electrode of the second NMOS tube is electrically connected with the negative electric protection module, the drain electrode of the second NMOS tube is respectively electrically connected with the grid electrode of the third PMOS tube and the grid electrode of the third NMOS tube in the driving module, and the drain electrode of the second NMOS tube is used for generating the first level signal.

Further, the logic judgment module further includes: the second resistor comprises a first end and a second end which are electrically connected to the circuit, the first end is electrically connected with the grid electrode of the first PMOS and the grid electrode of the first NMOS tube respectively, and the second end is connected with a power supply.

Further, the driving module includes: the source electrode of the third PMOS tube V3 is connected with a power supply, the grid electrode of the third PMOS tube is respectively and electrically connected with the drain electrode of the first NMOS tube, the drain electrode of the second NMOS tube and the drain electrode of the second PMOS tube, the drain electrode of the third PMOS tube is electrically connected with the power amplifier module, and the drain electrode of the third PMOS tube is used for generating the second level signal; the grid electrode of the third NMOS tube is electrically connected with the drain electrode of the first NMOS tube, the drain electrode of the second NMOS tube and the drain electrode of the second PMOS tube respectively, the drain electrode of the third NMOS tube is electrically connected with the power amplifier module, the grid electrode of the third NMOS tube is used for responding to the first level signal, and the drain electrode of the third NMOS tube is used for generating the second level signal.

Further, the negative protection module includes: the base electrode of the NPN triode is grounded, the collector electrode of the NPN triode is connected with the power supply end, the emitter electrode of the NPN triode is connected with the power amplification module, the collector electrode of the NPN triode is used for generating an internal switch control signal, and the emitter electrode of the NPN triode is used for responding to a third level signal.

Further, the negative protection module further includes: the first resistor comprises a first end and a second end which are electrically connected to the circuit, the first end of the first resistor is connected with the power end, the second end of the first resistor R1 is electrically connected with the collector electrode of the NPN triode, and the collector electrode of the NPN triode is connected with the power end through the first resistor.

Further, the negative protection module further includes: and the twelfth resistor comprises a first end and a second end which are electrically connected with the circuit, wherein the first end of the twelfth resistor is connected with the base electrode of the NPN triode, the second end of the twelfth resistor is grounded, and the base electrode of the NPN triode is grounded through the twelfth resistor.

Further, the power amplifier module includes: the source electrode of the fourth PMOS tube is connected with the power supply end, the grid electrode of the fourth PMOS tube is electrically connected with the drain electrode of the third PMOS tube and the drain electrode of the third NMOS tube, and the drain electrode of the fourth PMOS tube is used for generating a voltage signal; the first end of the first amplifier is electrically connected with the drain electrode of the fourth PMOS tube; a sixth resistor, one end of which is electrically connected with the second end of the first amplifier, the other end of which is connected with the negative end, and the sixth resistor is used for generating the third level signal; and one end of the seventh resistor is electrically connected with the second end of the amplifier, and the other end of the seventh resistor is grounded.

Further, the power amplifier module further includes: one end of the first capacitor is electrically connected with the drain electrode of the fourth PMOS tube and the first end of the first amplifier, and the other end of the first capacitor is grounded;

one end of the second capacitor is electrically connected with the drain electrode of the fourth PMOS tube and the first end of the first amplifier, and the other end of the second capacitor is grounded.

Further, the power amplifier module further includes: the first end of the first capacitor is electrically connected with the drain electrode of the fourth PMOS tube and the first end of the first amplifier, and the second end of the first capacitor is grounded; the first end of the second capacitor is electrically connected with the drain electrode of the fourth PMOS tube and the first end of the first amplifier, and the second end of the second capacitor is grounded.

Further, the amplifier drain voltage switch circuit comprises at least two power amplifier modules, and all the power amplifier modules have the same circuit structure and connection relation.

Through one or more of the above embodiments of the present utility model, at least the following technical effects can be achieved:

In the technical scheme disclosed by the utility model, the negative electricity protection module is added on the power amplification module, so that the level signal generated by the power module can be detected, and a level signal is generated as an internal switching signal to control the on/off of the power amplifier, thereby realizing the protection effect of the power amplifier, and a special chip is not required to be additionally used for realizing the protection effect of the power amplifier, so that the production cost of the power amplifier is reduced.

The utility model uses NMOS tube and PMOS tube to form the driving circuit, replaces the driving chip to drive and control the voltage switch at the drain end of the power amplifier, and can drive multiple power amplifier modules at the same time if the power amplifier modules are provided with multiple paths, thereby reducing the complexity of the circuit and reducing the production cost.

Drawings

The technical solution and other advantageous effects of the present utility model will be made apparent by the following detailed description of the specific embodiments of the present utility model with reference to the accompanying drawings.

FIG. 1 is a logic diagram of a drain voltage switching circuit of a power amplifier according to an embodiment of the present utility model;

Fig. 2 is a circuit diagram of a drain voltage switching circuit of a power amplifier according to an embodiment of the present utility model.

Wherein, each reference sign in the figure represents:

V1, a first PMOS tube; v2, a second PMOS tube; v7, a first NMOS tube; v8, a second NMOS tube; v3, a third PMOS tube; v9, a third NMOS tube; v10, NPN triode;

V4, a fourth PMOS tube; c1, a first capacitor; c2, a second capacitor; PA1, a first amplifier; r1, a first resistor; r2, a second resistor; r3, a third resistor; r6, a sixth resistor; r7, a seventh resistor; r12, twelfth resistance.

Detailed Description

The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. It will be apparent that the described embodiments are only some, but not all, embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.

In the description of the present utility model, it should be noted that, unless explicitly specified and defined otherwise, the term "and/or" herein is merely an association relationship describing associated objects, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. The character "/" herein generally indicates that the associated object is an "or" relationship unless otherwise specified.

The embodiment of the utility model provides a drain voltage switching circuit of a power amplifier, which can detect a level signal generated by a power module and generate a level signal as an internal switching signal to control the on/off of the power amplifier, so that the protection effect of the power amplifier is realized, and a special chip is not required to be additionally used for realizing the protection effect of the power amplifier, thereby reducing the production cost of the power amplifier.

In addition, the NMOS tube and PMOS tube are used for forming the driving circuit, the driving chip is replaced to drive and control the drain voltage switch of the power amplifier, and if multiple paths of power amplifier modules are arranged, the multiple paths of power amplifier modules can be driven at the same time, so that the complexity of the circuit is reduced, and meanwhile, the production cost is reduced.

In the prior art, the control modes of the drain voltage switch of the existing power amplifier are as follows:

the grid electrode of the PMOS tube is controlled by using an integrated circuit driving chip, the voltage switching function of the drain end of the amplifier is realized, and the negative electricity protection circuit is realized by a special chip;

The grid electrode of the PMOS tube is directly controlled by using IO of the FPGA/MCU to realize the voltage switching function of the drain end of the amplifier;

a bipolar transistor and a plurality of resistors are used as grid control switches of the PMOS tube, so that the voltage switching function of the drain terminal of the amplifier is realized;

a triode and a plurality of resistors are used for forming a voltage time sequence protection circuit, and the voltage time sequence protection circuit does not have the power supply voltage turn-off function of an amplifier.

But they all have certain disadvantages such as:

The grid electrode of the PMOS tube is controlled by using an integrated circuit driving chip, the voltage switching function of the drain end of the amplifier is realized, and the negative electricity protection circuit is realized by a special chip; but the use of integrated circuits and dedicated chips is expensive and costly.

When the grid electrode of the PMOS tube is directly controlled by using the IO of the FPGA/MCU to realize the voltage switching function of the drain end of the amplifier, the drive current of the IO port of the chip is limited, and the simultaneous drive of the multiple paths of amplifiers cannot be met; the IO output voltage has limitation, and if the difference between the IO output voltage and the voltage of the drain terminal of the amplifier exceeds the threshold voltage of the PMOS, the PMOS switch cannot be controlled normally; there is no method to combine with the negative power-on time sequence to realize the negative protection effect.

When a bipolar transistor and a plurality of resistors are used as grid control switches of a PMOS (P-channel metal oxide semiconductor) tube to realize the voltage switching function of the drain terminal of the amplifier, the current limiting resistor cannot be set too small in value to cause limited driving capability and cannot load a plurality of devices under consideration of comprehensive power consumption and packaging power resistance; the negative protection function cannot be achieved.

A voltage time sequence protection circuit is formed by using a triode and a plurality of resistors, and when the voltage time sequence protection circuit does not have the power supply voltage turn-off function of an amplifier, the function of independently turning off the voltage of the drain terminal of the amplifier is not realized, and the low-power-consumption working state cannot be realized.

In order to solve the above problems, the embodiment of the application discloses the following technical scheme:

Fig. 1 is a logic diagram of a drain voltage switching circuit of a power amplifier according to an embodiment of the present utility model, where the drain voltage switching circuit of the power amplifier includes: the device comprises a logic judging module 1, a driving module 2, a power amplifier module 3 and a negative electricity protection module 4.

The logic judgment module 1 is used for responding to the switch control signal and generating a first level signal; the driving module 2 is electrically connected with the logic judging module 1 and is used for responding to the first level signal and generating a second level signal; the power amplifier module 3 comprises a power amplifier, which is electrically connected with the driving module 2 and is used for responding to the second level signal, controlling the power amplifier inside the power amplifier module 3 to be on/off and generating a third level signal; the negative electricity protection module 4 is electrically connected with the power amplification module 3 and the logic judgment module 1, and is used for responding to the third level signal, generating an internal switch control signal according to the third level signal, and sending the internal switch control signal to the logic judgment module 1.

In this embodiment, the switch control signals include an internal switch control signal and an external switch control signal, and the switch control signal (i.e., the external switch control signal) from the external input and the output signal (i.e., the internal switch control signal) of the negative protection module 4 are input to the logic determination module 1 at the same time, so as to perform logic determination.

When the external switch control signal is at a low level, the negative protection module 4 monitors whether the grid electrode of the amplifier is negative, if so, the negative protection module 4 outputs a low level signal, the logic judgment module 1 outputs a high level to the driving module 2, the driving module 2 drives the drain terminal switch of the multi-way amplifier to be opened, and the amplifier works normally. If the grid of the amplifier is not negatively charged, the negative protection module 4 outputs a high level, the logic judgment module 1 outputs a low level to the driving module 2, the driving module 2 turns off the drain switch of the amplifier until the grid of the amplifier is negatively charged, the drain switch of the amplifier is turned on, and the amplifier works normally.

When the switch control signal is at a high level, the logic judging module 1 outputs a low level to the driving module 2, the driving module 2 turns off the drain switch of the amplifier, the amplifier does not work, and the whole system is in a low power consumption state.

In particular, table 1 may be referred to for circuit operation logic in various situations:

Table 1 logical expression table for circuit operation

Therefore, the application can detect the level signal generated by the power module and generate a level signal as an internal switch signal to control the on/off of the power amplifier by adding the negative electricity protection module 4 on the power amplifier module 3, thereby realizing the protection effect of the power amplifier without using a special chip to realize the protection effect of the power amplifier, and reducing the production cost of the power amplifier.

In one embodiment, referring to fig. 2, the logic determination module 1 includes: the first PMOS tube V1, the second PMOS tube V2, the first NMOS tube V7 and the second NMOS tube V8;

The source electrode of the first PMOS tube V1 is connected with a power supply, the grid electrode of the first PMOS tube V1 is electrically connected with an external electronic component, the grid electrode of the first PMOS tube V1 is used for receiving a switch control signal, and the drain electrode of the first PMOS tube V1 is used for outputting a voltage signal; the source electrode of the second PMOS tube V2 is electrically connected with the drain electrode of the first PMOS tube V1, the grid electrode of the second PMOS tube is electrically connected with the negative electricity protection module 4, the drain electrode of the second PMOS tube is electrically connected with the driving module 2, the source electrode of the second PMOS tube V2 is used for responding to a voltage signal output by the drain electrode of the first PMOS, the grid electrode of the second PMOS tube is used for responding to a switch control signal, and the drain electrode of the second PMOS tube is used for generating a first level signal; the source electrode of the first NMOS tube V7 is grounded, the grid electrode is electrically connected with an external electronic component, the drain electrode is electrically connected with the driving module 2, and the drain electrode of the first NMOS tube V7 is used for generating a first level signal; the source electrode of the second NMOS tube V8 is grounded, the grid electrode of the second NMOS tube is electrically connected with the negative protection module 4, the drain electrode of the second NMOS tube V8 is respectively electrically connected with the grid electrode of the third PMOS tube V3 and the grid electrode of the third NMOS tube V9 in the driving module, and the drain electrode of the second NMOS tube V8 is used for generating a first level signal.

The logic judgment module 1 further includes: the second resistor R2 comprises a first end and a second end which are electrically connected to the circuit, the first end of the second resistor R2 is electrically connected with the grid electrode of the first PMOS tube V1 and the grid electrode of the first NMOS tube V7, the second end is connected with a power supply, and the grid electrode of the first NMOS tube V7 is electrically connected with the driving module 2 through the second resistor R2. In this embodiment, the second resistor R2 is a pull-up resistor.

The driving module 2 includes: the third PMOS tube V3 and the third NMOS tube V9;

The source electrode of the third PMOS tube V3 is connected with a power supply, the grid electrode of the third PMOS tube V3 is electrically connected with the drain electrode of the first NMOS tube V7 and the drain electrode of the second PMOS tube V2, the drain electrode of the third PMOS tube V3 is electrically connected with the power amplifier module 3, and the drain electrode of the third PMOS tube V3 is used for generating a second level signal;

The source electrode of the third NMOS tube V9 is grounded, the grid electrode of the third NMOS tube V9 is electrically connected with the drain electrode of the first NMOS tube V7 and the drain electrode of the second PMOS tube V2, the drain electrode of the third NMOS tube V9 is electrically connected with the power amplifier module 3, the grid electrode of the third NMOS tube V9 is used for responding to the first level signal, and the drain electrode of the third NMOS tube V9 is used for generating the second level signal.

The negative protection module 4 includes: the base electrode of the NPN triode V10 is grounded, the collector electrode is connected with the power supply end, the emitter electrode is connected with the power amplification module 3, the collector electrode of the NPN triode V10 is used for generating an internal switch control signal, and the emitter electrode is used for responding to a third level signal.

The negative protection module 4 further includes: the first resistor R1 comprises a first end and a second end which are electrically connected to the circuit, the first end of the first resistor R1 is connected with a power end, the second end of the first resistor R1 is electrically connected with a collector of the NPN triode V10, and the collector of the NPN triode V10 is connected with the power end through the first resistor R1. In this embodiment, the first resistor R1 is a pull-up resistor.

The negative protection module 4 further includes: the twelfth resistor R12, the twelfth resistor R12 includes a base electrode electrically connected to the first end and the second end of the circuit, the first end of the twelfth resistor R12 is connected to the base electrode of the NPN triode V10, the second end of the twelfth resistor R12 is grounded, and the base electrode of the NPN triode V10 is grounded through the twelfth resistor R12. In the present embodiment, the twelfth resistor R12 is a pull-down resistor.

The power amplifier module 3 includes: the fourth PMOS tube V4, the first amplifier PA1, the sixth resistor R6 and the seventh resistor R7; the source electrode of the fourth PMOS tube V4 is connected with the power supply end, the grid electrode of the fourth PMOS tube V4 is electrically connected with the drain electrode of the third PMOS tube V3 and the drain electrode of the third NMOS tube V9, and the drain electrode of the fourth PMOS tube V4 is used for generating a voltage signal; the first amplifier PA1 is electrically connected to two ends of the circuit, and the first end of the first amplifier PA1 is electrically connected with the drain electrode of the fourth PMOS tube V4; the sixth resistor R6 is electrically connected to two ends of the circuit, a first end of the sixth resistor R6 is electrically connected with a second end of the first amplifier PA1, a second end of the sixth resistor R6 is connected with a negative end, and the sixth resistor R6 is used for generating a third level signal; the seventh resistor R7 is electrically connected to two ends of the circuit, the first end of the seventh resistor R7 is electrically connected to the second end of the amplifier, and the second end of the seventh resistor R7 is grounded.

The power amplifier module 3 further includes: a third resistor R3; the third resistor R3 comprises a first end and a second end which are electrically connected to the circuit, the first end of the third resistor R3 is connected with a power end and is electrically connected with the source electrode of the fourth PMOS tube V4, and the second end of the third resistor R3 is electrically connected with the drain electrode of the third PMOS tube V3, the drain electrode of the third NMOS tube V9 and the grid electrode of the fourth PMOS tube V4. In this embodiment, the third resistor is a pull-up resistor.

The power amplifier module 3 further includes: a first capacitor C1 and a second capacitor C2; the first end of the first capacitor C1 is electrically connected with the drain electrode of the fourth PMOS tube V4 and the first end of the first amplifier PA1, and the second end of the first capacitor C1 is grounded; the first end of the second capacitor C2 is electrically connected with the drain electrode of the fourth PMOS tube V4 and the first end of the first amplifier PA1, and the second end of the second capacitor C2 is grounded.

The capacitor is used in the embodiment, so that clutter interference on a power supply can be filtered out when the power amplifier works normally, and stable work of the power amplifier is ensured.

The amplifier drain voltage switch circuit includes at least two power amplifier modules 3, and all the power amplifier modules 3 have the same circuit structure and connection relationship, specifically please refer to the circuits where the PA1 and PA2 … … PA3 are located on the right side in fig. 2, which is not described here again.

In this embodiment, when the switch control signal is at a low level, i.e. the switch is turned on, the negative electricity at the VG end is normal, at this time, the NPN triode V10 in the negative protection circuit is turned on, and the gate voltages of the second PMOS tube V2 and the second NMOS tube V8 are pulled down to a low level; in the logic judgment circuit, a first PMOS tube V1 and a second PMOS tube V2 are conducted, a first NMOS tube V7 and a second NMOS tube V8 are cut off, and at the moment, the grid voltages of a third PMOS tube V3 and a third NMOS tube V9 are pulled up to a high level VDD; in the driving circuit, at the moment, the third PMOS tube V3 is cut off, the third NMOS tube V9 is conducted, the third NMOS tube V9 has very small on resistance and strong driving capability, parasitic capacitance of the grid electrode of the switching tube (V4, V5 and V6) can be rapidly discharged, the grid electrode voltage is discharged to a low level, a voltage switch at the drain end of the amplifier is conducted, and the amplifier works normally.

When the switch control signal is at a low level, namely the switch is turned on, negative electricity at the VG end is not added, at the moment, triode NPN in the negative electricity protection circuit is cut off, and grid voltages of the MOS transistors V2 and V8 are pulled up to VDD; in the logic judgment circuit, a PMOS tube V2 is cut off, an NMOS tube V8 is conducted, and the grid voltages of V3 and V9 tubes are pulled down to a low level at the moment; in the driving circuit, the PMOS tube V3 is conducted, the NMOS tube V9 is cut off, the PMOS tube V3 has very small on-resistance and stronger driving capability, and parasitic capacitances of the grid electrodes of the switching tubes (V4, V5 and V6) can be charged rapidly, so that the grid electrode voltage is pulled up to a high level, a drain end voltage switch of the amplifier is closed, and the amplifier does not work.

When the switch control signal is at a high level, namely the switch is turned off, negative electricity at the VG end is not added, at the moment, an NPN triode V10 in the negative electricity protection circuit is cut off, and the grid voltages of a second PMOS tube V2 and a second NMOS tube V8 are pulled up to VDD; in the logic judgment circuit, the first PMOS tube V1 and the second PMOS tube V2 are cut off, the first NMOS tube V7 and the second NMOS tube V8 are conducted, and at the moment, the gate voltages of the third PMOS tube V3 and the third NMOS tube V9 are pulled down to a low level; in the driving circuit, at the moment, the third PMOS tube V3 is conducted, the third NMOS tube V9 is cut off, the third PMOS tube V3 has very small on-resistance and has stronger driving capability, parasitic capacitance of the grid electrode of the switching tube (V4, V5 and V6) can be charged rapidly, the grid electrode voltage is pulled up to a high level, a voltage switch at the drain end of the amplifier is cut off, and the amplifier does not work.

When the switch control signal is at a high level, namely the switch is turned off, negative electricity at the VG end is normal, at the moment, an NPN triode V10 in the negative electricity protection circuit is conducted, and the grid voltages of the second PMOS tube V2 and the second NMOS tube V8 are pulled down to a low level; in the logic judgment circuit, the first PMOS tube V1 and the second NMOS tube V8 are cut off, the first NMOS tube V7 is conducted, and at the moment, the gate voltages of the third PMOS tube V3 and the third NMOS tube V9 are pulled down to a low level; in the driving circuit, at the moment, the third PMOS tube V3 is conducted, the third NMOS tube V9 is cut off, the third PMOS tube V3 has very small on-resistance and has stronger driving capability, parasitic capacitance of the grid electrode of the switching tube (V4, V5 and V6) can be charged rapidly, the grid electrode voltage is pulled up to a high level, a voltage switch at the drain end of the amplifier is cut off, and the amplifier does not work.

Therefore, the drain voltage switching circuit of the power amplifier provided by the embodiment of the application realizes the switching and time sequence functions by using simple devices such as a triode, a MOS tube and the like, and has low cost; in addition, the switch driving circuit designed by the application has stronger driving capability, can drive the drain voltage switch of the 7-path low-power amplifier at the same time, simplifies the complexity of a control circuit in the design, has higher switching speed and can meet the use requirement of a high-performance circuit; the switch driving circuit designed by the application also combines the switch function with the negative electricity protection function, can switch the drain voltage of the low-power amplifier, and simultaneously protects the low-power amplifier from being burnt out due to instantaneous heavy current when the power-on time sequence of the low-power amplifier is normal; the switch drive designed by the application is also particularly suitable for FMCW radar, and after each frame of wave generation is finished, the plug-in low-power amplifier is closed, and before the wave generation, the low-power amplifier is opened again, so that the power consumption of the radar can be reduced, and the low-power working state can be realized.

In summary, although the present utility model has been described in terms of the preferred embodiments, the preferred embodiments are not limited to the above embodiments, and various modifications and changes can be made by one skilled in the art without departing from the spirit and scope of the utility model, and the scope of the utility model is defined by the appended claims.

Claims (11)

1. A power amplifier drain voltage switching circuit, comprising:

The logic judging module is used for responding to the switch control signal and generating a first level signal;

The driving module is electrically connected with the logic judging module and is used for responding to the first level signal and generating a second level signal;

the power amplifier module comprises a power amplifier, is electrically connected with the driving module, and is used for responding to the second level signal, controlling the power amplifier in the power amplifier module to be on/off and generating a third level signal;

and the negative electricity protection module is electrically connected with the power amplification module and the logic judgment module and is used for responding to the third level signal, generating an internal switch control signal according to the third level signal and sending the internal switch control signal to the logic judgment module.

2. The power amplifier drain voltage switching circuit of claim 1, wherein,

The logic judgment module comprises:

The source electrode of the first PMOS tube (V1) is connected with a power supply, the grid electrode of the first PMOS tube (V1) is electrically connected with an external electronic component, the grid electrode of the first PMOS tube (V1) is used for receiving the switch control signal, and the drain electrode of the first PMOS tube (V1) is used for outputting a voltage signal;

The source electrode of the second PMOS tube (V2) is electrically connected with the drain electrode of the first PMOS tube (V1), the grid electrode of the second PMOS tube (V2) is electrically connected with the negative protection module, the drain electrode of the second PMOS tube (V2) is electrically connected with the driving module, the source electrode of the second PMOS tube (V2) is used for responding to a voltage signal output by the drain electrode of the first PMOS, the grid electrode is used for responding to the switch control signal, and the drain electrode is used for generating the first level signal;

The source electrode of the first NMOS tube (V7) is grounded, the grid electrode of the first NMOS tube (V7) is electrically connected with an external electronic component, the drain electrode of the first NMOS tube (V7) is electrically connected with the driving module, and the drain electrode of the first NMOS tube (V7) is used for generating the first level signal;

The second NMOS tube (V8), second NMOS tube (V8) source electrode ground connection, second NMOS tube (V8) grid with negative electricity protection module electricity is connected, second NMOS tube (V8) drain electrode respectively with the grid of third PMOS tube (V3) in the drive module, the grid electricity of third NMOS tube (V9), the drain electrode of second NMOS tube (V8) is used for producing first level signal.

3. The power amplifier drain voltage switching circuit of claim 2, wherein,

The logic judgment module further comprises:

The second resistor (R2) comprises a first end and a second end which are electrically connected to the circuit, the first end is respectively and electrically connected with the grid electrode of the first PMOS tube (V1) and the grid electrode of the first NMOS tube (V7), and the second end is connected with a power supply.

4. The power amplifier drain voltage switching circuit of claim 2, wherein,

The driving module includes:

the source electrode of the third PMOS tube (V3) is connected with a power supply, the grid electrode of the third PMOS tube (V3) is respectively and electrically connected with the drain electrode of the first NMOS tube (V7), the drain electrode of the second NMOS tube (V8) and the drain electrode of the second PMOS tube (V2), the drain electrode of the third PMOS tube (V3) is electrically connected with the power amplifier module, and the drain electrode of the third PMOS tube (V3) is used for generating the second level signal;

The third NMOS tube (V9), the source electrode of third NMOS tube (V9) is grounded, the grid electrode of third NMOS tube (V9) is connected with the drain electrode of first NMOS tube (V7), the drain electrode of second NMOS tube (V8), the drain electrode of second PMOS tube (V2) respectively, third NMOS tube (V9) drain electrode with power amplifier module electricity is connected, the grid electrode of third NMOS tube (V9) is used for responding first level signal, third NMOS tube (V9) drain electrode is used for producing the second level signal.

5. The power amplifier drain voltage switching circuit of claim 2, wherein,

The negative protection module includes: the base electrode of the NPN triode (V10) is grounded, the collector electrode of the NPN triode (V10) is connected with the power supply end, the emitter electrode of the NPN triode (V10) is connected with the power amplification module, the collector electrode of the NPN triode is used for generating an internal switch control signal, and the emitter electrode of the NPN triode is used for responding to a third level signal.

6. The power amplifier drain voltage switching circuit of claim 5, wherein,

The negative protection module further comprises:

The first resistor (R1), the first resistor (R1) is including the first end and the second end that are connected in the circuit electrically, the first end of first resistor (R1) connects the power end, first resistor (R1) second end and NPN triode (V10) collector electricity are connected, NPN triode (V10) collector connects the power end through first resistor (R1).

7. The power amplifier drain voltage switching circuit of claim 5, wherein,

The negative protection module further comprises:

A twelfth resistor (R12), the twelfth resistor (R12) including a first end and a second end electrically connected to the circuit, the first end of the twelfth resistor (R12) terminating the base of the NPN transistor (V10), the second end of the twelfth resistor (R12) being grounded, the base of the NPN transistor (V10) being grounded through the twelfth resistor (R12).

8. The power amplifier drain voltage switching circuit of claim 5, wherein,

The power amplifier module comprises:

the source electrode of the fourth PMOS tube (V4) is connected with the power supply end, the grid electrode of the fourth PMOS tube (V4) is electrically connected with the drain electrode of the third PMOS tube (V3) and the drain electrode of the third NMOS tube (V9), and the drain electrode of the fourth PMOS tube (V4) is used for generating a voltage signal;

a first amplifier (PA 1), a first end of which is electrically connected to a drain of the fourth PMOS transistor (V4);

A sixth resistor (R6), one end of the sixth resistor (R6) is electrically connected to the second end of the first amplifier (PA 1), the other end of the sixth resistor (R6) is connected to a negative end, and the sixth resistor (R6) is configured to generate the third level signal;

And one end of the seventh resistor (R7) is electrically connected with the second end of the amplifier, and the other end of the seventh resistor (R7) is grounded.

9. The power amplifier drain voltage switching circuit of claim 8, wherein,

The power amplifier module further comprises: the third resistor (R3), the third resistor (R3) is including the electricity connection in the first end and the second end of circuit, the first end of third resistor (R3) connects the power end to be connected with the source electricity of fourth PMOS pipe (V4), the second end of third resistor (R3) and the drain electrode of third PMOS pipe (V3), the drain electrode of third NMOS pipe (V9), the grid electricity of fourth PMOS pipe (V4) are connected.

10. The power amplifier drain voltage switching circuit of claim 8, wherein,

The power amplifier module further comprises:

One end of the first capacitor (C1) is electrically connected with the drain electrode of the fourth PMOS tube (V4) and the first end of the first amplifier (PA 1), and the other end of the first capacitor (C1) is grounded;

One end of the second capacitor (C2) is electrically connected with the drain electrode of the fourth PMOS tube (V4) and the first end of the first amplifier (PA 1), and the other end of the second capacitor (C2) is grounded.

11. The power amplifier drain voltage switching circuit of claim 8, wherein,

The amplifier drain voltage switch circuit comprises at least two power amplifier modules, and all the power amplifier modules have the same circuit structure and connection relation.