CN220231862U - Power detection circuit - Google Patents
Power detection circuit Download PDFInfo
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- CN220231862U CN220231862U CN202321957057.1U CN202321957057U CN220231862U CN 220231862 U CN220231862 U CN 220231862U CN 202321957057 U CN202321957057 U CN 202321957057U CN 220231862 U CN220231862 U CN 220231862U
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Abstract
The utility model provides a power detection circuit, comprising: the input end of the first-stage amplifying unit is connected with the input port of the power detection circuit, and each-stage amplifying unit is used for amplifying an input signal of the input end of the first-stage amplifying unit and outputting the amplified signal to the next-stage amplifying unit; the detection units are in one-to-one correspondence with the N-level amplifying units, and the input end of each detection unit is respectively connected with the output end of the corresponding amplifying unit; the output ends of at least part of the detection units are provided with corresponding slope adjustment units, and the slope adjustment units are used for adjusting the output signals of the corresponding detection units in proportion so that the detection curve of the power detection circuit accords with a preset target; and an output unit for summing the output signals of all the detection units and taking the summed signal as the output signal of the power detection circuit. Therefore, the problem that the dynamic range of the traditional detector architecture is limited by the identification precision and cannot be enlarged is solved.
Description
Technical Field
The present utility model relates to the field of analog circuit design, and in particular, to a detection circuit and a dynamic range expansion method thereof.
Background
A continuous wave logarithmic video amplifier (Successive Detection Log Video Amplifiers, SDLVA power detection circuit) is a common device for frequency measurement and signal detection.
The prior SDLVA architecture is shown in FIG. 1 and comprises a multistage cascade of limiting amplifiers G 1 ~G N N is a natural number, and the first stage limiting amplifier G 1 The input end of each stage of limiting amplifier is connected with an input signal, and the output end of each stage of limiting amplifier is connected with a detection unit DET. The detection units DET output current signals corresponding to input signals according to a certain relation, the output ends of all the detection units are connected with the output unit, and the output unit sums all the current signals and converts the summed current signals into voltage signals to be output.
The output curve of the power detection circuit is the output voltage vs input power, i.e. the corresponding voltage is linearly increased (or decreased) every 1dBm of input power is increased. Since the back-end devices of the power detection circuit, such as analog-to-digital converters, tend not to be highly accurate, the slope of the power detection circuit is limited. I.e., the voltage (which may be referred to as the minimum dependent variable) that increases (or decreases) per dbm power must be higher than 0.5 times the minimum resolution of the recognition accuracy of the subsequent stage.
Under the same process and power consumption, as the upper limit of the detection power of the detection unit is determined, the detection range of the detection unit is reduced by the high slope, and the dynamic range of the cascaded power detection circuit is reduced.
In addition, the bandwidth of classical power detection circuits is mainly affected by limiting amplifiers. In high and ultra-high frequency applications, the gain of the limiting amplifier will therefore be smaller than at low intermediate frequencies, so that the curve of the output voltage vs input power is shifted to the right, i.e. more input power is needed to compensate for the lack of gain of the amplifier at high frequencies. This will deteriorate the flatness and bandwidth of the power detection circuit.
The utility model provides a novel power detection circuit, which aims to solve the problem that the dynamic range of a detection curve cannot be enlarged due to the influence of the identification precision of a later stage on the existing power detection circuit.
Disclosure of Invention
The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
According to an aspect of the present utility model, there is provided a power detection circuit including: the input end of the first-stage amplifying unit is connected with the input port of the power detection circuit, and each-stage amplifying unit is used for amplifying an input signal of the input end of the first-stage amplifying unit and outputting the amplified signal to the next-stage amplifying unit, wherein N is a natural number larger than 1; the input end of each detection unit is respectively connected with the output end of the corresponding amplification unit and is used for detecting the output power of the corresponding amplification unit and converting the output power into a corresponding current signal or voltage signal to be output; the output ends of at least part of the detection units are provided with corresponding slope adjustment units, the slope adjustment units are used for adjusting the output signals of the corresponding detection units in proportion so that the detection curve of the power detection circuit accords with a preset target, and the output signals of the slope adjustment units are used as the output signals of the detection units corresponding to the slope adjustment units; and an output unit for summing the output signals of all the detection units and taking the summed signal as the output signal of the power detection circuit.
In an embodiment, the slope adjustment unit is an in-phase amplifier or an inverting amplifier, and an amplification ratio of the in-phase amplifier or the inverting amplifier is an adjustment slope of the slope adjustment unit.
In an embodiment, the power detection circuit further includes a zeroth-order detection unit, an input end of the zeroth-order detection unit is connected to an input port of the power detection circuit, and an output end of the zeroth-order detection unit is connected to the output unit.
In an embodiment, the plurality of slope adjustment units are multiple, and an output end of each detection unit is connected to an input end of a slope adjustment unit, and an output end of the slope adjustment unit is connected to the output unit.
In one embodiment, the detection unit and its corresponding slope adjustment unit are integrated.
The slope adjusting unit is added in the traditional detector architecture, so that the problem that the dynamic range of the traditional detector architecture is limited by the identification precision and cannot be enlarged is solved.
Drawings
The above features and advantages of the present utility model will be better understood after reading the detailed description of embodiments of the present disclosure in conjunction with the following drawings.
FIG. 1 is a block diagram of a conventional detector according to the prior art;
FIG. 2 is a block diagram of a power detection circuit in an embodiment according to an aspect of the utility model;
FIG. 3 is a block diagram of a power detection circuit in another embodiment according to an aspect of the utility model;
FIG. 4 is a block diagram of a power detection circuit in yet another embodiment in accordance with an aspect of the utility model;
FIG. 5 is a block diagram of a power detection circuit in yet another embodiment according to an aspect of the utility model;
FIG. 6 is a circuit diagram of a slope adjustment unit according to an embodiment of the utility model.
Detailed Description
The following description is presented to enable one skilled in the art to make and use the utility model and to incorporate it into the context of a particular application. Various modifications, as well as various uses in different applications will be readily apparent to persons skilled in the art, and the generic principles defined herein may be applied to a wide range of embodiments. Thus, the present utility model is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
In the following detailed description, numerous specific details are set forth in order to provide a more thorough understanding of the utility model. It will be apparent, however, to one skilled in the art that the utility model may be practiced without limitation to these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present utility model.
All the features disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic set of equivalent or similar features.
Note that the terms "first," "second," and "second," when used herein, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present utility model, unless explicitly stated and limited otherwise, the terms "connected," "connected," and "connected across" are to be understood as being electrically connected, and may be directly connected, or indirectly connected through intermediaries, or may be in communication with the interior of two elements. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.
Note that, where used, further, preferably, further and more preferably, the brief description of another embodiment is made on the basis of the foregoing embodiment, and further, preferably, further or more preferably, the combination of the contents of the rear band with the foregoing embodiment is made as a complete construction of another embodiment. A further embodiment is composed of several further, preferably, still further or preferably arrangements of the strips after the same embodiment, which may be combined arbitrarily.
The utility model is described in detail below with reference to the drawings and the specific embodiments. It is noted that the aspects described below in connection with the drawings and the specific embodiments are merely exemplary and should not be construed as limiting the scope of the utility model in any way.
According to one aspect of the present utility model, a power detection circuit is provided. Based on the traditional detector structure, the utility model can optionally set a slope adjusting unit at the output end of the detecting unit, and the slope adjusting unit can increase or decrease the slope of the output curve of the detecting unit. Therefore, the amplifying unit and the detecting unit in the utility model can be not limited by the traditional detector architecture, and the gain of the amplifying unit or the detecting slope of the detecting unit can be increased. If the minimum dependent variable of the output curve of the overall power detection circuit cannot meet the requirement of the recognition precision of the subsequent stage or the linearity of the output curve is insufficient after the gain of the amplifying unit or the detection slope of the detecting unit is increased, the minimum dependent variable of the power detection circuit or the smoothness of the output broken line can be improved by arranging a slope adjusting unit at the output end of the necessary detecting unit.
Fig. 2 shows a power detection circuit in an embodiment based on the technical idea of the utility model. As shown in fig. 2, the power detection circuit includes N-stage cascaded amplifying units G 1 ~G N And N-stage amplifying unit G 1 ~G N One-to-one detection unit DET 1 ~DET N A plurality of slope adjusting units A and an output unit.
N-stage cascade amplifying unit G 1 ~G N Respectively for continuously amplifying the input signal Pin. First stage amplifying unit G 1 An input end of the second stage amplifying unit G is connected with an input end of the power detection circuit for obtaining an input signal Pin 1 And the first stage amplifying unit G 1 Is connected to obtain the first stage amplifying unit G 1 And so on, up to the nth stage amplifying unit G N N is a natural number greater than 1.
The output end of each stage of amplifying unit Gi (N is larger than or equal to i is larger than or equal to 1) is connected with the input end of the corresponding detecting unit DETi, and the detecting unit DETi is used for detecting the output power of the corresponding amplifying unit and converting the output power into a corresponding current signal or voltage signal to be output.
And judging whether the slope adjusting unit and the setting position of the slope adjusting unit are required to be set according to whether the smoothness degree and the minimum dependent variable of the output curve of the power detecting circuit of the traditional architecture formed by the N-level amplifying units and the N amplifying units meet the detection precision requirement.
The slope adjusting unit may be provided at the output end of part or all of the detecting units as needed.
Taking the example that the ith stage (N.gtoreq.i.gtoreq.1) detection unit needs to be provided with a slope adjustment unit, as shown in FIG. 2, the output end of the detection unit DETi is provided with a slope adjustment unit A i Slope adjusting unit A i Is connected to the output of the detection unit DETi to obtain the detection signal outputted from the detection unit DETi, and a slope adjustment unit a i The detection signal is scaled and output to an output unit, and a slope adjusting unit A i The adjustment ratio of (2) is a value which enables the detection curve of the power detection circuit to accord with a preset target.
The output unit is used for summing the output signals of all the detection units and taking the summed signal as the output signal of the power detection circuit. For the detection unit without the slope adjustment unit, the signal at the output end of the detection unit is the output signal of the detection unit; the detection unit provided with the slope adjustment unit has an output signal of the slope adjustment unit as an output signal of the detection unit.
Fig. 3 shows a schematic diagram of the architecture of the power detection circuit in an embodiment. The embodiment shown in fig. 3 differs from the embodiment shown in fig. 2 in that: the power detection circuit may further include a zeroth-order detection unit DET 0 . Zero-order detection unit DET 0 Is arranged in the first stage amplifying unit G 1 Before the input of the power detection circuit and after the input of the power detection circuit, i.e. the zeroth order detection unit DET 0 For detecting the input signal Pin. It can be understood thatZero-order detection unit DET, if necessary 0 The corresponding slope adjusting unit can also be arranged at the output end of the (C).
Fig. 4 shows a schematic diagram of the architecture of the power detection circuit in an embodiment. The embodiment shown in fig. 4 differs from the embodiment shown in fig. 2 in that: all detection units DET 1 ~DET N Corresponding slope adjusting units A are arranged at the output ends of the two 1 ~A N 。
Fig. 5 shows a schematic diagram of the architecture of the power detection circuit in an embodiment. The embodiment shown in fig. 5 differs from the embodiment shown in fig. 3 in that: on the basis of the embodiment shown in fig. 3, all detection units DET 0 ~DET N Corresponding slope adjusting units A are arranged at the output ends of the two 0 ~A N 。
In any of the foregoing embodiments, in determining the adjustment ratio of the slope adjustment units, a model of the power detection circuit shown in fig. 3 may be built in the simulation platform to adjust all the slope adjustment units a i ~A N The adjustment ratio of (2) is set to 1, and the detection curve of the output signal Vout of the output unit with respect to the input signal Pin is observed. When the dynamic range of the detection curve is not desirable, part or all of the amplifying units G can be further adjusted 1 ~G N Detection unit DET of (a) and/or part or all of (b) the gain of (c) 1 （DET 0 ）~ DET N The detection slope of the power detection circuit is enabled to reach the expected dynamic range; when the smoothness of the detection curve does not meet the linearity requirement of the detection curve, part or all of the slope adjusting unit A can be continuously adjusted 1 （A 0 ）~A N Until the smoothness of the detection curve meets the linearity requirement of the detection curve; when the minimum dependent variable of the detection curve is smaller than the minimum value of the recognition accuracy of the subsequent stage of the power detection circuit, part or all of the slope adjustment unit A can be continuously adjusted 1 （A 0 ）~A N Until the minimum dependent variable of the detection curve is greater than or equal to the minimum value of the recognition accuracy of the subsequent stage of the power detection circuit.
Further, the slope adjusting unit may be implemented by using an existing or existing circuit structure capable of adjusting the input signal and the output signal proportionally, such as an in-phase amplifier, an inverting amplifier, a current mirror, or the like.
Fig. 6 shows a schematic circuit diagram of a slope adjustment unit implemented with an in-phase amplifier in an embodiment. As shown in fig. 6, the positive input terminal of the in-phase amplifier is connected to the output terminal of the detection unit, the negative input terminal of the in-phase amplifier is grounded via a resistor R1, and the output terminal of the in-phase amplifier is connected to the negative input terminal via a resistor R2, so that the voltage V at the output terminal of the in-phase amplifier O Voltage V at the positive input terminal IN The relationship of (2) can be represented by the following formula (1):
（1）
it will be appreciated by those skilled in the art that the signal at the output of the detector unit may be scaled by adjusting the ratio of resistors R1 and R2.
Preferably, as shown in fig. 6, the positive input terminal of the in-phase amplifier may be connected to the output terminal of the corresponding detection unit through a resistor R3.
Further, in some embodiments, the slope adjustment unit and its corresponding detection unit may be implemented integrally.
The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. It is to be understood that the scope of the utility model is to be controlled by the appended claims and not limited to the specific constructions and components of the above-described embodiments. Various changes and modifications to the embodiments may be made by those skilled in the art within the spirit and scope of the utility model, and such changes and modifications are intended to be included within the scope of the utility model.
Claims (5)
1. A power detection circuit, comprising:
the input end of the first-stage amplifying unit is connected with the input port of the power detection circuit, and each-stage amplifying unit is used for amplifying an input signal of the input end of the first-stage amplifying unit and outputting the amplified signal to the next-stage amplifying unit, wherein N is a natural number larger than 1;
the input end of each detection unit is respectively connected with the output end of the corresponding amplification unit and is used for detecting the output power of the corresponding amplification unit and converting the output power into a corresponding current signal or voltage signal to be output;
the output ends of at least part of the detection units are provided with corresponding slope adjustment units, the slope adjustment units are used for adjusting the output signals of the corresponding detection units in proportion so that the detection curve of the power detection circuit accords with a preset target, and the output signals of the slope adjustment units are used as the output signals of the detection units corresponding to the slope adjustment units; and
and the output unit is used for summing the output signals of all the detection units and taking the summed signal as the output signal of the power detection circuit.
2. The power detection circuit of claim 1, wherein the slope adjustment unit is an in-phase amplifier or an inverting amplifier, and an amplification ratio of the in-phase amplifier or the inverting amplifier is an adjustment slope of the slope adjustment unit.
3. The power detection circuit of claim 1, further comprising a zeroth order detection unit, an input of the zeroth order detection unit being coupled to an input port of the power detection circuit, an output of the zeroth order detection unit being coupled to the output unit.
4. A power detection circuit according to claim 1 or 3, wherein the plurality of slope adjustment units are provided, the output terminal of each detection unit is connected to the input terminal of a slope adjustment unit, and the output terminal of the slope adjustment unit is connected to the output unit.
5. The power detection circuit of claim 1, wherein the detection unit and its corresponding slope adjustment unit are integrated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321957057.1U CN220231862U (en) | 2023-07-25 | 2023-07-25 | Power detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321957057.1U CN220231862U (en) | 2023-07-25 | 2023-07-25 | Power detection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN220231862U true CN220231862U (en) | 2023-12-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321957057.1U Active CN220231862U (en) | 2023-07-25 | 2023-07-25 | Power detection circuit |
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| CN (1) | CN220231862U (en) |
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- 2023-07-25 CN CN202321957057.1U patent/CN220231862U/en active Active
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