CN220190860U - Radio frequency amplifying circuit and radio frequency front end module - Google Patents

Abstract

The application discloses a radio frequency amplifying circuit and a radio frequency front-end module, and relates to the technical field of radio frequency. The radio frequency amplifying circuit includes: the input end of the compensation module is connected with the signal input end, and is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module; and the first end of the power amplification module is connected with the signal input end and the output end of the compensation module, and the second end of the power amplification module is connected with the signal output end, and is used for amplifying the signal obtained by superposing the third signal and the second signal and outputting a fourth signal generated by amplification through the signal output end. Therefore, the compensation module amplifies the signal received from the signal input end and compensates the signal to the first end of the power amplification module, the compensation module compensates the input signal of the power amplification module, meanwhile, the problem that the output signal of the radio frequency amplification circuit has larger distortion is avoided, and the AM-AM curve of the radio frequency amplification circuit is improved, so that the radio frequency amplification circuit can support larger bandwidth.

Description

Radio frequency amplifying circuit and radio frequency front end module

Technical Field

The present application relates to the field of radio frequency technologies, and in particular, to a radio frequency amplifying circuit and a radio frequency front end module.

Background

With the rapid development of wireless communication systems, there is an increasing demand for performance of wireless communication systems in the industry. In a wireless communication system, a power amplifier in a radio frequency amplifying circuit is a core component of a transmitter in the wireless communication system, at present, a feedback circuit is generally arranged to perform feedback compensation on an input signal of the power amplifier, but the power amplifier is easy to generate self-oscillation due to the introduction of the feedback circuit, so that a problem of large distortion exists in an output signal amplified by the power amplifier.

Disclosure of Invention

The utility model provides a radio frequency amplifying circuit and a radio frequency front end module, which are used for compensating an input signal of a power amplifying module in the radio frequency amplifying circuit and avoiding the problem of larger distortion of an output signal of the radio frequency amplifying circuit.

In a first aspect, an embodiment of the present utility model provides a radio frequency amplifying circuit, including: the input end of the compensation module is connected with the signal input end, and the compensation module is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module; the power amplification module is used for amplifying a third signal and a signal after the second signal is overlapped, and outputting a fourth signal generated by amplification through the signal output end, wherein the third signal is a signal received by the power amplification module from the signal input end.

Optionally, the compensation module includes a first amplifying transistor and a first bias circuit, wherein: the first end of the first amplifying transistor is connected to the signal input end, the second end of the first amplifying transistor is connected to the first end of the power amplifying module, and the third end of the first amplifying transistor is grounded; an output end of the first bias circuit is connected to a first end of the first amplifying transistor.

Optionally, the compensation module further comprises a first capacitor and a second capacitor, wherein: a first end of the first capacitor is connected to the signal input end, and a second end of the first capacitor is connected to the first end of the first amplifying transistor; the first end of the second capacitor is connected to the second end of the first amplifying transistor, and the second end of the second capacitor is connected to the first end of the power amplifying module.

Optionally, the compensation module further includes a first resistor, a first end of the first resistor is connected to the second end of the second capacitor, and a second end of the first resistor is connected to the first end of the power amplification module.

Optionally, the compensation module is configured to perform signal amplification processing on the first signal when the power of the first signal received from the signal input terminal is greater than or equal to a preset power value.

Optionally, the power amplification module includes at least one second amplification transistor.

Optionally, the power amplifying module includes one of the second amplifying transistors, and the radio frequency amplifying circuit further includes a second bias circuit and a third capacitor, wherein: the first end of the third capacitor is connected with the signal input end, and the second end of the third capacitor is connected with the first end of the second amplifying transistor; the first end of the second amplifying transistor is respectively connected with the output end of the second biasing circuit, the signal input end and the output end of the compensation module, the second end of the second amplifying transistor is connected with the signal output end, and the third end of the second amplifying transistor is grounded.

Optionally, the compensation module includes a first amplifying transistor, the first amplifying transistor is a first BJT, and the second amplifying transistor is a second BJT; the base electrode of the first BJT tube is connected with the signal input end, the collector electrode of the first BJT tube is connected with the base electrode of the second BJT tube and the first power supply end, and the emitter electrode of the first BJT tube is grounded; the base electrode of the second BJT tube is connected with the signal input end, the collector electrode of the second BJT tube is connected with the signal output end and the second power supply end, and the emitter electrode of the second BJT tube is grounded.

Optionally, the power amplifying module includes a plurality of second amplifying transistors, a plurality of second bias circuits and a plurality of third capacitors, the plurality of second amplifying transistors are connected to the plurality of second bias circuits and are in one-to-one correspondence, and the plurality of second bias circuits are connected to the plurality of third capacitors and are in one-to-one correspondence; the output end of each second bias circuit is connected with the first end of the corresponding second amplifying transistor of each second bias circuit; the first end of each third capacitor is connected to the signal input end, and the second end of each third capacitor is connected to the output end of the second bias circuit corresponding to each third capacitor; the first end of each second amplifying transistor is connected to the signal input end and the output end of the compensation module respectively, the second end of each second amplifying transistor is connected to the signal output end, and the third end of each second amplifying transistor is grounded.

In a second aspect, an embodiment of the present application provides a radio frequency amplifying circuit, including: the input end of the compensation module is connected with the signal input end, and the compensation module is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module; the power amplification module comprises a third amplification transistor and a fourth amplification transistor; the first end of the third amplifying transistor is connected to the signal input end and the output end of the compensation module, the second end of the third amplifying transistor is connected to the first output end, the third end of the third amplifying transistor is grounded, the third amplifying transistor is used for amplifying a fifth signal and a signal after the second signal is overlapped, and outputting a sixth signal generated by amplification through the signal output end, and the fifth signal is a signal received by the third amplifying transistor from the signal input end; the first end of the fourth amplifying transistor is connected to the signal input end and the output end of the compensation module, the second end of the fourth amplifying transistor is connected to the second output end, the third end of the fourth amplifying transistor is grounded, the third amplifying transistor is used for amplifying a seventh signal and a signal after the second signal is overlapped, an eighth signal generated by amplification is output through the signal output end, and the seventh signal is a signal received by the fourth amplifying transistor from the signal input end.

Optionally, the third amplifying transistor is a third BJT, and the fourth amplifying transistor is a fourth BJT; the base electrode of the third BJT tube is connected with the signal input end and the output end of the compensation module, the collector electrode of the third BJT tube is connected with the first output end, and the emitter electrode of the third BJT tube is grounded; the base electrode of the fourth BJT tube is connected with the signal input end and the output end of the compensation module, the collector electrode of the fourth BJT tube is connected with the second output end, and the emitter electrode of the fourth BJT tube is grounded.

Optionally, the radio frequency amplifying circuit further comprises an input matching circuit and an output matching circuit; the first input end of the input matching circuit is connected with the signal input end, the second input end of the input matching circuit is grounded, the first output end of the input matching circuit is connected with the first end of the third amplifying transistor, and the second output end of the input matching circuit is connected with the first end of the fourth amplifying transistor; the third input end of the output matching circuit is connected with the first output end, the fourth input end of the output matching circuit is connected with the second output end, the third output end of the output matching circuit is connected with the signal output end, and the fourth output end of the output matching circuit is grounded.

Optionally, the input matching circuit is a first balun circuit, and the output matching circuit is a second balun circuit; the first input end of the first balun circuit is connected to the signal input end, the second input end of the first balun circuit is grounded, the first output end of the first balun circuit is connected to the first end of the third amplifying transistor, and the second output end of the first balun circuit is connected to the first end of the fourth amplifying transistor; the third input end of the second balun circuit is connected to the second end of the third amplifying transistor, the fourth input end of the second balun circuit is connected to the second end of the fourth amplifying transistor, the third output end of the second balun circuit is connected to the signal output end, and the fourth output end of the second balun circuit is grounded.

In a third aspect, an embodiment of the present application provides a radio frequency front end module, where the radio frequency front end module includes the radio frequency amplifying circuit described above.

The radio frequency amplifying circuit provided by the embodiment of the application comprises: the input end of the compensation module is connected with the signal input end and is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module; the first end of the power amplification module is connected to the signal input end and the output end of the compensation module, the second end of the power amplification module is connected to the signal output end and is used for amplifying a signal obtained by superposing a third signal and a second signal, and a fourth signal generated by amplification is output through the signal output end, and the third signal is a signal received by the power amplification module from the signal input end. Therefore, the compensation module is introduced between the signal input end and the first end of the power amplification module, the compensation module is utilized to amplify the input first signal, and the second signal obtained by amplification is utilized to compensate and stack the third signal input by the power amplification module, so that the input signal of the power amplification module is increased; meanwhile, the compensation module compensates the signal input by the signal input end, and then the signal input by the signal input end is superimposed and input to the power amplification module, so that the problem that the output signal is greatly distorted under the condition that a feedback amplification circuit is introduced between the second end and the first end of the power amplification module can be avoided, the distortion degree of the signal after power amplification by the power amplification module is reduced, the linearity of the power amplification module is better, the phenomenon that the power amplification module enters a cut-off area to generate gain compression when the signal amplification is carried out is delayed, the AM-AM curve of the radio frequency amplification circuit is improved, and the radio frequency amplification circuit can support larger bandwidth.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 shows a schematic circuit diagram of a radio frequency amplifying circuit according to an embodiment of the present application.

Fig. 2 shows a schematic circuit diagram of a compensation module according to an embodiment of the application.

Fig. 3 is a schematic circuit diagram of a radio frequency amplifying circuit according to another embodiment of the present application.

Fig. 4 is a schematic circuit diagram of a radio frequency amplifying circuit according to another embodiment of the present application.

Fig. 5 is a schematic circuit diagram of a radio frequency amplifying circuit according to still another embodiment of the present application.

Fig. 6 shows a schematic circuit diagram of the rf amplifying circuit provided in fig. 5.

Fig. 7 is a schematic structural diagram of a rf front-end module according to an embodiment of the application.

Detailed Description

In order to enable those skilled in the art to better understand the present application, a clear and complete description of the technical solution in the present embodiment will be provided below with reference to the accompanying drawings in the present embodiment. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms "first," "second," and the like in this disclosure are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

Referring to fig. 1, fig. 1 is a schematic circuit diagram of a radio frequency amplifying circuit 1 according to an embodiment of the application. The radio frequency amplifying circuit 1 provided in the embodiment of the present application will be described in detail with reference to fig. 1. As shown in fig. 1, the radio frequency amplifying circuit 1 of the present embodiment includes a compensation module 10 and a power amplifying module 20.

The rf amplifying circuit 1 is applied to an rf front-end module, which is an element that integrates two or more than two discrete devices such as an rf switch, a low noise amplifier, a filter, a duplexer, a power amplifier, etc. into one independent module, thereby improving the integration level and hardware performance and miniaturizing the volume. Specifically, the present invention relates to a method for manufacturing a semiconductor device. A radio frequency front-end module can be applied to 4G and 5G communication equipment such as smart phones, tablet computers, smart watches and the like.

In this embodiment, the input end of the compensation module 10 is connected to the signal input end, the compensation module 10 is configured to receive the first signal from the signal input end, amplify the first signal received from the signal input end, and output the second signal generated by amplification through the output end of the compensation module 10.

Further, the first end of the power amplifying module 20 is connected to the signal input end and the output end of the compensating module 10, and the input signal of the power amplifying module 20 is a signal obtained by superimposing the third signal output by the signal input end and the second signal output by the output end of the compensating module 10. The signal input end inputs a radio frequency signal, and the radio frequency signal input by the signal input end is divided into two paths of signals to be respectively input into the compensation module 10 and the power amplification module 20. Based on this, the first signal received by the compensation module 10 from the signal input terminal is a part of the radio frequency signals input by the signal input terminal, and the third signal received by the power amplification module 20 from the signal input terminal is a part of the radio frequency signals input by the signal input terminal, except for the first signal.

In this embodiment, the first end of the power amplifying module 20 is connected to the signal input end and the output end of the compensating module 10, and is configured to receive the signal obtained by superimposing the third signal and the second signal. Specifically, the radio frequency signal input by the signal input end is divided into two paths, one path is the first signal input into the compensation module 10, the other path is the third signal, the third signal and the second signal output by the compensation module 10 are overlapped to form one path of signal and then input into the first end of the power amplification module 20, the frequencies of the first signal and the third signal are the same, and the current sizes input into the compensation module 10 and the power amplification module 20 can be the same or different.

Further, the second end of the power amplification module 20 is connected to the signal output end, the power amplification module 20 is configured to amplify the signal obtained by superimposing the third signal and the second signal, and the second end of the power amplification module 20 outputs the fourth signal generated by amplification to the signal output end, so as to output the fourth signal through the signal output end.

Optionally, the power amplifying module 20 of the present application includes an amplifying transistor, and the amplifying transistor in the power amplifying module 20 may be a bipolar transistor (Bipolar Junction Transistor, BJT) or a semiconductor field effect transistor (Metal Oxide Semiconductor, MOS), which is not limited herein. If the amplifying transistor in the power amplifying module 20 is a BJT, the first end of the power amplifying module 20 is the base of the BJT, and the second end of the power amplifying module 20 is the collector of the BJT; if the amplifying transistor in the power amplifying module 20 is a MOS transistor, the first end of the power amplifying module 20 is a gate of the MOS transistor, and the second end of the power amplifying module 20 is a source of the MOS transistor.

Optionally, if the feedback circuit is provided from the second end of the power amplification module 20 to compensate the input signal of the power amplification module 20, introducing a positive feedback branch between the first end and the second end of the power amplification module 20 will affect the working state of the power amplification module 20, that is, when the positive feedback compensates the input of the power amplification module 20, the self-oscillation of the power amplification module 20 will be generated, so that the output signal generated after the input signal is amplified by the power amplification module 20 has larger distortion.

In this embodiment, the compensation module 10 amplifies the signal received from the signal input terminal and compensates the amplified signal to the first terminal of the power amplification module 20, so that the signal received from the signal input terminal can be amplified and compensated to the first terminal of the power amplification module, and the input signal of the power amplification module 20 can be increased. The mode that the compensation module 10 amplifies the signal input by the signal input end and compensates the signal input by the amplified input end to the power amplification module 20 avoids the problem that the output signal has larger distortion when the feedback circuit is arranged at the second end of the power amplification module 20 to compensate the input signal of the power amplification module 20. Based on this, the power amplification module 20 approaches to an ideal rf power amplifier, so that the linearity of the power amplification module 20 is better, the phenomenon that the power amplification module 20 enters a cut-off region to generate gain compression when amplifying signals is delayed, and then the AM-AM curve of the rf amplification circuit is improved, so that the rf amplification circuit 1 can support a larger bandwidth, and the bandwidth performance is optimized.

In some embodiments, referring to fig. 2, fig. 2 is a schematic circuit diagram of a compensation module 10 according to an embodiment of the application. As shown in fig. 2, the compensation module 10 of the present application includes at least a first amplifying transistor 11 and a first bias circuit 12.

In the present embodiment, a first terminal of the first amplifying transistor 11 is connected to the signal input terminal, for receiving the first signal from the signal input terminal; the second end of the first amplifying transistor 11 is connected to the first end of the power amplifying module 20 and the first power supply end, the first power supply end supplies power to the first amplifying transistor 11, the first amplifying transistor 11 amplifies the received first signal to generate a second signal, and the second end of the first amplifying transistor 11 outputs the amplified second signal to the first end of the power amplifying module 20; the third terminal of the first amplifying transistor 11 is grounded.

Alternatively, the first amplifying transistor 11 of the present application may be a BJT or a MOS transistor, which is not limited herein. If the first amplifying transistor 11 is a BJT, the first end of the first amplifying transistor 11 is a base, the second end of the first amplifying transistor 11 is a collector, and the third end of the first amplifying transistor 11 is an emitter; if the first amplifying transistor 11 is a MOS transistor, the first end of the first amplifying transistor 11 is a gate, the second end of the first amplifying transistor 11 is a source, and the third end of the first amplifying transistor 11 is a drain.

Optionally, the output terminal of the first bias circuit 12 is connected to the first terminal of the first amplifying transistor 11, and the first bias circuit 12 is configured to provide a first bias signal (e.g. the first bias signal is a bias current) to the first amplifying transistor 11, so as to ensure the normal operation of the first amplifying transistor 11. In this way, the first amplifying transistor 11 can amplify the first signal without distortion when amplifying the first signal.

Further, the compensation module 10 further includes a first capacitor 13 and a second capacitor 14. The first end of the first capacitor 13 is connected to the signal input end, and the second end of the first capacitor 13 is connected to the first end of the first amplifying transistor 11. Specifically, the first capacitor 13 is coupled between the signal input terminal and the output terminal of the first bias circuit 12, and is used as a blocking capacitor between the signal input terminal and the first bias circuit 12, so that the first bias signal output by the first bias circuit 12 and being a direct current signal can be prevented from flowing into the signal input terminal, and affecting the radio frequency signal input by the signal input terminal. The first end of the second capacitor 14 is connected to the second end of the first amplifying transistor 11, and the second end of the second capacitor 14 is connected to the first end of the power amplifying module 20. Specifically, the second capacitor 14 is coupled between the first amplifying transistor 11 and the power amplifying module 20, and is used as a blocking capacitor between the first bias circuit 12 and the power amplifying module 20, so that the first bias signal output by the first bias circuit 12 can be prevented from flowing into the power amplifying module 20 after passing through the first amplifying transistor 11, and the working state of the power amplifying module 20 is prevented from being influenced.

In some embodiments, the compensation module 10 may further include a first resistor 15, a first end of the first resistor 15 being connected to a second end of the second capacitor 14, and a second end of the first resistor 15 being connected to a first end of the power amplification module 20. The magnitude of the second signal output by the compensation module 10 can be adjusted by controlling the resistance value of the first resistor 15 disposed in the compensation module 10.

Optionally, the compensation module 10 is configured to perform signal amplification processing on the first signal when the power of the first signal received from the signal input terminal is greater than or equal to a preset power value. In some embodiments, the preset power value of the first amplifying transistor 11 in the compensation module 10 may be-10 dB, i.e. 1/10mW. The first amplifying transistor 11 in the compensation module 10 amplifies the first signal received from the signal input terminal when the first signal is greater than or equal to 1/10mW. Based on this, the compensation module 10 can enter an operating state when the power of the received first signal is smaller, and amplify and generate and output the second signal to perform signal compensation on the power amplification module 20.

In this embodiment, by providing the compensation module connected between the signal input terminal and the power amplification module, the signal received from the signal input terminal can be amplified and then compensated to the power amplification module, and the input signal of the power amplification module 20 can be increased.

Optionally, the power amplification module 20 comprises at least one second amplification transistor 21.

In some embodiments, referring to fig. 3, fig. 3 is a schematic circuit diagram of a radio frequency amplifying circuit 1 according to another embodiment of the application.

As shown in fig. 3, in the present embodiment, the power amplifying module 20 in the radio frequency amplifying circuit 1 includes a second amplifying transistor 21, and the radio frequency amplifying circuit 1 further includes a second bias circuit 30 and a third capacitor 40.

In this embodiment, the first end of the second amplifying transistor 21 is connected to the output end of the second bias circuit 30, the signal input end and the output end of the compensation module 10, the second end of the second amplifying transistor 21 is connected to the signal output end and the second power supply end, and the second power supply end supplies power to the second amplifying transistor 21; the third terminal of the second amplifying transistor 21 is grounded.

Optionally, the output terminal of the second bias circuit 30 is connected to the first terminal of the second amplifying transistor 21, and the second bias circuit 30 is configured to provide a second bias signal (e.g. the second bias signal is a bias current) to the second amplifying transistor 21, so as to ensure the normal operation of the second amplifying transistor 21. In this way, the second amplifying transistor 21 can amplify the received signal without distortion when amplifying the signal obtained by superimposing the received third signal and the second signal.

Further, a first end of the third capacitor 40 is connected to the signal input end, and a second end of the third capacitor 40 is connected to the first end of the second amplifying transistor 21. Specifically, the third capacitor 40 is coupled between the signal input terminal and the output terminal of the second bias circuit 30, and is used as a blocking capacitor between the signal input terminal and the second bias circuit 30, so as to prevent the second bias signal, which is a direct current signal and is output by the second bias circuit 30, from flowing into the signal input terminal, and affecting the radio frequency signal input by the signal input terminal.

In some embodiments, the power amplifying module 20 may further include a first inductor 22, a first end of the first inductor 22 is connected to the second power supply end, and a second end of the first inductor 22 is connected to the second end of the second amplifying transistor 21. The first inductor 22 is coupled between the second power supply end and the second amplifying transistor 21, so that a fourth signal generated by amplifying the second amplifying transistor 21 can be prevented from flowing into the second power supply end, the influence of the signal on the power supply performance of the second power supply end is avoided, and the linearity of the radio frequency amplifying circuit 1 is improved.

Alternatively, the first amplifying transistor 11 and the second amplifying transistor 21 of the present application may be BJT transistors or MOS transistors, which are not limited herein.

In some embodiments, the first amplifying transistor 11 and the second amplifying transistor 21 may be BJT transistors. Wherein, the base electrode of the first amplifying transistor 11 is connected to the signal input end, the collector electrode of the first amplifying transistor 11 is connected to the base electrode of the second amplifying transistor 21 and the first power supply end, the emitter electrode of the first amplifying transistor 11 is grounded; the base of the second amplifying transistor 21 is connected to the signal input terminal, the collector of the second amplifying transistor 21 is connected to the signal output terminal and the second power supply terminal, and the emitter of the second amplifying transistor 21 is grounded.

In other embodiments, the first amplifying transistor 11 and the second amplifying transistor 21 may be MOS transistors. Wherein, the grid electrode of the first amplifying transistor 11 is connected with the signal input end, the source electrode of the first amplifying transistor 11 is connected with the grid electrode of the second amplifying transistor 21 and the first power supply end, and the drain electrode of the first amplifying transistor 11 is grounded; the gate of the second amplifying transistor 21 is connected to the signal input terminal, the source of the second amplifying transistor 21 is connected to the signal output terminal and the second power supply terminal, and the drain of the second amplifying transistor 21 is grounded.

In this embodiment, when the power amplifying module 20 in the rf amplifying circuit 1 includes a second amplifying transistor 21, the compensating module 10 amplifies the signal received from the signal input terminal and compensates the signal to the first terminal of the second amplifying transistor 21, so that a new branch is not introduced between the first terminal and the second terminal of the power amplifying module 20, thereby ensuring the gain stability of the rf amplifying circuit 1 and improving the linearity of the rf amplifying circuit 1.

Referring to fig. 4, fig. 4 is a schematic circuit diagram of a radio frequency amplifying circuit 1 according to another embodiment of the application.

As shown in fig. 4, in the present embodiment, the power amplifying module 20 in the radio frequency amplifying circuit 1 includes a plurality of second amplifying transistors 21, a plurality of second bias circuits 30, and a plurality of third capacitors 40, wherein the plurality of second amplifying transistors 21 are connected to the plurality of second bias circuits 30 and are in one-to-one correspondence, and the plurality of second bias circuits 30 are connected to the plurality of third capacitors 40 and are in one-to-one correspondence.

In this embodiment, the output end of each second bias circuit 30 is connected to the first end of the corresponding second amplifying transistor 21 of each second bias circuit 30, and each second bias circuit 30 is configured to provide the second bias signal to the corresponding second amplifying transistor 21 of each second bias circuit 30, so as to ensure the normal operation of the corresponding second amplifying transistor 21 of each second bias circuit 30.

Optionally, a first end of each third capacitor 40 is connected to the signal input end, a second end of each third capacitor 40 is connected to an output end of the second bias circuit 30 corresponding to each third capacitor 40, and each third capacitor 40 serves as a blocking capacitor between the signal input end and the second bias circuit 30 corresponding to each third capacitor 40, so that the second bias signal which is a direct current signal and is output by the second bias circuit 30 corresponding to each third capacitor 40 is prevented from flowing into the signal input end.

The first end of each second amplifying transistor 21 is connected to the signal input end and the output end of the compensation module 10, and is used for amplifying the received input signal to generate an output signal, and the input signal received by each second amplifying transistor 21 is a signal obtained by superposing the signal received by each second amplifying transistor 21 from the signal input end and the signal received by the compensation module 10; a second end of each second amplifying transistor 21 is connected to the signal output end, and the output signals amplified and generated by the second amplifying transistors 21 are output at the signal output end after being overlapped; the third terminal of each second amplifying transistor 21 is grounded.

In this embodiment, the power amplifying module 20 in the radio frequency amplifying circuit 1 includes a plurality of second amplifying transistors 21, the compensating module 10 amplifies the signal received from the signal input end and compensates the signal to the first end of each second amplifying transistor 21, and each second amplifying transistor 21 outputs the signal received from the signal input end and the output signal generated by amplifying the signal received from the compensating module 10 after superimposing the signals and outputting the signal at the signal output end, so that the phenomenon that the power amplifying module 20 enters the cut-off area to generate gain compression when amplifying the signal is delayed, and the linearity of the radio frequency amplifying circuit 1 is improved.

Referring to fig. 5, fig. 5 is a schematic circuit diagram of a radio frequency amplifying circuit 1 according to another embodiment of the application. As shown in fig. 5, the radio frequency amplifying circuit 1 of the present embodiment includes a compensation module 10 and a power amplifying module 20.

In this embodiment, the input end of the compensation module 10 is connected to the signal input end, the compensation module 10 is configured to amplify a first signal received from the signal input end, and output a second signal generated by amplification through the output end of the compensation module 10.

In the present embodiment, the power amplifying module 20 includes a third amplifying transistor 23 and a fourth amplifying transistor 24, and the rf amplifying circuit 1 is a differential circuit. The first end of the third amplifying transistor 23 is connected to the signal input end and the output end of the compensation module 10, the second end of the third amplifying transistor 23 is connected to the first output end, the third end of the third amplifying transistor 23 is grounded, the third amplifying transistor 23 is used for amplifying the signal obtained by overlapping the fifth signal and the second signal, and the amplified sixth signal is output through the signal output end, wherein the fifth signal is the signal received by the third amplifying transistor 23 from the signal input end. The first end of the fourth amplifying transistor 24 is connected to the signal input end and the output end of the compensation module 10, the second end of the fourth amplifying transistor 24 is connected to the second output end, the third end of the fourth amplifying transistor 24 is grounded, the third amplifying transistor 23 is used for amplifying the signal obtained by superposing the seventh signal and the second signal, and outputting the eighth signal generated by amplification through the signal output end, wherein the seventh signal is the signal received by the fourth amplifying transistor 24 from the signal input end.

Optionally, since all the characteristics of the electronic components are affected by temperature, and the semiconductor material is affected to the greatest extent, by the rf amplifying circuit 1 configured as a differential circuit, when the power amplifying module 20 amplifies the signal received from the signal input terminal and the signal received from the compensating module 10, the output power and stability of the power amplifying module 20 can be improved while effectively amplifying the signal.

Alternatively, the third amplifying transistor 23 and the fourth amplifying transistor 24 of the present application may be BJT transistors or MOS transistors, which are not limited herein.

Further, the radio frequency amplifying circuit 1 of the present embodiment further includes an input matching circuit 50 and an output matching circuit 60. The first input terminal of the input matching circuit 50 is connected to the signal input terminal, the second input terminal of the input matching circuit 50 is grounded, the first output terminal of the input matching circuit 50 is connected to the first terminal of the third amplifying transistor 23, and the second output terminal of the input matching circuit 50 is connected to the first terminal of the fourth amplifying transistor 24. The third input end of the output matching circuit 60 is connected to the first output end, the fourth input end of the output matching circuit 60 is connected to the second output end, the third output end of the output matching circuit 60 is connected to the signal output end, and the fourth output end of the output matching circuit 60 is grounded.

In this embodiment, the radio frequency signal input by the signal input end is divided into two paths, one path is the first signal input compensation module 10, the other path is the third signal, and the third signal is input to the input matching circuit 50 through the first input end of the input matching circuit 50.

Optionally, the input matching circuit 50 is configured to perform differential processing on the received third signal to obtain a fifth signal and a seventh signal, the first output terminal of the input matching circuit 50 outputs the fifth signal to the first terminal of the third amplifying transistor 23, and the second output terminal of the input matching circuit 50 outputs the seventh signal to the first terminal of the fourth amplifying transistor 24. The first input end of the output matching circuit 60 receives a sixth signal generated by amplifying the fifth signal by the third amplifying transistor 23, the second input end of the output matching circuit 60 receives an eighth signal generated by amplifying the seventh signal by the fourth amplifying transistor 24, the output matching circuit 60 combines the sixth signal and the eighth signal into one signal to obtain a fourth signal, the signal power of the fourth signal is increased, and the fourth signal obtained by combining is output through the first output end of the output matching circuit 60.

In some embodiments, referring to fig. 6, fig. 6 shows a schematic circuit diagram of the rf amplifying circuit 1 provided in fig. 5. As shown in fig. 6, in the present embodiment, the third amplifying transistor 23 and the fourth amplifying transistor 24 are BJT transistors, the input matching circuit is the first balun circuit 51, and the output matching circuit is the second balun circuit 61.

Optionally, a base of the third BJT is connected to the signal input terminal and the output terminal of the compensation module 10, a collector of the third BJT is connected to the first output terminal, and an emitter of the third BJT is grounded. The base of the fourth BJT tube is connected to the signal input end and the output end of the compensation module 10, the collector of the fourth BJT tube is connected to the second output end, and the emitter of the fourth BJT tube is grounded.

In this embodiment, the first input terminal of the first balun circuit 51 is connected to the signal input terminal, the second input terminal of the first balun circuit 51 is grounded, the first output terminal of the first balun circuit 51 is connected to the base of the third BJT, and the second output terminal of the first balun circuit 51 is connected to the base of the fourth BJT. The third input end of the second balun circuit 61 is connected to the collector of the third BJT, the fourth input end of the second balun circuit 61 is connected to the collector of the fourth BJT, the third output end of the second balun circuit 61 is connected to the signal output end, and the fourth output end of the second balun circuit 61 is grounded.

It should be noted that, the balun circuit generally comprises an unbalanced port and two balanced ports, where the signals of the two balanced ports have the same amplitude, but opposite phases, and the balun circuit has the advantages of high gain, electromagnetic interference resistance, even harmonic suppression, and the like. The balun structures of the first balun circuit 51 and the second balun circuit 61 in the present application may be composed of a primary coil and a secondary coil wound.

In this embodiment, the first balun circuit 51 is configured to perform differential processing on the received signal to generate a fifth signal and a seventh signal with 180 degrees phase difference, the first output end of the first balun circuit 51 outputs the fifth signal to the base of the third BJT, and the second output end of the first balun circuit 51 outputs the seventh signal to the base of the fourth BJT. The first input end of the second balun circuit 61 receives a sixth signal generated by amplifying the fifth signal by the third BJT tube, the second input end of the second balun circuit 61 receives an eighth signal generated by amplifying the seventh signal by the fourth BJT tube, and the sixth signal and the eighth signal are differential signals which are 180 degrees different. The second balun circuit 61 combines the sixth signal and the eighth signal into one signal to obtain a fourth signal, increases the signal power of the output fourth signal, and outputs the combined fourth signal through the first output terminal of the second balun circuit 61.

Alternatively, the first balun circuit 51 and the second balun circuit 61 may have the same structure, or may have different structures. And because the first balun is positioned at the signal input end, the second balun is positioned at the signal output end, and the amplified radio frequency signal is received and processed, the second balun is required to bear higher signal power, and the first balun is required to bear smaller signal power.

In this embodiment, when the power amplifying module 20 includes the third amplifying transistor 23 and the fourth amplifying transistor 24, the radio frequency amplifying circuit 1 is set as a differential circuit by introducing the input matching circuit and the output matching circuit, which effectively reduces the influence of temperature variation received by the power amplifying module 20 in the signal amplifying process, and improves the stability of the power amplifying module 20. The compensation module 10 amplifies the signal received from the signal input end and compensates the signal to the third amplification transistor 23 and the fourth amplification transistor 24, so that the phenomenon that the power amplification module 20 enters a cut-off region to generate gain compression when amplifying the signal is delayed, and the linearity of the radio frequency amplification circuit 1 is improved.

Referring to fig. 7, fig. 7 is a schematic structural diagram of a rf front-end module 2 according to an embodiment of the application. As shown in fig. 7, the rf front-end module 2 provided in this embodiment includes the rf amplifying circuit 1 of the above embodiment.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be appreciated by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not drive the essence of the corresponding technical solutions to depart from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims (14)

1. A radio frequency amplifying circuit, comprising:

the input end of the compensation module is connected with the signal input end, and the compensation module is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module;

the power amplification module is used for amplifying a third signal and a signal after the second signal is overlapped, and outputting a fourth signal generated by amplification through the signal output end, wherein the third signal is a signal received by the power amplification module from the signal input end.

2. The radio frequency amplification circuit of claim 1, wherein the compensation module comprises a first amplification transistor and a first bias circuit, wherein:

the first end of the first amplifying transistor is connected to the signal input end, the second end of the first amplifying transistor is connected to the first end of the power amplifying module, and the third end of the first amplifying transistor is grounded;

an output end of the first bias circuit is connected to a first end of the first amplifying transistor.

3. The radio frequency amplification circuit of claim 2, wherein the compensation module further comprises a first capacitor and a second capacitor, wherein:

a first end of the first capacitor is connected to the signal input end, and a second end of the first capacitor is connected to the first end of the first amplifying transistor;

the first end of the second capacitor is connected to the second end of the first amplifying transistor, and the second end of the second capacitor is connected to the first end of the power amplifying module.

4. The radio frequency amplification circuit of claim 3, wherein the compensation module further comprises a first resistor, a first end of the first resistor being coupled to the second end of the second capacitor, and a second end of the first resistor being coupled to the first end of the power amplification module.

5. The radio frequency amplification circuit of claim 1, wherein the compensation module is configured to perform signal amplification processing on the first signal when the power of the first signal received from the signal input is greater than or equal to a preset power value.

6. The radio frequency amplification circuit of any one of claims 1 to 5, wherein the power amplification module comprises at least one second amplification transistor.

7. The radio frequency amplification circuit of claim 6, wherein the power amplification module comprises one of the second amplification transistors, the radio frequency amplification circuit further comprising a second bias circuit and a third capacitor, wherein:

the first end of the third capacitor is connected with the signal input end, and the second end of the third capacitor is connected with the first end of the second amplifying transistor;

the first end of the second amplifying transistor is respectively connected with the output end of the second biasing circuit, the signal input end and the output end of the compensation module, the second end of the second amplifying transistor is connected with the signal output end, and the third end of the second amplifying transistor is grounded.

8. The radio frequency amplification circuit of claim 7, wherein the compensation module comprises a first amplification transistor, the first amplification transistor being a first BJT transistor and the second amplification transistor being a second BJT transistor;

the base electrode of the first BJT tube is connected with the signal input end, the collector electrode of the first BJT tube is connected with the base electrode of the second BJT tube and the first power supply end, and the emitter electrode of the first BJT tube is grounded;

the base electrode of the second BJT tube is connected with the signal input end, the collector electrode of the second BJT tube is connected with the signal output end and the second power supply end, and the emitter electrode of the second BJT tube is grounded.

9. The radio frequency amplification circuit of claim 6, wherein the power amplification module comprises a plurality of the second amplifying transistors, a plurality of second bias circuits and a plurality of third capacitors, the plurality of the second amplifying transistors are connected to the plurality of the second bias circuits and are in one-to-one correspondence, and the plurality of the second bias circuits are connected to the plurality of the third capacitors and are in one-to-one correspondence;

the output end of each second bias circuit is connected with the first end of the corresponding second amplifying transistor of each second bias circuit;

The first end of each third capacitor is connected to the signal input end, and the second end of each third capacitor is connected to the output end of the second bias circuit corresponding to each third capacitor;

the first end of each second amplifying transistor is connected to the signal input end and the output end of the compensation module respectively, the second end of each second amplifying transistor is connected to the signal output end, and the third end of each second amplifying transistor is grounded.

10. A radio frequency amplifying circuit, comprising:

the input end of the compensation module is connected with the signal input end, and the compensation module is used for amplifying a first signal received from the signal input end and outputting a second signal generated by amplification through the output end of the compensation module;

the power amplification module comprises a third amplification transistor and a fourth amplification transistor;

the first end of the third amplifying transistor is connected to the signal input end and the output end of the compensation module, the second end of the third amplifying transistor is connected to the first output end, the third end of the third amplifying transistor is grounded, the third amplifying transistor is used for amplifying a fifth signal and a signal after the second signal is overlapped, a sixth signal generated by amplification is output through the signal output end, and the fifth signal is a signal received by the third amplifying transistor from the signal input end;

The first end of the fourth amplifying transistor is connected to the signal input end and the output end of the compensation module, the second end of the fourth amplifying transistor is connected to the second output end, the third end of the fourth amplifying transistor is grounded, the third amplifying transistor is used for amplifying a seventh signal and a signal after the second signal is overlapped, an eighth signal generated by amplification is output through the signal output end, and the seventh signal is a signal received by the fourth amplifying transistor from the signal input end.

11. The radio frequency amplification circuit of claim 10, wherein the third amplification transistor is a third BJT and the fourth amplification transistor is a fourth BJT;

the base electrode of the third BJT tube is connected with the signal input end and the output end of the compensation module, the collector electrode of the third BJT tube is connected with the first output end, and the emitter electrode of the third BJT tube is grounded;

the base electrode of the fourth BJT tube is connected with the signal input end and the output end of the compensation module, the collector electrode of the fourth BJT tube is connected with the second output end, and the emitter electrode of the fourth BJT tube is grounded.

12. The radio frequency amplification circuit of any one of claims 10 to 11, further comprising an input matching circuit and an output matching circuit;

the first input end of the input matching circuit is connected with the signal input end, the second input end of the input matching circuit is grounded, the first output end of the input matching circuit is connected with the first end of the third amplifying transistor, and the second output end of the input matching circuit is connected with the first end of the fourth amplifying transistor;

the third input end of the output matching circuit is connected with the first output end, the fourth input end of the output matching circuit is connected with the second output end, the third output end of the output matching circuit is connected with the signal output end, and the fourth output end of the output matching circuit is grounded.

13. The radio frequency amplification circuit of claim 12, wherein the input matching circuit is a first balun circuit and the output matching circuit is a second balun circuit;

the first input end of the first balun circuit is connected to the signal input end, the second input end of the first balun circuit is grounded, the first output end of the first balun circuit is connected to the first end of the third amplifying transistor, and the second output end of the first balun circuit is connected to the first end of the fourth amplifying transistor;

The third input end of the second balun circuit is connected to the second end of the third amplifying transistor, the fourth input end of the second balun circuit is connected to the second end of the fourth amplifying transistor, the third output end of the second balun circuit is connected to the signal output end, and the fourth output end of the second balun circuit is grounded.

14. A radio frequency front end module comprising a radio frequency amplifying circuit according to any of claims 1 to 13.