CN219958996U - Single photon avalanche diode array and laser ranging chip - Google Patents
Single photon avalanche diode array and laser ranging chip Download PDFInfo
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- CN219958996U CN219958996U CN202320528428.8U CN202320528428U CN219958996U CN 219958996 U CN219958996 U CN 219958996U CN 202320528428 U CN202320528428 U CN 202320528428U CN 219958996 U CN219958996 U CN 219958996U
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- 238000002161 passivation Methods 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 18
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 18
- 238000000149 argon plasma sintering Methods 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- 239000004065 semiconductor Substances 0.000 abstract description 3
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- 238000000034 method Methods 0.000 description 9
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- 229920002120 photoresistant polymer Polymers 0.000 description 5
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- 238000004519 manufacturing process Methods 0.000 description 3
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- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
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- 238000005498 polishing Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
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- 229910052732 germanium Inorganic materials 0.000 description 1
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Abstract
The utility model relates to the field of semiconductors, and discloses a single photon avalanche diode array and a laser ranging chip, which comprise the following components: the substrate comprises a plurality of active areas and an isolation area, wherein the active areas are provided with PN junctions, and the isolation area is provided with a trench isolation structure; a metal mesh disposed over the trench isolation structure; the dielectric layer is arranged on the upper surface of the substrate, and the upper surface of the dielectric layer is a flat surface; the passivation layer is arranged on the upper surface of the dielectric layer, and the upper surface of the passivation layer is a flat surface; and the micro lenses are arranged on the upper surface of the passivated layer, the micro lenses correspondingly cover the active area, and the intersection parts of the edges of the adjacent micro lenses correspond to the isolation areas. The upper surface of the dielectric layer is a flat surface, and the upper surface of the passivation layer is also a flat surface, so that the thickness of the passivation layer is uniform, the stress in the passivation layer is balanced, cracks are not easy to occur, and the reliability of the single photon avalanche diode array is improved.
Description
Technical Field
The utility model relates to the field of semiconductors, in particular to a single photon avalanche diode array and a laser ranging chip.
Background
The single photon avalanche diode (Single Photon Avalanche Diode, SPAD) is an avalanche photodiode operating at breakdown voltage, and has the advantages of high sensitivity, low power consumption, high detection efficiency and the like.
In order to reduce crosstalk between adjacent single photon avalanche diode devices in a single photon avalanche diode array, a metal mesh is formed on a substrate in a region corresponding to an isolation trench structure. Because the metal grid is convex, the silicon nitride passivation layer formed on the surface of the substrate is uneven and uneven in thickness, and the silicon nitride passivation layer is over-stressed and is easy to crack, so that the reliability of the array is affected; and affects the subsequent process flow of forming the micro-lenses, for example, if forming a silicon oxide lens or a silicon nitride lens, two micro-lenses with different sizes are formed in the concave area and the convex area corresponding to the silicon nitride passivation layer.
Therefore, how to solve the above technical problems should be of great interest to those skilled in the art.
Disclosure of Invention
The utility model aims to provide a single photon avalanche diode array and a laser ranging chip, which improve the reliability of the single photon avalanche diode array.
In order to solve the above technical problems, the present utility model provides a single photon avalanche diode array, including:
the substrate comprises a plurality of active areas and an isolation area, wherein the active areas are provided with PN junctions, and the isolation area is provided with a trench isolation structure;
a metal mesh disposed over the trench isolation structure;
the dielectric layer is arranged on the upper surface of the substrate, and the upper surface of the dielectric layer is a flat surface;
the passivation layer is arranged on the upper surface of the dielectric layer, and the upper surface of the passivation layer is a flat surface;
and the micro-lenses are arranged on the upper surface of the passivation layer, the micro-lenses correspondingly cover the active area, and the intersection parts of the edges of the adjacent micro-lenses correspond to the isolation areas.
Optionally, the PN junction is located at a substrate close to the light incident surface or at a substrate far from the light incident surface.
Optionally, the dielectric layer is a silicon oxide layer, and the passivation layer is a silicon nitride layer.
Optionally, the method further comprises:
and the pinning layer is arranged in the area where the PN junction is located.
Optionally, the microlens is a silicon oxide lens or a silicon nitride lens or an organic lens.
Optionally, the trench isolation structure is a deep trench isolation structure, tungsten material is filled in the deep trench isolation structure, and metal grid material above the deep trench isolation structure is aluminum material.
Optionally, the method further comprises:
and the light scattering structure is arranged on the light incident surface of the substrate and is provided with a concave-convex structure in the active region.
Optionally, the light scattering structure is a silicon oxide layer.
Optionally, the light scattering structures are regularly distributed in an array.
The utility model also provides a laser ranging chip, which comprises any one of the single photon avalanche diode arrays.
The utility model provides a single photon avalanche diode array, which comprises: the substrate comprises a plurality of active areas and an isolation area, wherein the active areas are provided with PN junctions, and the isolation area is provided with a trench isolation structure; a metal mesh disposed over the trench isolation structure; the dielectric layer is arranged on the upper surface of the substrate, and the upper surface of the dielectric layer is a flat surface; the passivation layer is arranged on the upper surface of the dielectric layer, and the upper surface of the passivation layer is a flat surface; and the micro-lenses are arranged on the upper surface of the passivation layer, the micro-lenses correspondingly cover the active area, and the intersection parts of the edges of the adjacent micro-lenses correspond to the isolation areas.
The single photon avalanche diode array comprises a substrate, a metal grid, a dielectric layer, a passivation layer and microlenses, wherein the upper surface of the dielectric layer is a flat surface, the passivation layer is arranged on the upper surface of the dielectric layer, and the upper surface of the passivation layer is also a flat surface, so that the passivation layer is a film layer with uniform thickness, stress in the passivation layer is balanced everywhere, cracks are not easy to occur, and the reliability of the single photon avalanche diode array is improved. Meanwhile, as the upper surface of the passivation layer is a flat surface, silicon oxide lenses or silicon nitride microlenses with different sizes are avoided.
In addition, the utility model also provides a laser ranging chip with the advantages.
Drawings
For a clearer description of embodiments of the utility model or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the utility model, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a single photon avalanche diode array in the related art;
fig. 2 is a schematic structural diagram of a single photon avalanche diode array according to an embodiment of the present utility model;
FIG. 3 is a schematic diagram of another single photon avalanche diode array according to an embodiment of the present utility model;
FIG. 4 is a schematic diagram of another single photon avalanche diode array according to an embodiment of the present utility model;
fig. 5 to 13 are process flow diagrams of a single photon avalanche diode array according to an embodiment of the present utility model;
in the figure: 1. the semiconductor device comprises a substrate, 2, a trench isolation structure, 3, a metal grid, 4, a passivation layer, 5, a micro lens, 6, a dielectric layer, 7, a light scattering structure, 8, a micro lens material layer, 9, a patterned photoresist, 11, an active region, 12, an isolation region, 13, a PN junction, 14, a pinning layer, 131, an N-type doped region, 132 and a P-type doped region.
Detailed Description
In order to better understand the aspects of the present utility model, the present utility model will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present utility model, but the present utility model may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present utility model is not limited to the specific embodiments disclosed below.
In the related art, a schematic structure of a single photon avalanche diode array is shown in fig. 1, in order to reduce crosstalk between adjacent single photon avalanche diode devices in the single photon avalanche diode array, an isolation trench structure is disposed on a substrate 1, and a metal grid 3 is formed in a region corresponding to the isolation trench structure 2. A dielectric layer and a passivation layer 4 are formed on the metal grid 3, and as the silicon nitride passivation layer 4 on the surface of the substrate 1 is uneven and uneven in thickness, the silicon nitride passivation layer 4 is over-stressed and is easy to crack, so that the reliability of the array is affected; and affects the subsequent process flow of forming the micro-lenses, for example, if a silicon oxide lens or a silicon nitride lens is formed, two micro-lenses 5 with different sizes are formed in the concave area and the convex area corresponding to the silicon nitride passivation layer 4.
In view of this, the present utility model provides a single photon avalanche diode array, please refer to fig. 2, comprising:
a substrate 1, wherein the substrate 1 comprises a plurality of active areas 11 and an isolation area 12, the active areas 11 are provided with PN junctions 13, and the isolation area 12 is provided with a trench isolation structure 2;
a metal mesh 3 disposed over the trench isolation structure 2;
the dielectric layer 6 is arranged on the upper surface of the substrate 1, and the upper surface of the dielectric layer 6 is a flat surface;
the passivation layer 4 is arranged on the upper surface of the dielectric layer 6, and the upper surface of the passivation layer 4 is a flat surface;
and the micro-lenses 5 are arranged on the upper surface of the passivation layer 4, the micro-lenses 5 correspondingly cover the active areas 11, and the intersections of the edges of the adjacent micro-lenses 5 correspond to the isolation areas 12.
The substrate 1 includes, but is not limited to, a silicon substrate, a germanium substrate, and a silicon germanium substrate.
The PN junction 13 is formed by an N-type doped region 131 formed by N-type doping the substrate 1 and a P-type doped region 132 formed by P-type doping the substrate 1. The single photon avalanche diode has an operating voltage greater than the breakdown voltage of the PN junction 13, the PN junction 13 being used to generate photon-triggered avalanche current.
As an embodiment, the PN junction 13 is located near the substrate 1 of the light incident surface, i.e., the single photon avalanche diode is a front-illuminated single photon avalanche diode. However, the present utility model is not limited thereto, and as another embodiment, the PN junction 13 is located at the substrate 1 far from the light incident surface, that is, the single photon avalanche diode is a back-illuminated single photon avalanche diode, as shown in fig. 2.
The isolation region 12 is used to define the active region 11, and the trench isolation structure 2 includes an isolation trench and a dielectric filled in the isolation trench.
The trench isolation structure 2 may reduce cross-talk of single photon avalanche diodes formed in adjacent active regions 11. In order to reduce crosstalk of the single photon avalanche diode formed in the adjacent active region 11 to the greatest extent, the trench isolation structure 2 is a deep trench isolation (deep trench isolation, DTI) structure, and the inside of the deep trench isolation structure 2 is filled with tungsten material.
The metal grid 3 material above the deep trench isolation structure 2 can be an aluminum material to better reduce crosstalk between adjacent single photon avalanche diodes.
The upper surface of the dielectric layer 6 is a flat surface, namely, the upper surface of the dielectric layer 6 is at the same level everywhere; the upper surface of the passivation layer 4 is a flat surface, i.e. the upper surface of the passivation layer 4 is at the same level everywhere. The passivation layer 4 is located on the upper surface of the dielectric layer 6, so that the thickness of the dielectric layer 6 is uniform.
As an embodiment, the dielectric layer 6 is a silicon oxide layer, and the passivation layer 4 is a silicon nitride layer.
In the present embodiment, the type of the microlens 5 is not limited, and may be set by itself. For example, the microlens 5 may be a silicon oxide lens or a silicon nitride lens, an organic lens, or the like.
The microlenses 5 in the single photon avalanche diode array in the present utility model are single size microlenses 5, i.e. the size of each microlens 5 is equal.
The single photon avalanche diode array in this embodiment includes a substrate 1, a metal grid 3, a dielectric layer 6, a passivation layer 4 and a micro lens 5, the upper surface of the dielectric layer 6 is a flat surface, the passivation layer 4 is disposed on the upper surface of the dielectric layer 6, and the upper surface of the passivation layer 4 is also a flat surface, so the passivation layer 4 is a film layer with uniform thickness, stress in each place in the passivation layer 4 is balanced, cracks are not easy to occur, and reliability of the single photon avalanche diode array is improved. Meanwhile, as the upper surface of the passivation layer 4 is a flat surface, the occurrence of silicon oxide or silicon nitride microlenses 5 with different sizes is avoided, and the microlenses 5 are single-size microlenses 5 in the utility model.
Based on the above embodiments, in one embodiment of the present utility model, referring to fig. 3, the single photon avalanche diode array further includes:
and the pinning layer 14 is arranged in the area where the PN junction 13 is arranged so as to prevent surface defects or electrons generated by dangling bonds from entering the SPAD area.
On the basis of any of the above embodiments, in one embodiment of the present utility model, please refer to fig. 4, the single photon avalanche diode array further includes:
and a light scattering structure 7 having a concave-convex structure provided on the light incident surface of the substrate 1 and in the active region 11.
When incident light irradiates the light scattering structure 7, the incident light can be dispersed to various angles, and the effective optical path is increased, so that the absorption efficiency of the single photon avalanche diode to light is improved.
The light scattering structure 7 may be an inverted pyramid structure so that the refractive index variation along the traveling direction of the incident light is more gentle.
The light scattering structure 7 may be a silicon oxide layer or a silicon nitride layer or the like.
The distribution of the light scattering structures 7 is not limited in the present utility model, and may be set by itself. For example, the light scattering structures 7 are regularly distributed in an array, or the light scattering structures 7 are randomly distributed.
The method for manufacturing the single photon avalanche diode array in the utility model is described below by taking a back-illuminated single photon avalanche diode as an example.
Step 1, as shown in fig. 5, N-type doping is performed on the substrate 1 to form an N-type doped region 131;
step 2, as shown in fig. 6, P-type doping is performed on the substrate 1 to form a P-type doped region 132, and a PN junction 13 is formed with the N-type doped region 131;
step 3, as shown in fig. 7, doping the area where the PN junction 13 is located in the substrate 1 to form a pinning layer 14;
step 4, as shown in fig. 8, fabricating a trench isolation structure 2 in the substrate 1, fabricating a metal grid 3 on the trench isolation structure 2, and fabricating a light scattering structure 7, wherein the specific fabrication processes of the trench isolation structure 2, the metal grid 3, and the light scattering structure 7 refer to the related art; then depositing a dielectric layer 6, and polishing the upper surface of the dielectric layer 6 by using a chemical mechanical polishing technology so that the upper surface of the dielectric layer 6 is a flat surface;
step 5, as shown in fig. 9, depositing a passivation layer 4 on the upper surface of the dielectric layer 6, wherein the upper surface of the passivation layer 4 is a flat surface;
step 6, as shown in fig. 10, depositing a microlens material layer 8 on the surface of the passivation layer 4, wherein the thickness of the microlens material layer 8 needs to be adjusted based on the size of the single photon avalanche diode and the height of the microlens; in this embodiment, only silicon oxide or silicon nitride microlenses are taken as an example (organic microlenses are also possible).
Step 7, as shown in fig. 11, coating photoresist on the upper surface of the microlens material layer 8, exposing and developing to form patterned photoresist 9;
step 8, as shown in fig. 12, etching the microlens material layer 8 under the mask action of the patterned photoresist 9, and removing the patterned photoresist 9; the cross section of the etched microlens material layer can be triangular, rectangular, trapezoidal, conical and the like, and the corresponding actual shape can be a trihedron, a tetrahedron, a polyhedron, a polygonal trapezoid, a circular trapezoid and a cone;
step 9, as shown in fig. 13, continuing to deposit the microlens material to form microlenses 5;
step 10, etching back the micro lens 5 to adjust the optical path or the shape of the micro lens 5, as shown in fig. 4; and manufacturing the back-illuminated single-photon avalanche diode according to the conventional process flow in the related technology.
The utility model also provides a laser ranging chip, which comprises the single photon avalanche diode array in any embodiment.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other.
The single photon avalanche diode array and the laser ranging chip provided by the utility model are described in detail above. The principles and embodiments of the present utility model have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present utility model and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the utility model can be made without departing from the principles of the utility model and these modifications and adaptations are intended to be within the scope of the utility model as defined in the following claims.
Claims (10)
1. A single photon avalanche diode array comprising:
the substrate comprises a plurality of active areas and an isolation area, wherein the active areas are provided with PN junctions, and the isolation area is provided with a trench isolation structure;
a metal mesh disposed over the trench isolation structure;
the dielectric layer is arranged on the upper surface of the substrate, and the upper surface of the dielectric layer is a flat surface;
the passivation layer is arranged on the upper surface of the dielectric layer, and the upper surface of the passivation layer is a flat surface;
and the micro-lenses are arranged on the upper surface of the passivation layer, the micro-lenses correspondingly cover the active area, and the intersection parts of the edges of the adjacent micro-lenses correspond to the isolation areas.
2. The array of single photon avalanche diodes according to claim 1, wherein said PN junction is located at a substrate near the light entrance face or at a substrate far from the light entrance face.
3. The array of single photon avalanche diodes according to claim 1, wherein said dielectric layer is a silicon oxide layer and said passivation layer is a silicon nitride layer.
4. The single photon avalanche diode array according to claim 1, further comprising:
and the pinning layer is arranged in the area where the PN junction is located.
5. The single photon avalanche diode array according to claim 1, wherein said microlenses are silicon oxide lenses or silicon nitride lenses or organic lenses.
6. The single photon avalanche diode array according to claim 1, wherein the trench isolation structure is a deep trench isolation structure.
7. The single photon avalanche diode array according to any one of claims 1 to 6, further comprising:
and the light scattering structure is arranged on the light incident surface of the substrate and is provided with a concave-convex structure in the active region.
8. The array of single photon avalanche diodes according to claim 7, wherein said light scattering structure is a silicon oxide layer.
9. The array of single photon avalanche diodes according to claim 7, wherein said light scattering structures are regularly distributed in an array.
10. A laser ranging chip comprising a single photon avalanche diode array according to any of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320528428.8U CN219958996U (en) | 2023-03-16 | 2023-03-16 | Single photon avalanche diode array and laser ranging chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320528428.8U CN219958996U (en) | 2023-03-16 | 2023-03-16 | Single photon avalanche diode array and laser ranging chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4568453A1 (en) * | 2023-11-30 | 2025-06-11 | Suteng Innovation Technology Co., Ltd | Single photon avalanche diode array, receiving sensor and lidar |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4568453A1 (en) * | 2023-11-30 | 2025-06-11 | Suteng Innovation Technology Co., Ltd | Single photon avalanche diode array, receiving sensor and lidar |
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