CN219761002U - Signal modulation circuit and device based on phase-locked loop - Google Patents
Signal modulation circuit and device based on phase-locked loop Download PDFInfo
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- CN219761002U CN219761002U CN202320817505.1U CN202320817505U CN219761002U CN 219761002 U CN219761002 U CN 219761002U CN 202320817505 U CN202320817505 U CN 202320817505U CN 219761002 U CN219761002 U CN 219761002U
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Abstract
The utility model provides a signal modulation circuit and device based on a phase-locked loop, and relates to the technical field of radio frequency signal modulation. The phase-locked loop circuit comprises a single chip microcomputer, a crystal oscillator, a phase discriminator, a loop filter, an adder and a voltage-controlled oscillator, wherein the input end of the single chip microcomputer is connected with a signal source, the output end of the single chip microcomputer is connected with the input end of the phase discriminator, the output end of the phase discriminator is connected with the input end of the loop filter, the output end of the loop filter and a modulation signal are respectively connected with two input ends of the adder, the output end of the adder is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator outputs a modulated signal, the output end of the voltage-controlled oscillator is further connected to the phase discriminator to form a phase-locked loop, and the crystal oscillator is used for providing a reference clock for the phase discriminator. The adder is added after loop filtering to raise response time, so that the delay of the voltage controlled oscillator for receiving the modulation signal is shortened, the high-linearity signal is output, and meanwhile, the purity and stability of the carrier wave are improved.
Description
Technical Field
The utility model relates to the technical field of signal modulation of phase-locked loops, in particular to a signal modulation circuit and device based on a phase-locked loop.
Background
The modulation source is mainly used for providing modulation signals for various interference systems such as examination rooms.
In the existing modulation sources, most circuits are relatively complex and have low stability because of poor stray suppression capability of modulated signals. For example, in the patent document of CN206251094U, a high-speed frequency hopping signal modulation source circuit based on AD9957 is disclosed, which includes a UART serial circuit, the UART serial circuit is connected with an FPGA chip, the FPGA chip is connected with an AD9957 chip, the output end of the AD9957 chip is connected with a low-pass filter circuit, the signal output end of the low-pass filter is connected with a radio frequency amplifier and a digital attenuator circuit, the FPGA chip is also connected with the radio frequency amplifier and the digital attenuator ", wherein the AD9957 is adopted as a main control chip, which has the advantages of fast frequency switching speed, wide frequency hopping bandwidth, etc., but the modulated signal spurious suppression capability is lower, and the stability and quality of the signal are not high. Thus, a simple, highly linear modulation source is one of the directions of industry development.
Disclosure of Invention
In order to overcome the above problems or at least partially solve the above problems, the present utility model provides a signal modulation circuit and device based on a phase-locked loop, which increases the adder boost response time after loop filtering, so that the delay of receiving a modulation signal by a voltage-controlled oscillator is shortened, a highly linear signal is output, and meanwhile, the purity and stability of a carrier wave are improved.
The utility model adopts the technical scheme that:
in a first aspect, the present utility model provides a signal modulation circuit based on a phase-locked loop, which includes a single chip microcomputer, a crystal oscillator, a phase discriminator, a loop filter, an adder and a voltage-controlled oscillator, where an input end of the single chip microcomputer is connected to a signal source, an output end of the single chip microcomputer is connected to an input end of the phase discriminator, an output end of the phase discriminator is connected to an input end of the loop filter, an output end of the loop filter and a modulation signal are respectively connected to two input ends of the adder, an output end of the adder is connected to an input end of the voltage-controlled oscillator, an output end of the voltage-controlled oscillator outputs a modulated signal, and an output end of the voltage-controlled oscillator is further connected to the phase discriminator to form a phase-locked loop, where the crystal oscillator is used for providing a reference clock for the phase discriminator.
Furthermore, the singlechip adopts a microcontroller chip N3 with the model of C8051F300, a pin 1 and a pin 9 of the chip N3 are connected with a signal source, a pin 8 and a pin 10 are reserved program interfaces, the pin 3 is connected with a power supply, a pin 2 and a pin 6 are used as output ports to be connected with the phase discriminator, a pin 7 is used as a clock output pin to be connected with the phase discriminator, and a pin 11, a pin 12 and a pin 13 are all grounded.
Further, the phase discriminator adopts a phase-locked loop of model LTC 6945.
Further, the phase discriminator includes a chip N2, a resistor R2, a capacitor C3, a resistor R1, a capacitor C2, a capacitor C4, a capacitor C7, a capacitor C6, a resistor R3, a capacitor C1, and a capacitor C5, the pin 1 of the chip N2 is connected to a power supply, the pin 5, the pin 6, and the pin 7 are connected to the singlechip, the pin 8 of the chip N2 and the pin 9 are connected to the power supply through the resistor R2, the pin 14 is grounded through the capacitor C3, the pin 14 is connected to the power supply through the resistor R1, the pin 15 is grounded through the capacitor C2, the pin 16 is connected to the voltage-controlled oscillator, the pin 22 is connected to the power supply and grounded through the capacitor C4, the pin 28 is grounded through the capacitor C5, the pin 27 and the pin 26 are connected to the crystal oscillator, the pin 25 is connected to the ground through the resistor R3 and the capacitor C6 in series, and the pin 25 is connected to the power supply through the capacitor C7.
Further, the adder includes a chip N4, a resistor R5, a capacitor C9, a capacitor C8, and a resistor R4, where the chip N4 is an amplifier of the model AD8031, a pin 3 of the chip N4 is connected to a modulation signal through the resistor R5, a pin 4 of the chip N4 is connected to the voltage-controlled oscillator through the resistor R4, a pin 1 of the chip N4 is connected to the pin 4 and is grounded through the capacitor C8, a pin 2 of the chip N4 is grounded, and a pin 5 is connected to a power supply and is grounded through the capacitor C9.
Further, the model of the voltage-controlled oscillator is MAOC-009269.
In a second aspect, the present utility model provides a signal modulation device based on a phase-locked loop, which includes a housing and the signal modulation circuit based on a phase-locked loop, where the signal modulation circuit is disposed in the housing, and an outer wall of the housing is provided with a signal input end and a signal output end respectively.
Compared with the prior art, the utility model has at least the following advantages or beneficial effects:
the utility model provides a signal modulation circuit and a signal modulation device based on a phase-locked loop, which are used for realizing superposition of a modulation signal and loop control voltage and controlling a VCO (voltage controlled oscillator) to realize carrier generation and modulation waveform by adding an adder after loop filtering. Meanwhile, the response time is improved through the adder, so that the delay of receiving a modulation signal by the voltage-controlled oscillator is shortened, a high-linearity signal is output, and the purity and stability of a carrier wave are improved. In addition, the device adopts a standard patch packaging mode, so that the volume is greatly reduced, and engineering application is facilitated.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic block diagram of an embodiment of a phase locked loop based signal modulation circuit according to the present utility model;
fig. 2 is a schematic circuit diagram of an embodiment of a signal modulation circuit based on a phase locked loop according to the present utility model.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. The components of the embodiments of the present utility model generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the utility model, as presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Examples
Referring to fig. 1 and 2, an embodiment of the present utility model provides a signal modulation circuit based on a phase-locked loop, which includes a single chip microcomputer, a crystal oscillator, a phase discriminator, a loop filter, an adder and a voltage-controlled oscillator, wherein an input end of the single chip microcomputer is connected to a signal source, an output end of the single chip microcomputer is connected to an input end of the phase discriminator, an output end of the phase discriminator is connected to an input end of the loop filter, an output end of the loop filter and a modulation signal are respectively connected to two input ends of the adder, an output end of the adder is connected to an input end of the voltage-controlled oscillator, an output end of the voltage-controlled oscillator outputs a modulated signal, an output end of the voltage-controlled oscillator is further connected to the phase discriminator to form a phase-locked loop, and the crystal oscillator is used for providing a reference clock for the phase discriminator.
In the above embodiment, the phase discriminator, loop filter and VCO voltage controlled oscillator form a PLL phase locked loop structure, and the frequency and phase of the oscillation signal in the loop are controlled by using the externally input modulation signal, so as to achieve the purpose of automatic tracking of the output signal frequency to the input signal frequency, and achieve phase locking. The singlechip adopts a serial communication I2C mode, outputs a configuration signal by controlling the level of a C+/C-signal, sends the configuration signal into the phase discriminator, provides a reference clock through the crystal oscillator, and sends the configuration signal into the phase discriminator. The phase detector outputs an error voltage by discriminating a phase difference of the input and output signals. The error voltage is filtered by a loop filter formed by a capacitor resistor to remove high-frequency components and noise in the error voltage, and then enters an adder together with a modulation signal (for example, triangular wave). The output voltage of the adder enters a VCO voltage-controlled oscillator, and the VCO outputs a modulated signal whose frequency varies in a triangular wave period according to the voltage variation of the triangular wave modulation signal. Therefore, by adding the adder after loop filtering, superposition of a modulation signal and loop control voltage is realized, and the VCO voltage-controlled oscillator is controlled to realize carrier generation and modulation waveform. Meanwhile, the response time is improved through the adder, so that the delay of receiving a modulation signal by the voltage-controlled oscillator is shortened, a high-linearity signal is output, and the purity and stability of a carrier wave are improved.
In some embodiments of the present utility model, the single chip microcomputer uses a microcontroller chip N3 with a model number of C8051F300, a pin 1 and a pin 9 of the chip N3 are connected to a signal source, a pin 8 and a pin 10 are reserved program interfaces, a pin 3 is connected to a power supply, a pin 2 and a pin 6 are used as output ports to be connected to the phase detector, a pin 7 is used as a clock output pin to be connected to the phase detector, and a pin 11, a pin 12 and a pin 13 are all grounded.
Referring to fig. 2, in the above embodiment, the pin 1 and the pin 9 of the microcontroller chip N3 with the model number of C8051F300 are connected to a signal source, and 4 kinds of frequency switching of the carrier frequency can be realized by controlling the level of the c+/C-signal. Pins 8 and 10 are reserved program interfaces to enable autonomous updating of programs. Pin 2 and pin 6 serve as output ports for the configuration signal to the phase detector.
In some embodiments of the utility model, the phase detector uses a model LTC6945 phase locked loop.
Further, the phase discriminator includes a chip N2, a resistor R2, a capacitor C3, a resistor R1, a capacitor C2, a capacitor C4, a capacitor C7, a capacitor C6, a resistor R3, a capacitor C1, and a capacitor C5, the pin 1 of the chip N2 is connected to a power supply, the pin 5, the pin 6, and the pin 7 are connected to the singlechip, the pin 8 of the chip N2 and the pin 9 are connected to the power supply through the resistor R2, the pin 14 is grounded through the capacitor C3, the pin 14 is connected to the power supply through the resistor R1, the pin 15 is grounded through the capacitor C2, the pin 16 is connected to the voltage-controlled oscillator, the pin 22 is connected to the power supply and grounded through the capacitor C4, the pin 28 is grounded through the capacitor C5, the pin 27 and the pin 26 are connected to the crystal oscillator, the pin 25 is connected to the ground through the resistor R3 and the capacitor C6 in series, and the pin 25 is connected to the power supply through the capacitor C7.
In the above embodiment, the phase discriminator compares the local oscillation signal (configuration signal) generated by the singlechip with the feedback signal of the VCO voltage-controlled oscillator, and outputs the error voltage. In order to keep the frequency unchanged, the phase difference is required not to change, and if the phase difference is changed, the voltage at the output end of the singlechip is changed, so that the VCO is controlled until the phase difference is recovered, and the purpose of phase locking is achieved. Meanwhile, the capacitor resistor at the periphery of the chip N2 forms a loop filter to filter out high-frequency components and noise in the error voltage. In addition, the crystal oscillator adopts a temperature compensation clock, which is beneficial to improving the purity and phase noise of carrier waves (triangular modulation waves). Illustratively, the crystal oscillator is of the type TCXO.
In some embodiments of the present utility model, the adder includes a chip N4, a resistor R5, a capacitor C9, a capacitor C8, and a resistor R4, the chip N4 is an amplifier of model AD8031, the pin 3 of the chip N4 is connected to the modulation signal through the resistor R5, the pin 4 of the chip N4 is connected to the voltage-controlled oscillator through the resistor R4, the pin 1 of the chip N4 is connected to the pin 4 and is grounded through the capacitor C8, the pin 2 of the chip N4 is grounded, and the pin 5 is connected to a power source and is grounded through the capacitor C9.
In the above embodiment, the adder superimposes the modulation signal and the loop control voltage, and controls the VCO voltage-controlled oscillator to realize carrier generation and modulation waveform.
In some embodiments of the present utility model, the voltage controlled oscillator is MAOC-009269.
In a second aspect, the present utility model provides a signal modulation device based on a phase-locked loop, which includes a housing and the signal modulation circuit based on a phase-locked loop, where the signal modulation circuit is disposed in the housing, and an outer wall of the housing is provided with a signal input end and a signal output end respectively.
In the embodiment, the volume is greatly reduced by adopting the standard patch packaging mode, and the engineering application is facilitated. Exemplary, the performance index of the signal modulation apparatus in this embodiment is as follows: 1. the coverage range of the working frequency is ku frequency band (12 GHz-18 GHz); 2. the linearity of the modulated signal and the carrier frequency variation is more than 97%;3. the frequency modulation bandwidth is more than or equal to 50MHz;4. the modulation mode is triangular wave modulation, and the triangular wave modulation frequency is more than or equal to 1MHz.
The above is only a preferred embodiment of the present utility model, and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.
It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present utility model may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (7)
1. The utility model provides a signal modulation circuit based on phase-locked loop, its characterized in that includes singlechip, crystal oscillator, phase discriminator, loop filter, adder and voltage-controlled oscillator, the input of singlechip is connected the signal source, the output of singlechip is connected the input of phase discriminator, the output of phase discriminator is connected the input of loop filter, the output of loop filter and modulating signal are connected respectively the two inputs of adder, the output of adder is connected voltage-controlled oscillator's input, voltage-controlled oscillator's output has modulated signal, voltage-controlled oscillator's output still is connected to phase discriminator forms phase-locked loop, the crystal oscillator is used for the phase discriminator provides the reference clock.
2. The signal modulation circuit based on phase-locked loop of claim 1, wherein the single chip microcomputer adopts a microcontroller chip N3 with model number of C8051F300, pin 1 and pin 9 of the chip N3 are connected with a signal source, pin 8 and pin 10 are reserved program interfaces, pin 3 is connected with a power supply, pin 2 and pin 6 are used as output ports to be connected with the phase discriminator, pin 7 is used as a clock output pin to be connected with the phase discriminator, and pin 11, pin 12 and pin 13 are all grounded.
3. A phase locked loop based signal modulation circuit according to claim 1 wherein the phase detector is a LTC6945 model phase locked loop.
4. The phase-locked loop-based signal modulation circuit according to claim 1, wherein the phase detector comprises a chip N2, a resistor R2, a capacitor C3, a resistor R1, a capacitor C2, a capacitor C4, a capacitor C7, a capacitor C6, a resistor R3, a capacitor C1 and a capacitor C5, the pin 1 of the chip N2 is connected to a power supply, the pin 5, the pin 6 and the pin 7 are respectively connected to the single chip microcomputer, the pin 8 and the pin 9 of the chip N2 are connected to the power supply through the resistor R2, the pin 14 is grounded through the capacitor C3, the pin 14 is also connected to the power supply through the resistor R1, the pin 15 is grounded through the capacitor C2, the pin 16 is connected to the voltage-controlled oscillator, the pin 22 is connected to the power supply through the capacitor C4, the pin 28 is grounded through the capacitor C5, the pin 27 and the pin 26 are also connected to the power supply, the pin 25 is connected to the ground through the resistor R3 and the capacitor C6 in series, the pin 25 is also connected to the power supply through the capacitor C24.
5. The phase-locked loop based signal modulation circuit according to claim 1, wherein the adder comprises a chip N4, a resistor R5, a capacitor C9, a capacitor C8 and a resistor R4, the chip N4 is an amplifier of model AD8031, a pin 3 of the chip N4 is connected to a modulation signal through the resistor R5, a pin 4 of the chip N4 is connected to the voltage-controlled oscillator through the resistor R4, a pin 1 of the chip N4 is connected to the pin 4 and is grounded through the capacitor C8, a pin 2 of the chip N4 is grounded, and a pin 5 is connected to a power supply and is grounded through the capacitor C9.
6. The phase-locked loop based signal modulation circuit of claim 1, wherein the voltage controlled oscillator is of the type MAOC-009269.
7. A signal modulation device based on a phase-locked loop, which is characterized by comprising a shell and the signal modulation circuit based on the phase-locked loop as claimed in any one of claims 1-6, wherein the signal modulation circuit is arranged in the shell, and the outer wall of the shell is respectively provided with a signal input end and a signal output end.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320817505.1U CN219761002U (en) | 2023-04-13 | 2023-04-13 | Signal modulation circuit and device based on phase-locked loop |
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| CN202320817505.1U CN219761002U (en) | 2023-04-13 | 2023-04-13 | Signal modulation circuit and device based on phase-locked loop |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117374714A (en) * | 2023-12-07 | 2024-01-09 | 湖南国科通导时空科技有限公司 | Automatic frequency locking and unlocking detection method, system and medium for laser signals |
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2023
- 2023-04-13 CN CN202320817505.1U patent/CN219761002U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117374714A (en) * | 2023-12-07 | 2024-01-09 | 湖南国科通导时空科技有限公司 | Automatic frequency locking and unlocking detection method, system and medium for laser signals |
| CN117374714B (en) * | 2023-12-07 | 2024-03-22 | 湖南国科通导时空科技有限公司 | Automatic frequency locking and unlocking detection method, system and medium for laser signals |
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