CN219085980U - Schottky diode element - Google Patents

Abstract

The utility model provides a schottky diode element. The Schottky diode element includes a substrate, a first electrode layer, an epitaxial layer, a metal silicide layer, a second electrode layer and a dielectric material layer. The first electrode layer is formed on the bottom end of the substrate. An epitaxial layer is formed on the top of the substrate, wherein the epitaxial layer has at least one doped region. The metal silicide layer is formed on the epitaxial layer and covers a part of the surface of at least one doped region. The second electrode layer is formed on the metal silicide layer. A layer of dielectric material extends from the base to the second electrode layer. The dielectric material layer covers another part of the surface of at least one doped region and covers a part of the surface of the second electrode layer. Thereby, the metal silicide layer can be separated from the side cutting surface of the dielectric material layer by a predetermined distance, thereby avoiding the problem of electric leakage.

Description

Schottky diode element

technical field

The utility model relates to a diode element, in particular to a Schottky diode element.

Background technique

In the prior art, a Schottky diode is a diode with a low turn-on voltage drop and allows high-speed switching, and is an electronic component produced by utilizing the characteristics of a Schottky barrier. Schottky diodes have a very low turn-on voltage. A general diode will produce a voltage drop of about 0.7 to 1.7 volts when current flows, but the voltage drop of a Schottky diode is only 0.15 to 0.45 volts, so the efficiency of the system can be effectively improved.

Furthermore, the Schottky diode uses the metal-semiconductor junction as the Schottky energy barrier to produce a rectification effect, which is different from the P-N junction generated by the semiconductor-semiconductor junction used by general diodes. The characteristics of the Schottky energy barrier make the conduction voltage drop of the Schottky diode lower, and can increase the switching speed.

In addition, the biggest difference between Schottky diodes and ordinary diodes is the reverse recovery time, that is, the time it takes for the diode to switch from the conduction state through the forward current to the non-conduction state. For ordinary diodes, the reverse recovery time is about several hundred nS, and for high-speed diodes, it is less than one hundred nS. However, Schottky diodes have no reverse recovery time, so the switching time of small-signal Schottky diodes is about tens of pS, and the switching time of special large-capacity Schottky diodes is only tens of pS. General diodes will cause EMI noise due to reverse current during the reverse recovery time, but Schottky diodes can switch immediately without the problems of reverse recovery time and reverse current.

Also, a Schottky diode is a semiconductor component that uses majority carriers. If the Schottky diode uses an N-type semiconductor, its diode characteristics are generated by the majority of carriers (ie, electrons). Most carriers quickly pass through the junction from the semiconductor and inject into the conduction band of the metal on the other side. Since this process does not involve the combination of N-type and P-type carriers (random reaction and takes a long time), Schott The base diode will stop conducting faster than a conventional diode. Such a feature reduces the area required by the components and further reduces the time required for switching.

In the prior art, the biggest defect of Schottky diodes is its low reverse bias voltage and large reverse leakage current. For Schottky diodes made of silicon and metal, their reverse bias rated withstand voltage is only up to 50V , and the reverse leakage current value has a positive temperature characteristic, which tends to increase sharply as the temperature rises. In practical design, it is necessary to pay attention to the hidden danger of thermal runaway. At the same time, in the process of manufacturing Schottky diodes, it is necessary to use multiple photomask processes, which not only has high cost, complicated process, but also prolongs the manufacturing time.

Utility model content

The problem to be solved by the utility model is to provide a Schottky diode element for the deficiencies of the prior art.

In order to solve the above problems, one of the technical means adopted by the utility model is to provide a Schottky diode element, which includes: a substrate, a first electrode layer, an epitaxial layer, a metal silicide layer, a The second electrode layer and a dielectric material layer. The first electrode layer is formed on the bottom end of the substrate. The epitaxial layer is formed on top of the substrate, wherein the epitaxial layer has at least one doped region. The metal silicide layer is formed on the epitaxial layer and covers a part of the surface of the at least one doped region. The second electrode layer is formed on the metal silicide layer. The layer of dielectric material extends from the base to the second electrode layer. The dielectric material layer covers another part of the surface of the at least one doped region and covers a part of the surface of the second electrode layer.

In one feasible or preferred embodiment, the total thickness of the substrate and the epitaxial layer is substantially between 250 and 300 μm, and the thickness of the epitaxial layer is substantially between 3 and 10 μm. Between; wherein, the first electrode layer is a first multi-layer conductive structure including a titanium layer, a nickel layer, and a silver layer, and the second electrode layer is a layer that includes a titanium layer, a nickel layer, and a silver layer A second multi-layer conductive structure; wherein, the thickness of the metal silicide layer is substantially between 10 to 90 nm.

In one feasible or preferred embodiment, the thickness of the at least one doped region is substantially between 1 and 3 μm, and the width of the at least one doped region is substantially between 70 and 90 μm wherein, a first portion of the upper surface of the at least one doped region is covered by the metal silicide layer, and a second portion of the upper surface and one side surface of the at least one doped region are covered by the interlayer Covered by an electrical material layer.

In one of the feasible or preferred embodiments, the dielectric material layer is a moisture barrier layer with polyimide or silica gel, and the top of the dielectric material layer is opposite to the second electrode The minimum distance of the layers is substantially between 3 and 20 μm.

In one feasible or preferred embodiment, the dielectric material layer has a side cut surface, and the shortest distance between the second electrode layer and the side cut surface of the dielectric material layer is greater than 5 μm, The shortest distance between the metal silicide layer and the side cutting surface of the dielectric material layer is greater than 5 μm, and the shortest distance between the at least one doped region and the side cutting surface of the dielectric material layer is substantially between 5 and 20 μm, and the shortest distance between the epitaxial layer and the side cutting surface of the dielectric material layer is substantially between 5 and 20 μm.

In one feasible or preferred embodiment, the depth of the cutting groove is substantially between 20-50 μm, and the width of the cutting groove is substantially between 60-80 μm.

In one of the feasible or preferred embodiments, after the step of cutting the initial dielectric material layer, the initial substrate and the initial first electrode layer, a plurality of Schottky diode elements are fabricated; Wherein, each Schottky diode element includes the substrate, the first electrode layer, the epitaxial layer having the doped region, the metal silicide layer, the second electrode layer and the a dielectric material layer, the first electrode layer is formed on the bottom of the substrate, the epitaxial layer is formed on the top of the substrate, the metal silicide layer is formed on the epitaxial layer, and Covering a part of the surface of the doped region, the second electrode layer is formed on the metal silicide layer, the dielectric material layer extends from the base to the second electrode layer, and the dielectric material layer The material layer covers another part of the surface of the at least one doped region and covers a part of the surface of the second electrode layer.

One of the beneficial effects of the present invention is that the Schottky diode element provided by the present invention can pass through "the metal silicide layer is formed on the epitaxial layer and covers the at least one doped region." a part of the surface” and “the dielectric material layer covers another part of the surface of the at least one doped region and covers a part of the surface of the second electrode layer”, so that the metal silicide layer can be separated from the dielectric The side cutting surface of the electrical material layer has a predetermined distance, thereby avoiding the problem of electric leakage.

In order to further understand the features and technical content of the present utility model, please refer to the following detailed description and accompanying drawings of the present utility model. However, the provided drawings are only for reference and description, and are not intended to limit the present utility model. .

Description of drawings

FIG. 1 is a flow chart of a method for manufacturing a Schottky diode element provided by an embodiment of the present invention.

FIG. 2 is a schematic diagram of step S100 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 3 is a schematic diagram of step S102 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 4 is a schematic diagram of forming an initial metal silicide layer on the initial epitaxial layer in the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 5 is a schematic diagram of step S104 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 6 is a schematic diagram of step S106 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 7 is a schematic diagram of step S108 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 8 is a schematic diagram of step S110 of the manufacturing method of the Schottky diode element provided by the embodiment of the present invention.

FIG. 9 is a schematic side sectional view of the Schottky diode element provided by the embodiment of the present invention.

FIG. 10 is a schematic top view of the Schottky diode element provided by the embodiment of the present invention.

Detailed ways

The implementation of the "Schottky diode element" disclosed in the utility model is described below through specific specific examples. Those skilled in the art can understand the advantages and effects of the utility model from the content disclosed in this specification. The utility model can be implemented or applied through other different specific embodiments, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the idea of the utility model. In addition, it should be stated in advance that the drawings of the present utility model are only for simple illustration, and are not drawn according to the actual size. The following embodiments will further describe the relevant technical content of the present utility model in detail, but the disclosed content is not intended to limit the protection scope of the present utility model. In addition, the term "or" used herein may include any one or a combination of more of the associated listed items depending on the actual situation.

[Example]

Referring to Fig. 1 to Fig. 10 shown, the utility model embodiment provides a kind of manufacturing method of Schottky diode element, it comprises the following steps at least: (it is worth noting that the utility model can make a plurality of Schottky Diode element S, and in order to simplify the production process, Figures 2 to 8 only show the production of a complete Schottky diode element as an example, and the two sides of Figures 2 to 8 are truncated to facilitate the enlarged diagram) .

First, as shown in FIG. 1 and FIG. 2, a structural layer is provided, and the structural layer includes an initial substrate 1a (i.e., the base material layer before subsequent processing), an initial first layer formed on the bottom of the initial substrate 1a. The electrode layer 2a (ie, the electrode material layer before the subsequent processing process), and an initial epitaxial layer 3a (ie, the epitaxial material layer before the subsequent processing process) are formed on the top of the initial substrate 1a (step S100 ). For example, the initial substrate 1a can be made of a semiconductor material (for example, the initial substrate 1a can be a silicon substrate), and the initial substrate 1a can be doped with a high concentration of acceptor or donor ions (for example, the initial substrate 1a can be doped There are high concentrations of N+ ions or N- ions). In addition, the doping form of the initial epitaxial layer 3a can be the same as that of the initial substrate 1a, but the doping concentration is lower (for example, the initial epitaxial layer 3a can be doped with low concentration of N+ ions or N− ions). In addition, the initial first electrode layer 2a can be a first multi-layer conductive structure including a titanium layer, a nickel layer, and a silver layer (Ti/Ni/Ag), and the initial first electrode layer 2a can be deposited by chemical vapor deposition (Chemical Vapor Deposition). VaporDeposition, CVD), physical vapor deposition (Physical Vapor Deposition, PVD) or any other processing method. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Next, as shown in FIG. 1, FIG. 2 and FIG. 3, an initial doping region 30a is formed (FIG. 3 is a schematic cross-sectional view, and the two cross-sectional regions 30a shown in FIG. The schematic diagram obtained from the side view section) is placed in the initial epitaxial layer 3 a (step S102 ). For example, before the step S102 of forming the initial doped region 30a in the initial epitaxial layer 3a, a photomask may be used to form a plurality of grooves in the oxide layer L (two grooves are used as an example in FIG. 3 ), and the upper surface of the initial epitaxial layer 3a can form a plurality of exposed surfaces by covering the oxide layer L with a plurality of grooves (Figure 3 uses two exposed surfaces as an example), and then apply ion diffusion The exposed surface of the initial epitaxial layer 3 a is doped with impurities by means of ion diffusion or ion implantation through a plurality of grooves, so as to form a plurality of initial doping regions 30 a. It should be noted that the conductive form of the initial doped region 30a is different from that of the initial epitaxial layer 3a. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Then, as shown in FIG. 1, FIG. 3, FIG. 4 and FIG. 5, a plurality of metal silicide layers 4 are formed on the initial epitaxial layer 3a, and each metal silicide layer 4 covers a part of the surface of the initial doped region 30a ( Step S104). For example, before the step S104 of forming a plurality of metal silicide layers 4 on the initial epitaxial layer 3a, the oxide layer L in FIG. Physical Vapor Deposition (Physical VaporDeposition, PVD) to form an initial metal silicide layer 4a on the initial epitaxial layer 3a (as shown in Figure 4), and then remove the unnecessary parts through the semiconductor process, and finally form the pattern 5 shows a plurality of metal silicide layers 4 . However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Next, as shown in FIG. 1 , FIG. 5 and FIG. 6 , a plurality of second electrode layers 5 are formed, and each second electrode layer 5 is disposed on a corresponding metal silicide layer 4 (step S106 ). For example, the second electrode layer 5 can be a second multi-layer conductive structure comprising a titanium layer, a nickel layer, and a silver layer (Ti/Ni/Ag), and the second electrode layer 5 can be deposited by chemical vapor deposition (Chemical Vapor Deposition, CVD), physical vapor deposition (Physical Vapor Deposition, PVD) or any other processing method. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Next, as shown in Fig. 1, Fig. 6 and Fig. 7, the cutting groove G is formed (from the side view cross-sectional schematic view of Fig. 7, there will be two cutting grooves G, but in fact, multiple cutting grooves G will form a staggered well shape, so that a plurality of cutting grooves G will communicate with each other), to cut the initial doped region 30a into a plurality of doped regions 30 separated from each other (the two doped regions 30 closest to the middle position in FIG. 7 are actually 1 a surrounding doped region 30), and cut the initial epitaxial layer 3a into a plurality of epitaxial layers 3 separated from each other (step S108). For example, the depth GH of the cutting groove G may be substantially between 20-50 μm, and the width GW of the cutting groove G may be substantially between 60-80 μm. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Then, as shown in FIG. 1, FIG. 7 and FIG. 8, an initial dielectric material layer 6a is formed (there are two initial dielectric material layers 6a from the side view schematic diagram of FIG. 7, but in fact the initial dielectric material layer 6a will be shaped according to a plurality of cutting grooves G formed along the staggered grid shape) in the cutting groove G to cover a part of the surface of each doped region 30 and a part of the surface of each second electrode layer 5 (step S110 ). For example, the initial dielectric material layer 6a may be fabricated by chemical vapor deposition (Chemical Vapor Deposition, CVD), physical vapor deposition (Physical Vapor Deposition, PVD) or any other processing methods. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Next, as shown in FIG. 1, FIG. 8, FIG. 9 and FIG. 10, the initial dielectric material layer 6a, the initial substrate 1a, and the initial first electrode layer 2a are cut along the cutting line in FIG. The material layer 6 , the plurality of substrates 1 and the plurality of first electrode layers 2 , thereby completing the fabrication of a plurality of Schottky diode elements S (step S112 ).

It is worth noting that, as shown in FIG. 8, FIG. 9 and FIG. 10, after the step S112 of cutting the initial dielectric material layer 6a, the initial substrate 1a, and the initial first electrode layer 2a, a plurality of Schottky diode elements S are manufacture complete. Wherein, each Schottky diode element includes a substrate 1, a first electrode layer 2 (or an upper metal layer that can be used as a Schottky interface), an epitaxial layer 3 having a doped region 30, a metal silicide layer 4, The second electrode layer 5 (or the lower metal layer that can be used as the Ohmic interface) and the dielectric material layer 6 .

Furthermore, as shown in FIG. 9 and FIG. 10 , the first electrode layer 2 is formed on the bottom of the substrate 1 , and the epitaxial layer 3 is formed on the top of the substrate 1 . For example, the total thickness of the substrate 1 and the epitaxial layer 3 can be substantially between 250 and 300 μm, and the first electrode layer 2 can be a first multi-layer conductive structure including a titanium layer, a nickel layer, and a silver layer. , and the thickness 3H of the epitaxial layer 3 may be substantially between 3 and 10 μm. In addition, the thickness 30H of the at least one doped region 30 may be substantially between 1 and 3 μm, and the width 30W of the at least one doped region 30 may be substantially between 70 and 90 μm, thereby avoiding microcracks ( microcrack) and cause leakage problems. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Furthermore, as shown in FIG. 9 and FIG. 10 , the metal silicide layer 4 is formed on the epitaxial layer 3 and covers a part of the surface of the doped region 30 , and the second electrode layer 5 is formed on the metal silicide layer 4 . For example, the thickness 4H of the metal silicide layer 4 can be substantially between 10 to 90 nm, and the second electrode layer 5 can be a second multi-layer conductive structure including a titanium layer, a nickel layer, and a silver layer. In addition, a first part of the upper surface 3001 of at least one doped region 30 can be covered by the metal silicide layer 4, and a second part of the upper surface 3002 and one side surface 3003 of at least one doped region 30 can be covered by a dielectric material covered by layer 6. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

Furthermore, as shown in FIG. 9 and FIG. 10, the dielectric material layer 6 can extend from the substrate 1 to the second electrode layer 5, and the dielectric material layer 6 covers another part of the surface of at least one doped region 30 and covers Part of the surface of the second electrode layer 5 . For example, the dielectric material layer 6 can be a moisture barrier layer made of polyimide or silicone, so as to prevent moisture from penetrating into the interior of the Schottky diode element S and causing damage. In addition, the dielectric material layer 6 has a cut surface 6000 on one side, and the minimum distance 6H between the top of the dielectric material layer 6 and the second electrode layer 5 is substantially between 3 and 20 μm. In addition, the shortest distance 5L between the second electrode layer 5 and the side cutting surface 6000 of the dielectric material layer 6 is greater than 5 μm, and the shortest distance 4L between the metal silicide layer 4 and the side cutting surface 6000 of the dielectric material layer 6 is greater than 5 μm, by This avoids the problem of electric leakage. In addition, the shortest distance 30L between at least one doped region 30 and the side cutting surface 6000 of the dielectric material layer 6 is substantially between 5 and 20 μm, and the distance between the epitaxial layer 3 and the side cutting surface 6000 of the dielectric material layer 6 is The shortest distance 3L is substantially between 5 and 20 μm. However, the above-mentioned example is only one possible embodiment and is not intended to limit the present invention.

[Advantageous Effects of Embodiment]

One of the beneficial effects of the present invention is that the Schottky diode element provided by the present invention can be formed by "the metal silicide layer 4 is formed on the epitaxial layer 3 and covers a part of the surface of at least one doped region 30" And the technical scheme of "the dielectric material layer 6 covers another part of the surface of at least one doped region 30 and covers a part of the surface of the second electrode layer 5", so that the metal silicide layer 4 can be cut from the side of the dielectric material layer 6 The surface 6000 is at a predetermined distance, so as to avoid the problem of electric leakage.

Another beneficial effect of the present utility model is that the manufacturing method of the Schottky diode element provided by the present utility model can pass through "providing a structural layer, the structural layer comprises an initial base 1a, is formed on the bottom of the initial base 1a An initial first electrode layer 2a on the initial substrate 1a, an initial epitaxial layer 3a formed on the top of the initial substrate 1a", "form an initial doped region 30a in the initial epitaxial layer 3a", "form a plurality of metal silicides Layer 4 is on the initial epitaxial layer 3a, and each metal silicide layer 4 covers a part of the surface of the initial doping region 30a", "forming a plurality of second electrode layers 5, and each second electrode layer 5 is arranged on a corresponding On the metal silicide layer 4 ", "form a cutting groove G to cut the initial doped region 30a into a plurality of doped regions 30 separated from each other, and cut the initial epitaxial layer 3a into a plurality of epitaxial layers separated from each other 3", "form the initial dielectric material layer 6a in the cutting groove G to cover a part of the surface of each doped region 30 and a part of the surface of each second electrode layer 5", "cut the initial dielectric material layer 6a, The initial substrate 1a and the initial first electrode layer 2a are used to form a plurality of dielectric material layers 6, a plurality of substrates 1 and a plurality of first electrode layers 2", so as to reduce the number of photomasks used in the manufacturing process.

The content disclosed above is only a preferred feasible embodiment of the utility model, and is not therefore limiting the protection scope of the claims of the utility model, so all equivalent technical changes made by using the utility model specification and accompanying drawings are all Included in the scope of protection of the claims of the present utility model.

Claims (5)

1. A schottky diode element, the schottky diode element comprising:

a substrate;

a first electrode layer formed on the bottom end of the substrate;

an epitaxial layer formed on the top of the substrate, wherein the epitaxial layer has at least one doped region;

a metal silicide layer formed on the epitaxial layer and covering a portion of the surface of the at least one doped region;

a second electrode layer formed on the metal silicide layer; and

a layer of dielectric material extending from the substrate to the second electrode layer, wherein the layer of dielectric material covers another portion of the surface of the at least one doped region and covers a portion of the surface of the second electrode layer.

2. The schottky diode device of claim 1 wherein the total thickness of the substrate and the epitaxial layer is substantially between 250 and 300 μιη and the thickness of the epitaxial layer is substantially between 3 and 10 μιη; the first electrode layer is a first multi-layer conductive structure comprising a titanium layer, a nickel layer and a silver layer, and the second electrode layer is a second multi-layer conductive structure comprising a titanium layer, a nickel layer and a silver layer; wherein the thickness of the metal silicide layer is substantially between 10 and 90 nm.

3. The schottky diode device of claim 1 wherein the thickness of the at least one doped region is substantially between 1 and 3 μm and the width of the at least one doped region is substantially between 70 and 90 μm; wherein a first portion of the upper surface of the at least one doped region is covered by the metal silicide layer, and a second portion of the upper surface and a side surface of the at least one doped region are covered by the dielectric material layer.

4. The schottky diode device of claim 1 wherein the dielectric material layer is a moisture barrier layer having polyimide or silicon gel and the minimum distance between the top of the dielectric material layer and the second electrode layer is substantially between 3 and 20 μm.

5. The schottky diode device of claim 1 wherein the dielectric material layer has a side cut surface, the second electrode layer has a shortest distance from the side cut surface of the dielectric material layer greater than 5 μιη, the metal silicide layer has a shortest distance from the side cut surface of the dielectric material layer greater than 5 μιη, the at least one doped region has a shortest distance from the side cut surface of the dielectric material layer substantially between 5 and 20 μιη, and the epitaxial layer has a shortest distance from the side cut surface of the dielectric material layer substantially between 5 and 20 μιη.

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