CN218971396U - Anti-interference signal processing circuit - Google Patents
Anti-interference signal processing circuit Download PDFInfo
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- CN218971396U CN218971396U CN202223498220.0U CN202223498220U CN218971396U CN 218971396 U CN218971396 U CN 218971396U CN 202223498220 U CN202223498220 U CN 202223498220U CN 218971396 U CN218971396 U CN 218971396U
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Abstract
The utility model discloses an anti-interference signal processing circuit, which comprises: the voltage dividing circuit unit is used for carrying out voltage reduction processing on the acquisition signals and outputting primary signals; the differential operational amplifier circuit unit is used for amplifying the primary signal and outputting an intermediate signal, and the input end of the differential operational amplifier circuit unit is connected with the output end of the voltage dividing circuit unit; the voltage stabilizing circuit unit is used for carrying out voltage stabilizing treatment on the intermediate signals and outputting final-stage signals, and the input end of the voltage stabilizing circuit unit is connected with the output end of the differential operational amplifier circuit unit and is used for solving the problems of overvoltage, instability and insufficient accuracy of the initially acquired speed regulating signals in the energy-saving pump and the brushless control water pump or fan products thereof.
Description
Technical Field
The utility model belongs to the technical field of electronic circuit information processing, and particularly relates to a signal processing circuit used in an energy-saving pump and a brushless control water pump or fan product thereof.
Background
In energy-saving pumps and brushless control water pumps or fans thereof, an automatic speed regulation technology is often adopted, when an initially collected speed regulation signal is a voltage signal, on one hand, the voltage range of the speed regulation signal is wider, the voltage value can be higher than an AD collected voltage value required by a chip, and on the other hand, an interference signal is introduced into the collected speed regulation signal due to high input impedance, and the stability and accuracy of the signal are damaged, so that the collected speed regulation signal needs to be processed urgently.
Disclosure of Invention
The utility model aims to solve the technical problems of overvoltage, instability and insufficient accuracy of an initially acquired speed regulation signal in an energy-saving pump and a brushless control water pump or fan product thereof.
In order to achieve the above object, the present utility model provides an anti-interference signal processing circuit, comprising:
the voltage dividing circuit unit is used for carrying out voltage reduction processing on the acquisition signals and outputting primary signals;
the differential operational amplifier circuit unit is used for amplifying the primary signal and outputting an intermediate signal, and the input end of the differential operational amplifier circuit unit is connected with the output end of the voltage dividing circuit unit;
the voltage stabilizing circuit unit is used for carrying out voltage stabilizing treatment on the intermediate signals and outputting final-stage signals, and the input end of the voltage stabilizing circuit unit is connected with the output end of the differential operational amplifier circuit unit.
The voltage-dividing circuit unit divides the collected signals, namely the speed-regulating signals which are initially collected, so that the signal voltage is reduced, the primary signals meeting the chip processing requirements are obtained, the differential operational amplifier circuit unit amplifies the primary signals, the interference of common-mode signals in the primary signals is restrained, amplified and stable intermediate signals are output, the voltage-stabilizing circuit unit further carries out voltage-stabilizing processing on the intermediate signals, the final-stage signals with proper, stable and accurate voltage values are obtained, and the signals are input into the chip as final speed-regulating signals.
Further, the voltage stabilizing circuit unit comprises a voltage following circuit unit, the input end of the voltage following circuit unit is the input end of the voltage stabilizing circuit unit, and the output end of the voltage following circuit unit is the output end of the voltage stabilizing circuit unit. The voltage follower circuit unit has voltage follower characteristics, namely, the same value of the intermediate signal and the final signal is ensured, and the load carrying capacity of the final signal is upgraded, so that the final signal cannot change greatly along with the change of a load, and the interference resistance of the circuit to a load terminal is improved.
Further, the voltage stabilizing circuit unit further comprises a filter circuit unit, one end of the filter circuit unit is connected with the output end of the voltage follower circuit unit, and the other end of the filter circuit unit is used for being grounded. The filter circuit unit filters and stabilizes the terminal signals, and improves the stability and the accuracy of the signals.
Further, the voltage stabilizing circuit unit further comprises an overvoltage protection circuit unit, one end of the overvoltage protection circuit unit is connected with the output end of the voltage follower circuit unit, and the other end of the overvoltage protection circuit unit is used for being connected with a voltage limiting power supply. When the final signal voltage is larger than the voltage of the voltage limiting power supply, the overvoltage protection circuit unit is conducted, so that voltage limiting overvoltage protection is realized, and the chip is prevented from being damaged.
Further, the device also comprises a collection signal filter circuit unit, wherein the collection signal filter circuit unit is connected with the voltage dividing circuit unit in parallel, and the collection signal filter circuit unit is formed by connecting at least one capacitor. The acquisition signal filtering circuit unit is used for adding a circuit to perform filtering and voltage stabilizing treatment on an initially acquired speed regulation signal, and the anti-interference performance of the circuit is added at the front end of the circuit.
Furthermore, the voltage dividing circuit unit is formed by connecting at least two resistors in series, and two ends of any one resistor are used as output ends of the voltage dividing circuit unit. The primary adopts resistance voltage division, so that the current drainage capability is provided for the acquisition of signal voltage, and common-mode interference signals of the speed regulation signals acquired initially can not be mixed, thereby increasing the primary anti-interference capability of the circuit, selecting reasonable resistance values, ensuring that the voltage of the divided primary signal has little change to the change of a load end, and improving the primary anti-interference capability of the circuit.
The beneficial effects of the utility model are as follows: the primary adopts resistance voltage division, so that the acquisition of signal voltage has current drainage capability, and interference signals of the speed regulation signals acquired initially can not be mixed, thereby increasing primary anti-interference capability of a circuit, further inhibiting common mode components of signals according to the characteristics of a differential operational amplifier circuit, further increasing middle-stage anti-interference capability of the circuit, and enabling the output final-stage signals not to be influenced by impedance of a later-stage circuit by adopting the characteristics of a voltage follower circuit.
Drawings
FIG. 1 is a block diagram of the present utility model;
FIG. 2 is a block diagram of a voltage regulator circuit unit according to the present utility model;
fig. 3 is a specific circuit diagram of the present utility model.
The above drawings are included to illustrate and describe specific embodiments of the present utility model.
Detailed Description
In the following, the embodiments of the present utility model will be described with reference to the drawings, where "connection" in the embodiments is an electrical connection or a circuit connection, and a circuit formed to implement a specific function is generally referred to as a functional circuit unit, and these functional circuit units are generally commonly used circuit modules, and the functional circuit unit in the present utility model may implement the function thereof by using a conventional circuit module, for example, the interior of the functional module is modified, and the present utility model will also be described in detail.
In order to solve the problems of overvoltage, instability and insufficient accuracy of an initially collected speed regulation signal in an energy-saving pump and a brushless control water pump or fan product thereof, the utility model adopts the specific scheme that as shown in fig. 1, 2 and 3, an anti-interference signal processing circuit comprises a voltage division circuit unit, a differential operational amplifier circuit unit and a voltage stabilizing circuit unit:
the voltage dividing circuit unit is used for carrying out voltage reduction processing on the acquisition signals and outputting primary signals; the input end of the voltage dividing circuit unit is connected with a speed regulating signal source, and the speed regulating signal is initially collected. The voltage dividing circuit unit is formed by connecting at least two resistors in series, and two ends of any one resistor are used as output ends of the voltage dividing circuit unit. As a specific embodiment, the voltage dividing circuit unit is formed by sequentially connecting a resistor R200, a resistor R201 and a resistor R202 in series, taking two ends of the resistor R201 as output ends of the voltage dividing circuit unit, outputting a divided primary signal to an input end of the differential operational amplifier circuit unit, and connecting a head end of the resistor R200 as an input end of the voltage dividing circuit unit with a speed regulating signal source VSP, wherein the tail end of the resistor R202 is grounded, in this embodiment, the resistance values of the resistor R200, the resistor R201 and the resistor R202 are respectively 10kΩ, 6.8kΩ and 10kΩ, and the package is 0603. Because the initially collected speed regulating signal is the voltage applied between the VSP and the GND, if the voltage division mode is not adopted, the common mode interference signal loaded between the VSP and the ground or between the GND and the ground can flow into the differential operational amplifier circuit unit, if the voltage division mode is adopted, the detected signal component is the signal component formed by the voltage division of the signal voltage, the component of the common mode interference signal can be reduced, and thus the anti-interference performance of the circuit is enhanced; the resistance value of the divider resistor mainly meets the load capacity of signals and the impedance requirement of the matched post-stage operational amplifier. If the resistor is very small, distortion is generated on an initially acquired speed regulation signal, signal integrity sampling is not facilitated, if the resistor is very large, requirements on the input resistance of a subsequent operational amplifier are improved, a reasonable resistance value is selected, the change of the voltage-divided primary signal voltage caused by the change of a load end is not great, and the primary anti-interference capability of a circuit is improved.
The differential operational amplifier circuit unit is used for amplifying the primary signal and outputting an intermediate signal, and the input end of the differential operational amplifier circuit unit is connected with the output end of the voltage dividing circuit unit; in the specific embodiment of the utility model, the differential operational amplifier circuit unit is composed of an operational amplifier U20A, a resistor R210, a resistor R211, a resistor R212 and a resistor R213, wherein the positive input end of the operational amplifier U20A is simultaneously connected with one end of the resistor R212 and one end of the resistor R213, the other end of the resistor R212 is connected with the tail end of the resistor R200, and the other end of the resistor R213 is grounded. The negative input end of the operational amplifier U20A is connected with one end of a resistor R210 and one end of a resistor R211 at the same time, the other end of the resistor R210 is connected with the head end of a resistor R202, the other end of the resistor R211 is connected with the output end of the operational amplifier U20A, and a 3.3V power supply is used for providing power for the operational amplifier U20A after the voltage is stabilized through the filtering of a capacitor C100. The operational amplifier U20A is packaged as SOP-8 by using an operational amplifier with the model SD 06; resistor R210, resistor R211, resistor R212, and resistor R213 use 100kΩ resistors, packaged as 0603, and C100 uses 100nF capacitors, packaged as 0603. The output terminal of the operational amplifier U20A is connected to the input terminal of the voltage stabilizing circuit unit.
The voltage stabilizing circuit unit is used for carrying out voltage stabilizing treatment on the intermediate signals and outputting final-stage signals, and the input end of the voltage stabilizing circuit unit is connected with the output end of the differential operational amplifier circuit unit. The voltage stabilizing circuit unit comprises a voltage following circuit unit, wherein the input end of the voltage following circuit unit is the input end of the voltage stabilizing circuit unit, and the output end of the voltage following circuit unit is the output end of the voltage stabilizing circuit unit. The voltage follower circuit unit has voltage follower characteristics, namely, the same value of the intermediate signal and the final signal is ensured, and the load carrying capacity of the final signal is upgraded, so that the final signal cannot change greatly along with the change of a load, and the interference resistance of the circuit to a load terminal is improved. The voltage follower circuit unit is realized by an operational amplifier. In a specific embodiment of the present utility model, the voltage follower circuit unit includes a resistor R214, a resistor R39, and an operational amplifier U20B, where an input terminal of the positive electrode of the operational amplifier U20B is connected to one end of the resistor R214, an output terminal of the operational amplifier U20A is connected to the other end of the resistor R414, an input terminal of the negative electrode of the operational amplifier U20B is connected to an output terminal of the operational amplifier U20B, an output terminal of the operational amplifier U20B is connected to one end of the resistor R39, and the other end of the resistor R39 is used as an output terminal of the voltage stabilizing circuit unit to be connected to the processing chip. The operational amplifier U20B uses an operational amplifier with the model SD06, the resistor R214 uses a resistor with the size of 2KΩ, and the package is 0603; resistor R39 is packaged as 0603 using a resistor of 1kΩ.
In order to further improve the stability and accuracy of the signal. The voltage stabilizing circuit unit further comprises a filter circuit unit, one end of the filter circuit unit is connected with the output end of the voltage following circuit unit, and the other end of the filter circuit unit is used for being grounded. The filter circuit unit filters and stabilizes the end signal. In this embodiment, the filter circuit unit adopts a capacitor C27 for filtering, one end of the capacitor C27 is connected to the output end of the voltage stabilizing circuit unit, and the other end of the capacitor C27 is grounded. The capacitor C27 uses a 100nF capacitor, packaged as 0603.
Preferably, the voltage stabilizing circuit unit further comprises an overvoltage protection circuit unit, one end of the overvoltage protection circuit unit is connected with the output end of the voltage follower circuit unit, and the other end of the overvoltage protection circuit unit is used for being connected with a voltage limiting power supply. When the final signal voltage is larger than the voltage of the voltage limiting power supply, the overvoltage protection circuit unit is conducted, so that voltage limiting overvoltage protection is realized, and the chip is prevented from being damaged. In this embodiment, the overvoltage protection circuit unit is implemented by using an overvoltage protection diode D10, where the overvoltage protection diode D10 is a diode of model LL4148, and is packaged as LL-34. The anode of the overvoltage protection diode D10 is connected with the output end of the voltage stabilizing circuit unit, and the cathode of the overvoltage protection diode D is connected with a 3.3V power supply.
On the basis of the scheme, the signal processing circuit further comprises a collected signal filtering circuit unit, and the collected signal filtering circuit unit is connected with the voltage dividing circuit unit in parallel. Preferably, the acquisition signal filtering circuit unit is formed by connecting at least one capacitor. In the embodiment of the utility model, the signal collecting and filtering circuit unit is composed of a capacitor CC10, one end of the capacitor CC10 is connected with the head end of the resistor R200, and the other end of the capacitor CC10 is connected with the tail end of the resistor R202 and grounded. The capacitor CC10 employs a capacitor using 100 nF.
The working principle and the beneficial effects of the utility model are as follows: the voltage-dividing circuit unit divides the collected signals, namely the speed-regulating signals which are initially collected, so that the signal voltage is reduced, the primary signals meeting the chip processing requirements are obtained, the differential operational amplifier circuit unit amplifies the primary signals, the interference of common-mode signals in the primary signals is restrained, amplified and stable intermediate signals are output, the voltage-stabilizing circuit unit further carries out voltage-stabilizing processing on the intermediate signals, the final-stage signals with proper, stable and accurate voltage values are obtained, and the signals are input into the processing chip as final speed-regulating signals.
The anti-interference signal processing circuit provided by the utility model is described in detail above. Any obvious modifications thereof, which would be apparent to those skilled in the art without departing from the true spirit of the present utility model, would fall within the scope of the present patent claims.
Claims (9)
1. An anti-interference signal processing circuit, comprising:
the voltage dividing circuit unit is used for carrying out voltage reduction processing on the acquisition signals and outputting primary signals;
the differential operational amplifier circuit unit is used for amplifying the primary signal and outputting an intermediate signal, and the input end of the differential operational amplifier circuit unit is connected with the output end of the voltage dividing circuit unit;
the voltage stabilizing circuit unit is used for carrying out voltage stabilizing treatment on the intermediate signals and outputting final-stage signals, and the input end of the voltage stabilizing circuit unit is connected with the output end of the differential operational amplifier circuit unit.
2. The anti-interference signal processing circuit according to claim 1, wherein the voltage stabilizing circuit unit comprises a voltage follower circuit unit, an input terminal of the voltage follower circuit unit is an input terminal of the voltage stabilizing circuit unit, and an output terminal of the voltage follower circuit unit is an output terminal of the voltage stabilizing circuit unit.
3. The anti-interference signal processing circuit according to claim 2, wherein the voltage stabilizing circuit unit further comprises a filter circuit unit, one end of the filter circuit unit is connected with the output end of the voltage follower circuit unit, and the other end of the filter circuit unit is used for grounding.
4. A signal processing circuit according to claim 3, wherein the voltage stabilizing circuit unit further comprises an overvoltage protection circuit unit, one end of the overvoltage protection circuit unit is connected to the output end of the voltage follower circuit unit, and the other end of the overvoltage protection circuit unit is used for connecting to a voltage limiting power supply.
5. The anti-interference signal processing circuit according to claim 4, wherein the filter circuit unit is implemented by capacitive filtering, the overvoltage protection circuit unit is implemented by an overvoltage protection diode, and the voltage follower circuit unit is implemented by an operational amplifier.
6. The anti-interference signal processing circuit according to claim 1, further comprising a collection signal filter circuit unit connected in parallel with the voltage divider circuit unit.
7. The anti-interference signal processing circuit according to claim 6, wherein the acquisition signal filter circuit unit is formed by connecting at least one capacitor.
8. The anti-interference signal processing circuit according to any one of claims 1 to 7, wherein the voltage dividing circuit unit is formed by connecting at least two resistors in series, and two ends of any one resistor are adopted as output ends of the voltage dividing circuit unit.
9. The anti-interference signal processing circuit according to any one of claims 1 to 7, wherein the differential operational amplifier circuit unit is implemented using an operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223498220.0U CN218971396U (en) | 2022-12-27 | 2022-12-27 | Anti-interference signal processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223498220.0U CN218971396U (en) | 2022-12-27 | 2022-12-27 | Anti-interference signal processing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218971396U true CN218971396U (en) | 2023-05-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202223498220.0U Active CN218971396U (en) | 2022-12-27 | 2022-12-27 | Anti-interference signal processing circuit |
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| Country | Link |
|---|---|
| CN (1) | CN218971396U (en) |
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- 2022-12-27 CN CN202223498220.0U patent/CN218971396U/en active Active
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