CN218298801U

CN218298801U - Direct current converter and conduction time state switching control circuit, power management chip and wearable Bluetooth device thereof

Info

Publication number: CN218298801U
Application number: CN202220863766.2U
Authority: CN
Inventors: 伍滔
Original assignee: Shenzhen Siyuan Semiconductor Co ltd
Current assignee: Shenzhen Siyuan Semiconductor Co ltd
Priority date: 2022-04-14
Filing date: 2022-04-14
Publication date: 2023-01-13
Anticipated expiration: 2032-04-14

Abstract

The utility model discloses a direct current converter and on-time state switching control circuit, power management chip, wearable bluetooth equipment thereof, timing module includes timing capacitor, one end of timing capacitor is the high potential end of timing module, the other end of timing capacitor is grounded; the current generation module is used for inputting a timing current to the timing capacitor so as to enable a high potential end to obtain a timing voltage; the differential amplification module is used for comparing the timing voltage with a reference voltage provided by a reference voltage end to obtain differential amplification current; the integration module integrates the differential amplification current in a time window with a preset size in each timing period to obtain an integration voltage and outputs the integration voltage to the variable resistance transistor, and the size of the time window is a plurality of fractions of the timing period. And the variable resistance transistor is respectively corresponding to different on-time states when being switched on and switched off, so that one on-time state can be gradually switched to the other on-time state, and the output oscillation of the rapid transient response direct current converter is reduced.

Description

Direct current converter and conduction time state switching control circuit, power management chip and wearable Bluetooth device thereof

Technical Field

The utility model relates to a direct current conversion technology field, concretely relates to direct current converter and on-time state switching control circuit, chip, equipment thereof.

Background

The ACOT BUCK dc (adaptive constant on-time BUCK dc converter) is applied to various power supply systems requiring fast transient response as a BUCK type voltage-stabilizing dc converter having fast transient response, and the power supply provided by the DCDC is often required to have smaller output voltage ripple in these power supply systems, so as to be beneficial to the stability of the next application: such as providing power to the bluetooth module.

In order to solve the problem of adaptation of output voltage ripple and working frequency, the working frequency of the direct current converter is switched by connecting two resistors with different resistance values according to the weight of a load, and thus the ripple under the corresponding load state is reduced. When the circuit is in a heavy load state, a small resistor is connected, so that the working frequency is improved; when in a light load state, a large resistor is connected, thereby reducing the working frequency. Through the two resistors with different resistance values, on one hand, the working frequency of the direct current converter is suitable for the current load, and on the other hand, the output ripple under the current load is also reduced.

However, although the equivalent resistance time-sharing access circuit controlling two resistance values can respectively adjust the operating frequency and reduce the output ripple based on two load states, when the dc converter switches back and forth between the two load states, output oscillation which is difficult to eliminate occurs, which brings adverse effects to the stability of the next application, especially when the bluetooth module using radio frequency communication is used, serious interference is brought to the radio frequency communication when the low power consumption mode and the high power consumption mode are switched.

Therefore, how to reduce the output oscillation when controlling the dc converter to switch between two load states becomes an urgent technical problem to be solved.

SUMMERY OF THE UTILITY MODEL

Based on the above current situation, the main objective of the present invention is to provide a switching control circuit for on-time state of synchronous tube and a dc converter, so as to reduce output oscillation when controlling the dc converter to switch between two load states.

In order to achieve the above object, the utility model adopts the following technical scheme:

in a first aspect, the embodiment of the utility model discloses fast transient response dc converter's on-time state switching control circuit for in controlling fast transient response's the step-down type steady voltage dc converter synchronizing tube switch gradually to another kind of on-time state from an on-time state, on-time state switching control circuit includes: the device comprises a current generation module, a timing module, a differential amplification module and an integration module;

the timing module comprises a timing capacitor, one end of the timing capacitor is a high potential end of the timing module, and the other end of the timing capacitor is grounded;

the input end of the current generation module is connected to the input voltage end of the direct current converter, and the timing current output end of the current generation module is connected to the high potential end and used for inputting timing current to the timing capacitor so that the high potential end obtains timing voltage;

the first input end and the second input end of the differential amplification module are respectively connected to one and the other of the high potential end and the reference voltage end so as to compare the timing voltage with the reference voltage provided by the reference voltage end to obtain differential amplification current; the output end of the differential amplification module is connected to the input end of the integration module;

the output end of the integration module is connected to a control electrode of a variable resistance transistor in the direct current converter, the integration module integrates the differential amplification current in a time window with a preset size in each timing period to obtain an integration voltage and outputs the integration voltage to the variable resistance transistor so as to control the variable resistance transistor to be in a conducting state or a switching-off state, and therefore the synchronous tube is in different conducting time states; the size of the time window is a fraction of the timing period.

Optionally, the timing module further comprises: a discharge tube;

the first pole of the discharge tube is connected with the high potential end, and the second pole of the discharge tube is grounded; the control electrode of the discharge tube is used for receiving a timing reset signal;

when the discharge tube receives a timing reset signal, conducting a first pole and a second pole of the discharge tube to discharge a timing capacitor; the timing reset signal is close to the end time of a time window with a preset size, and the duration of the timing reset signal is a plurality of fractions of a timing period.

Optionally, the differential amplifying module comprises: the device comprises a first differential N tube and a second differential N tube; the first pole of the first differential N tube and the first pole of the second differential N tube are connected to the input voltage end through respective P-type transistors; the first electrode of the second differential N tube is the output end of the differential amplification unit;

the second pole of the first differential N tube and the second pole of the second differential N tube are connected and grounded;

the control electrode of the first differential N tube and the control electrode of the second differential N tube are respectively a first input end and a second input end of the differential amplification unit.

Optionally, the first input terminal is connected to a high potential terminal; the second input terminal is connected to the reference voltage terminal.

Optionally, the first input terminal is connected to a reference voltage terminal; the second input terminal is connected to a high potential terminal.

Optionally, the current generation module comprises: a first current transistor and a second current transistor, wherein:

a first pole of the first current transistor and a first pole of the second current transistor are connected to an input voltage end of the direct current converter;

the control electrode of the first current transistor is connected with the control electrode of the second current transistor;

the control electrode of the first current transistor is connected with the second electrode of the second current transistor of the first current transistor and is connected to the reference voltage end;

the second pole of the second current transistor is a timing current output end of the current generation module.

Optionally, the current generation module further comprises: a current source and a switch tube;

the input end of the current source is connected to the input voltage end of the direct current converter;

the output end of the current source is connected to the control electrode of the switching tube;

the first pole of the switch tube is connected to the second pole of the first current transistor, and the second pole of the switch tube is connected to the reference voltage end.

Optionally, the apparatus further comprises a reference module, wherein the reference module comprises:

and a control electrode of the reference transistor is connected to the reference voltage end, a first electrode of the reference transistor is connected to the output end of the current source, and a second electrode of the reference transistor is grounded.

Optionally, the width-to-length ratio of the reference transistor to the differential N transistor in the differential amplification module is equal.

Optionally, the reference module further comprises: and a reference resistor connected between the reference voltage terminal and ground.

Optionally, the integration module comprises: an integrating capacitor and a transmission gate;

the input end of the transmission gate is connected to the output end of the differential amplification module, and the output end of the transmission gate is connected to one end of the integrating capacitor; the other end of the integrating capacitor is grounded;

the transmission gate transmits the differential amplification current to one end of the integration capacitor in a preset time window so as to enable one end of the integration capacitor to obtain an integration voltage.

In a second aspect, an embodiment of the present invention discloses a dc converter of a fast transient response dc converter, including:

the on-time state switching control circuit of the fast transient response dc converter disclosed in the first aspect is described above.

The embodiment of the utility model discloses power management chip, include:

In a fourth aspect, the embodiment of the utility model discloses a wearable bluetooth device, include:

a Bluetooth module;

the second aspect discloses a fast transient response dc converter for supplying power to a bluetooth module.

[ PROBLEMS ] the present invention

According to the embodiment of the utility model discloses a quick transient response direct current converter and on-time state switching control circuit thereof, the timing module includes the timing capacitor, one end of the timing capacitor is the high potential end of the timing module, and the other end of the timing capacitor is grounded; the current generation module is used for inputting a timing current to the timing capacitor so as to enable a high potential end to obtain a timing voltage; the differential amplification module is used for comparing the timing voltage with a reference voltage provided by a reference voltage end to obtain differential amplification current; the integration module integrates the differential amplification current in a time window with a preset size in each timing period to obtain an integration voltage and outputs the integration voltage to the variable resistance transistor, and the size of the time window is a plurality of fractions of the timing period. Therefore, the on-state and the off-state of the variable resistance transistor are gradually changed, and the variable resistance transistor is in the on-state and the off-state which respectively correspond to different on-time states, so that one on-time state can be gradually switched to the other on-time state, and the output oscillation of the rapid transient response direct current converter is reduced.

Other advantages of the present invention will be described in the detailed description, and those skilled in the art can understand the technical advantages brought by the technical features and technical solutions through the descriptions of the technical features and the technical solutions.

Drawings

Embodiments of the present invention will be described below with reference to the accompanying drawings. In the figure:

FIG. 1 is a schematic diagram of the structure of an ACOT BUCK DCDC circuit;

FIG. 2 is a schematic diagram of a structure of a conduction time control circuit;

fig. 3 is a switching control circuit of on-time state of a fast transient response dc converter according to the present embodiment;

FIG. 4 is a schematic diagram illustrating an exemplary embodiment of adjusting the turn-on time of the sync pipe;

FIG. 5 is a schematic diagram illustrating another example of adjusting the conduction time of the sync pipe disclosed in the present embodiment;

fig. 6 is a schematic diagram of an on-time control timing sequence disclosed in the present embodiment.

Detailed Description

The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in order to avoid obscuring the spirit of the present invention, well-known methods, procedures, flows, and components have not been described in detail.

Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".

In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.

In this application, if it is not specifically stated that the first electrode (or the second electrode) of the transistor is a source (or a drain), the correspondence relationship between the first electrode and the second electrode and the source and the drain may be interchanged.

Please refer to fig. 1, which is a schematic diagram illustrating a schematic structure of an ACOT BUCK DCDC circuit, in which the fast transient response dc converter is a dc converter with a constant on-time of a synchronous transistor MP1, that is, an adaptive constant on-time BUCK dc converter. The on-time control portion of fig. 1 is to implement a fixed period, and the on-time control portion operates to generate a synchronous tube on-time related to the output voltage VOUT and the input voltage VIN. The on-time ton of the synchronous tube MP1 is mainly calculated by the input voltage VIN and the set output voltage VOUT, and according to the relationship of the duty ratio, the fixed period can be determined:

ton＝VOUT/VIN*T

wherein VOUT is set output voltage; VIN is the input voltage, and T is the set period.

It should be noted that, in the following, the focus is on the conduction time control portion of the synchronous tube MP1 in fig. 1, and the rest of the reference numerals in fig. 1 that are not described are not repeated herein, and the functions of each device module, such as the ripple compensation module, the transconductance amplifier EA and the reference voltage Vref thereof, the loop compensation capacitors Cea1 and Cea, the feedback signal FB, etc., may be determined by looking up the relevant data; the output voltage of the synchronizing tube MP1 may also be output after passing through the LRC circuit, and the feedback signal FB may also be obtained by dividing the voltage by the voltage dividing resistors R1 and R2.

Referring to fig. 2, a schematic diagram of a conventional on-time control circuit structure is shown, which mainly includes an operational amplifier OP, a comparator, an N-type transistor N1, an N-type transistor N2, and a control signal hson _ N thereof, P-type transistors P1 and P2, voltage dividing resistors R1 and R2 (different from the voltage dividing resistor of fig. 1), a resistor R0, a capacitor C1, and the specific connection relationship is shown in fig. 2 and will not be described herein again. The on-time control circuit shown in fig. 2 operates as follows:

the P-type transistors P1 and P2 form a current mirror, when the synchronous tube is turned on, the control signal hson _ N of the N-type transistor N2 is at a low level, a charging current I1 related to the input voltage VIN is generated to charge the capacitor C1, when the voltage V1 of the capacitor C1 is equal to Vout, a turn-off signal ton _ rst is generated to turn off the synchronous tube, that is, the on-time ton of the synchronous tube is generated, as follows:

therefore, the required fixed period T can be obtained by adjusting the VIN partial pressure ratio, the ratio of R1 to R2, the value of R0, the ratio of the width-length ratio (w 1/l 1) of P1 to the width-length ratio (w 2/l 2) of MP 2.

In the fixed period to and the fixed (output capacitance C of external components and parts, output inductance L) condition of external components and parts, because the electric capacity that adopts now is ceramic paster electric capacity, the ESR is very little, neglects basically, and its output ripple is under continuous mode:

wherein Ipeak is the peak-to-peak current, T is the period, C is the output capacitance, L is the output inductance, and ton is the on-time of the synchronous tube.

It can be seen that when the input voltage and the output voltage are determined, the output ripple in the continuous mode is fixed, so that when the application condition is fixed, i.e. the external component and the period is determined, the output ripple in the continuous mode is fixed and is independent of the output load.

When the output load is relatively small, the DCDC enters a discontinuous mode, and the switching period of the DCDC is as follows:

wherein T is _{Is not} For the period in the discontinuous mode, io is the output load current

The output ripple at this time is

Where Io is the output load current.

As can be seen from the above formula, when the input voltage and the output voltage are determined, under the condition that the application condition is fixed, that is, under the condition that the external devices (the capacitor C and the inductor L) are fixed, the period of the DCDC is not fixed any more in the discontinuous mode, so the ripple under the light load is mainly determined by the on-time ton and the load current Io of the synchronous tube, when the load current is smaller and smaller, the switching period is larger and larger, and the ripple is larger and larger.

The ripple variation is large at switching and the switching frequency of the DCDC also varies greatly, which will cause the DCDC to switch back and forth between different loads causing oscillations at different loads.

In order to reduce the output oscillation when control direct current converter switches between two kinds of load condition the embodiment of the utility model discloses a quick transient response direct current converter's on-time state switching control circuit for synchronous pipe MP1 switches to another kind of on-time state from an on-time state gradually among control quick transient response's the step-down type steady voltage direct current converter, and direct current converter includes: the current mirror module is used for controlling the conduction time of the synchronous tube by generating a charging current I1; in this embodiment, the equivalent resistance of the variable resistance module is variable, and the charging current I1 generated by the current mirror module changes with the size of the equivalent resistance, so that the on-time of the synchronous tube is related to the size of the equivalent resistance.

Referring to fig. 3, an on-time state switching control circuit of a fast transient response dc converter disclosed in the present embodiment includes: current generation module 1, timing module 2, difference amplification module 3 and integration module 4, wherein:

the timing module 2 comprises a timing capacitor Ct, one end of the timing capacitor Ct is a high potential end Q1 of the timing module 2, and the other end of the timing capacitor Ct is grounded. In this embodiment, when a current flows into the timing capacitor Ct, the voltage of one end (i.e., the high potential end Q1) of the timing capacitor Ct to ground rises, i.e., the timing voltage Vt is obtained. Therefore, the timing voltage Vt can be obtained only by charging the timing capacitor Ct with a predetermined current in each timing cycle.

The input end of the current generation module 1 is connected to the input voltage end of the dc converter, and the timing current output end of the current generation module 1 is connected to the high potential end Q1 for inputting the timing current to the timing capacitor Ct, so that the high potential end Q1 obtains the timing voltage Vt. In this embodiment, the timing current is a current flowing into the timing capacitor Ct. In a specific embodiment, an input terminal of the current generation module 1 is connected to an input voltage terminal of the dc converter, and is used for inputting an input voltage VIN of the dc converter; the current generation module 1 may generate the reference current It after receiving the input voltage VIN, and generate a timing current based on the reference current It (for example, the timing current is obtained by mirroring the reference current It through a mirror current source), where the timing current is equal to the reference current It. The timing current is output to the high potential end Q1 of the timing module 2 through the timing current output end.

The first input terminal and the second input terminal of the differential amplifying module 3 are respectively connected to one and the other of the high potential terminal Q1 and the reference voltage terminal Q2 for comparing the timing voltage Vt with the reference voltage Vref _ t provided by the reference voltage terminal Q2 to obtain a differential amplifying current. In one embodiment, it may be that a first input terminal of the differential amplification block 3 is connected to the high potential terminal Q1, and a second input terminal of the differential amplification block 3 is connected to the reference voltage terminal Q2; in another embodiment, it is also possible that the first input terminal of the differential amplification block 3 is connected to the reference voltage terminal Q2, and the second input terminal of the differential amplification block 3 is connected to the high potential terminal Q1, specifically, see the following description.

The output end of the differential amplification module 3 is connected to the input end of the integration module 4; the output end of the integrating module 4 is connected to the control electrode of the variable resistance transistor M0 in the dc converter, wherein the synchronous tube corresponds to different on-time states when the variable resistance transistor M0 is turned on and off, respectively. That is, when the variable resistance transistor M0 is in the on state, the synchronous transistor MP1 in the fast transient response dc converter is in one on-time state, and when the variable resistance transistor M0 is in the off state, the synchronous transistor MP1 in the fast transient response dc converter is in the other on-time state. Specifically, according to the load mode of the fast transient response dc converter, different equivalent resistors R0 may be configured for the current mirror (formed by the transistors P1 and P2) shown in fig. 2, when the dc converter operates in a load mode, the equivalent resistor R0 is configured to be a resistance value, and at this time, the synchronous transistor MP1 is in a conducting time; when the dc converter operates in another load mode, the equivalent resistor R0 is configured to have another resistance value, and at this time, the sync pipe MP1 has another on-time.

In this embodiment, the integration module 4 integrates the differential amplification current in a time window t1 with a preset size in each timing period to obtain an integration voltage Vset, and outputs the integration voltage Vset to the variable resistance transistor M0 to control the variable resistance transistor M0 to be in a conducting or a turning-off state, so that the synchronous transistor is in different conducting time states. In this embodiment, the size of the time window t1 is a fraction of the timing period, which may be an integer or a decimal larger than 3, and since the size of the time window is a fraction of the timing period, the value of the integration voltage Vset is gradually changed, so that the resistance value of the controlled variable resistance transistor M0 is gradually changed between the on state and the off state, and the size of the equivalent resistor in the dc converter is gradually changed, thereby gradually switching the on-state of the synchronous transistor, that is, gradually changing the on-state time.

Referring to fig. 3, in an alternative embodiment, the timing module 2 further includes: a discharge tube N43; a first pole of the discharge tube N43 is connected with the high potential end Q1, and a second pole of the discharge tube N43 is grounded; the control electrode of the discharge tube N43 is used to receive the timing reset signal en _ time.

When the discharge tube N43 receives the timing reset signal en _ time, the first pole and the second pole of the discharge tube N43 are conducted to discharge the timing capacitor Ct; conversely, the first and second poles of the discharge tube N43 are disconnected, so that the timing capacitor Ct operates in a charged state. In this embodiment, the so-called timing reset signal en _ time may be provided by a signal generating circuit, such as a pulse generator. The timing reset signal en _ time is close to the end time of the time window with the preset size, and the duration of the timing reset signal en _ time is a part of the timing period. In this embodiment, the plurality of the timing reset signals may be integers or fractions larger than 3, and the duration of the timing reset signal en _ time is only required to be capable of discharging the time setting capacitor Ct quickly. In this embodiment, two adjacent timing reset signals en _ time are a timing period.

Referring to fig. 3, in an alternative embodiment, the differential amplifying module 3 includes: a first differential N-transistor N44 and a second differential N-transistor N45, wherein:

a first pole of the first differential N-tube N44 and a first pole of the second differential N-tube N45 are connected to an input voltage end through respective P-type transistors; a first electrode of the second differential N-tube N45 is an output end of the differential amplifying unit 43; the second pole of the first differential N-tube N44 and the second pole of the second differential N-tube N45 are connected and grounded; a control electrode of the first differential N-transistor N44 and a control electrode of the second differential N-transistor N45 are a first input end and a second input end of the differential amplifying unit 43, respectively. As an example, a first pole of the P-type transistor P43 and a first pole of the P-type transistor P44 are connected to the input voltage terminal of the dc converter; a second pole of the P-type transistor P43 is connected to a first pole of the first differential N-transistor N44, and a second pole of the P-type transistor P44 is connected to a first pole of the second differential N-transistor N45; the control electrode of the P-type transistor P43 is connected to the second electrode of the P-type transistor P43, and the control electrode of the P-type transistor P43 is connected to the control electrode of the P-type transistor P44.

Referring to fig. 3, in an embodiment, when the variable resistance transistor M0 is an N-type transistor, the first input terminal is connected to the high potential terminal Q1 of the timing module 2 for receiving the timing voltage Vt; the second input terminal is connected to the reference voltage terminal Q2 for receiving the reference voltage Vref _ t.

In another embodiment (not shown), when the variable resistance transistor M0 is a P-type transistor, the first input terminal is connected to the reference voltage terminal Q2 for receiving the reference voltage Vref _ t; the second input terminal is connected to the high potential terminal Q1 of the timing block 2 for receiving the timing voltage Vt.

Referring to fig. 3, in an embodiment, the current generation module 1 includes: a first current transistor P41 and a second current transistor P42, wherein:

a first pole of the first current transistor P41 and a first pole of the second current transistor P42 are connected to the input voltage VIN terminal of the dc converter; the control electrode of the first current transistor P41 is connected with the control electrode of the second current transistor P42; the control electrode of the first current transistor P41 and the first current transistor P41

A second pole of the second current transistor P42 is connected to the reference voltage terminal Q2; the second pole of the second current transistor P42 is the timing current output of the current generating module 1. Referring to fig. 3, the current flowing through the first pole and the second pole of the first current transistor P41 is the reference current It; the second current transistor P42 mirrors the reference current It to obtain a timing current and transmits It to the high potential terminal Q1 of the timing module 2. In this embodiment, since the first current transistor P41 and the second current transistor P42 are in a mirror relationship, the second current transistor P42 can mirror the reference current It flowing through the first current transistor P41 to obtain the timing current.

Referring to fig. 3, in an embodiment, the current generation module 1 further includes: a current source I0 and a switch tube N42; the input end of the current source I0 is connected to the input voltage end of the direct current converter; the output end of the current source I0 is connected to the control electrode of the switch tube N42; a first pole of the switch N42 is connected to a second pole of the first current transistor P41, and a second pole of the switch N42 is connected to the reference voltage terminal Q2. Thus, the first current transistor P41 can be connected to or disconnected from the reference voltage terminal Q2 through the switching transistor N42, so that the current supplied to the reference voltage terminal Q2 can be controlled.

Referring to FIG. 3, in an embodimentThe on-time state switching control circuit of the fast transient response dc converter further includes a reference module 5, where the reference module 5 includes: a reference transistor N41, a control electrode of the reference transistor N41 being connected to the reference voltage terminal Q2, the reference transistor in this embodiment having a gate-source voltage (voltage between the control electrode and the second electrode) of the reference transistor N41 as a reference voltage, that is, vref _ t = Vgs _N41 Wherein Vgs is _N41 Is the gate-source voltage of the reference transistor N41. A first pole of N41 is connected to the output of current source I0 and a second pole of reference transistor N41 is connected to ground.

In an alternative embodiment, the reference transistor N41 is equal to the differential N transistor width-to-length ratio in the differential amplification block 3. That is, the width-to-length ratios of the reference transistor N41, the first differential N-transistor N44, and the second differential N-transistor N45 are equal. When the tail current I2=2I0 is set, vref _ t = Vt = Vgs at loop balance of the differential amplification block _N41 Wherein Vgs is _N41 Is the gate-source voltage of the reference transistor N41. Thereby, setting of the control period can be facilitated.

Referring to fig. 3, in an embodiment, the reference module 5 further includes: the reference resistor Rt is connected between the reference voltage terminal Q2 and ground. When the tail current I2=2I0 is set, in terms of the reference current It = Vgs _N41 As can be seen from fig. 3, the cycle of loop balancing is: vt = It T/Ct, i.e. T = Rt Ct, where T is the control period of the on-time control circuit. Thereby, setting of the control period can be facilitated.

Referring to fig. 3, in an embodiment, the integrating module 4 includes: an integrating capacitor C1 and a transmission gate;

the input end of the transmission gate is connected to the output end of the differential amplification module 3, and the output end of the transmission gate is connected to one end of the integrating capacitor C1; the other end of the integrating capacitor C1 is grounded; the transmission gate transmits the differential amplification current to one end of the integration capacitor C1 within a preset time window t1, so that one end of the integration capacitor C1 obtains an integration voltage Vset. In a specific embodiment, the transmission gate may be formed by a P-type transistor and an N-type transistor, specifically, a first pole of the P-type transistor is connected in parallel with a first pole of the N-type transistor, and is an input terminal of the transmission gate; the second pole of the P-type transistor is connected with the second pole of the N-type transistor in parallel and is the output end of the transmission gate; the control electrode of the P-type transistor receives a first transmission control signal op _ N, the control electrode of the N-type transistor receives a second transmission control signal op _ d, and the first transmission control signal op _ N and the second transmission control signal op _ d are opposite signals.

In this embodiment, the transmission gate 44 turns on the transmission differential amplification result by the width of the preset time window t1 to charge or discharge the output capacitor C1 within the preset time window t1, so that one end of the output capacitor C1 changes the magnitude of the control voltage Vset in a small step, thereby completing the control of the period control voltage Vset.

To facilitate the understanding of the principle that the varistor transistor M0 regulates the on-time ton of the synchronous tube, the person skilled in the art:

in an embodiment, please refer to fig. 4, which is an exemplary schematic diagram illustrating an exemplary principle of adjusting the turn-on time of the synchronous tube disclosed in this embodiment, wherein the turn-on time of the synchronous tube is adjusted by mainly changing an equivalent resistor R0 (shown in fig. 2), specifically, the equivalent resistor R0 is composed of a variable resistance transistor M0, a first resistor R10 and a second resistor R11, and a first pole of the variable resistance transistor M0 is connected to one end of the first resistor R10 to obtain an end point A1 of the equivalent resistor R0; the second pole of the variable resistance transistor M0 is connected with one end of a second resistor R11; the other end of the second resistor R11 is connected with the other end of the first resistor R10 to obtain an end point A2 of the equivalent resistor R0; the control electrode of the variable resistance transistor M0 is connected to the output end of the integrating module 4, and receives the integration voltage Vset, and the variable resistance transistor M0 gradually changes when being in the amplifying region, so as to gradually change the resistance of the variable resistance transistor M0. Accordingly, the resistance of the equivalent resistor R0 is R0= (R11 + Rx)// R10, where Rx is the resistance of the variable resistance transistor M0 at the integration voltage Vset. According to the formula 1 and the formula 2, when the resistance Rx of the variable resistance transistor M0 gradually changes, the on-time ton and the switching period T of the synchronous tube also gradually change.

In another embodiment, please refer to fig. 5, which is a schematic diagram illustrating another exemplary principle for adjusting the on-time of the synchronous tube disclosed in this embodiment, and compared to fig. 2, a branch is added to the current mirror (formed by P-type transistors P1 and P2), specifically, a first pole of a P-type transistor P3 is connected to a first pole of the P-type transistor P1 and a first pole of a P-type transistor P2, and is used for receiving the input voltage VIN of the dc converter; the control electrode of the P-type transistor P3 is connected with the control electrodes of the P-type transistors P1 and P2; the second pole of the P-type transistor P3 is connected to the first pole of the varistor transistor M0, the second pole of the varistor transistor M0 is connected to the high potential end of the capacitor C0, the control pole of the varistor transistor M0 is connected to the output end of the integrating module 4, receives the integrating voltage Vset, and when the varistor transistor M0 is in the amplifying region and gradually changes, the resistance of the varistor transistor M0 is gradually changed. The conduction condition of the P-type transistor P3 is affected by the transistor M0, and specifically, when the transistor M0 operates in the variable resistance region, the P-type transistor P3 also operates in the variable resistance region, so as to linearly change the charging current I1 of the energy storage module 1, that is, change the slope of V1. Thus, the voltage to ground V1 at the high potential end can also be adjusted in small steps. The variable resistance transistor M0 may be an N-type transistor or a P-type transistor.

To facilitate understanding of the working process of the embodiment, please refer to fig. 6, which is a schematic diagram of a turn-on time control timing sequence disclosed in the embodiment, a first transmission control signal op _ N and a second transmission control signal op _ d with a time width t1 are generated at an edge of a turn-on signal hson of a synchronous tube MP1, so that transistors P45 and N46 are in a transmission state.

The transistors P45 and N46 transmit the differential amplification result of the timing voltage Vt and the reference voltage Vref _ t by the differential amplification module 3 to the integration capacitor C1 in the window with the time width t1, so that the integration capacitor C1 performs charging (or discharging) integration according to the time width t 1:

in one case, if the sampling period is less than the set period, the timing voltage Vt is less than the reference voltage Vref _ t, and at this time, the integrating capacitor C1 discharges in the window with the duration of t1, and the control voltage Vset will become smaller in this period, and the smaller value is the voltage drop caused by the discharging of the integrating capacitor C1;

when the control voltage Vset becomes smaller, the equivalent resistance Rx of the transistor M0 becomes larger, and in the embodiment of fig. 4, the equivalent resistance R0 becomes larger, so that the on-time ton of the sync tube MP1 becomes longer, and the cycle becomes longer; with the embodiment of fig. 5, since the equivalent resistance Rx of the transistor M0 becomes larger, the conduction degree becomes lower, and the conduction degree of the P-type transistor P3 also becomes lower, so that the charging rate of the capacitor C0 by the timing current I1 becomes slower, and the voltage V1 to ground rises and becomes slower, that is, the conduction time ton of the synchronous tube MP1 becomes larger, and the cycle becomes larger.

In another case, if the sampling period is less than the set period, the timing voltage Vt is greater than the reference voltage Vref _ t, and at this time, the integrating capacitor C1 is charged for a window with a duration of t1, and the control voltage Vset will become greater during the period, and the smaller value is the voltage difference increase caused by charging the integrating capacitor C1;

when the control voltage Vset is increased, the equivalent resistance Rx of the transistor M0 is decreased, and for the embodiment of fig. 4, the equivalent resistance R0 is decreased, so that the on-time ton of the sync tube MP1 is decreased, and the cycle is decreased; with the embodiment of fig. 5, since the equivalent resistance Rx of the transistor M0 becomes smaller and the conduction degree becomes higher, the conduction degree of the P-type transistor P3 also becomes higher, so that the charging rate of the charging current I1 to the capacitor C0 becomes faster, and the voltage V1 to ground rises faster, that is, the conduction time ton of the synchronous transistor MP1 becomes smaller, and the cycle becomes smaller.

When the first transmission control signal op _ N and the second transmission control signal op _ d with the time width t1 are finished, another pulse en _ time with the time width t2 is generated and conducted, the discharge tube N43 discharges the timing capacitor Ct, that is, the timing voltage Vt is reset, the voltage is pulled down to 0V, and the timing of the next period is started.

In this embodiment, the widths of the T1 and T2 pulses are required to be much smaller than the set control period T, so that the magnitude of the control voltage Vset can be changed in small steps, and the step time of the small steps is T1.

In a specific implementation process, the change rate of the control voltage Vset each time is determined by designing the window size of t1, the size of the tail current I2 and the size of the capacitance value of the integrating capacitor C1, that is, the control voltage Vset is gradually adjusted by controlling the time step of charging and discharging the integrating capacitor C1, so that the stability of the whole large loop is realized, that is, the larger the capacitance value of the integrating capacitor C1 is, the smaller the window of t1 is, the smaller the tail current I2 is, the smaller the voltage change of the control voltage Vset each time is, the more stable the loop is, but when the output load current jumps from a heavy load to a no load, more switching cycles are needed to complete the adjustment.

The embodiment also discloses a dc converter of a fast transient response dc converter, including: the on-time state switching control circuit of the fast transient response dc converter disclosed in the above embodiments.

This embodiment also discloses a power management chip, includes: the on-time state switching control circuit of the fast transient response dc converter disclosed in the above embodiments.

This embodiment also discloses a wearable bluetooth equipment, includes: a Bluetooth module; the fast transient response dc converter disclosed in the above embodiments is used to supply power to the bluetooth module. The wearable bluetooth device may be, for example, a watch, a bracelet, a bluetooth headset, etc., and these bluetooth devices can also establish bluetooth connection in a low power consumption state, and it is generally desired that the ripple of the power supply is relatively small.

According to the embodiment of the utility model discloses a quick transient response direct current converter and on-time state switching control circuit thereof, the timing module includes the timing capacitor, one end of the timing capacitor is the high potential end of the timing module, and the other end of the timing capacitor is grounded; the current generation module is used for inputting timing current to the timing capacitor so as to enable the high potential end to obtain timing voltage; the differential amplification module is used for comparing the timing voltage with a reference voltage provided by a reference voltage end to obtain differential amplification current; the integration module integrates the differential amplification current in a time window with a preset size in each timing period to obtain an integration voltage and outputs the integration voltage to the variable resistance transistor, and the size of the time window is a plurality of fractions of the timing period. Therefore, the on-state and the off-state of the variable resistance transistor are gradually changed, and the variable resistance transistor is in the on-state and the off-state which respectively correspond to different on-time states, so that one on-time state can be gradually switched to the other on-time state, and the output oscillation of the rapid transient response direct current converter is reduced.

It will be appreciated by those skilled in the art that the above-described preferred embodiments may be freely combined, superimposed, without conflict.

It should be understood that the above-described embodiments are illustrative only and not restrictive, and that various obvious or equivalent modifications and substitutions may be made by those skilled in the art without departing from the basic principles of the invention, and are intended to be included within the scope of the appended claims.

Claims

1. An on-time state switching control circuit of a fast transient response DC converter, for controlling a synchronous tube (MP 1) in a fast transient response buck-type stabilized DC converter to gradually switch from one on-time state to another on-time state, the on-time state switching control circuit comprising: the device comprises a current generation module (1), a timing module (2), a differential amplification module (3) and an integration module (4);

the timing module (2) comprises a timing capacitor (Ct), one end of the timing capacitor (Ct) is a high potential end (Q1) of the timing module (2), and the other end of the timing capacitor (Ct) is grounded;

the input end of the current generation module (1) is connected to the input voltage end of the direct current converter, and the timing current output end of the current generation module (1) is connected to the high potential end (Q1) for inputting timing current to the timing capacitor (Ct) so as to enable the high potential end (Q1) to obtain a timing voltage (Vt);

the first input end and the second input end of the differential amplification module (3) are respectively connected to one and the other of the high potential end (Q1) and the reference voltage end (Q2) for comparing the timing voltage (Vt) with a reference voltage (Vref _ t) provided by the reference voltage end (Q2) to obtain a differential amplification current; the output end of the differential amplification module (3) is connected to the input end of the integration module (4);

the output end of the integration module (4) is connected to the control electrode of a variable resistance transistor (M0) in the direct current converter, the integration module (4) integrates the differential amplification current in a time window (t 1) with a preset size in each timing period to obtain an integration voltage (Vset) and outputs the integration voltage to the variable resistance transistor (M0) so as to control the variable resistance transistor (M0) to be in a conducting state or a switching-off state, and therefore the synchronous tube is in different conducting time states; wherein the size of the time window is a fraction of the timing period.

2. The on-time state switching control circuit of a fast transient response DC converter of claim 1,

the timing module (2) further comprises: a discharge tube (N43);

a first pole of the discharge tube (N43) is connected to the high potential terminal (Q1), and a second pole of the discharge tube (N43) is grounded; the control electrode of the discharge tube (N43) is used for receiving a timing reset signal (en _ time);

-switching on a first and a second pole of the discharge tube (N43) to discharge the timing capacitor (Ct) when the discharge tube (N43) receives the timing reset signal (en _ time); the timing reset signal (en _ time) is close to the end time of the time window with the preset size, and the duration of the timing reset signal (en _ time) is a part of the timing period.

3. The on-time state switching control circuit of a fast transient response dc converter according to claim 1, characterized in that the differential amplification module (3) comprises: a first differential N-tube (N44) and a second differential N-tube (N45); a first pole of the first differential N-tube (N44) and a first pole of the second differential N-tube (N45) are connected to the input voltage end through respective P-type transistors; a first electrode of the second differential N tube (N45) is an output end of the differential amplification unit (43);

the second pole of the first differential N-tube (N44) and the second pole of the second differential N-tube (N45) are connected and grounded;

and the control electrode of the first differential N tube (N44) and the control electrode of the second differential N tube (N45) are respectively a first input end and a second input end of the differential amplification module (3).

4. The on-time state switching control circuit of a fast transient response dc converter according to claim 3, characterized in that said first input terminal is connected to said high potential terminal (Q1); the second input terminal is connected to the reference voltage terminal (Q2).

5. The on-time state-switching control circuit of a fast transient response dc converter according to claim 3, characterized in that said first input terminal is connected to said reference voltage terminal (Q2); the second input terminal is connected to the high potential terminal (Q1).

6. The on-time state-switching control circuit of a fast transient response direct current converter according to any of claims 1-5, characterized in that the current generation module (1) comprises: a first current transistor (P41) and a second current transistor (P42), wherein:

a first pole of the first current transistor (P41) and a first pole of the second current transistor (P42) are connected to an input Voltage (VIN) terminal of the dc converter;

a control electrode of the first current transistor (P41) is connected with a control electrode of the second current transistor (P42);

a control electrode of the first current transistor (P41) is connected to a second electrode of the first current transistor (P41) and the second current transistor (P42) and is connected to the reference voltage terminal (Q2);

a second pole of the second current transistor (P42) is a clocked current output of the current generation module (1).

7. The on-time state-switching control circuit of a fast transient response direct current converter according to claim 6, characterized in that the current generation module (1) further comprises: a current source (I0) and a switch tube (N42);

the input end of the current source (I0) is connected to the input voltage end of the direct current converter;

the output end of the current source (I0) is connected to the control electrode of the switch tube (N42);

a first pole of the switching tube (N42) is connected to a second pole of the first current transistor (P41), and a second pole of the switching tube (N42) is connected to the reference voltage terminal (Q2).

8. The on-time state switching control circuit of a fast transient response dc converter according to claim 7, characterized by further comprising a reference module (5), said reference module (5) comprising:

a reference transistor (N41), a control electrode of the reference transistor (N41) is connected to the reference voltage terminal (Q2), a first electrode of the reference transistor (N41) is connected to the output end of the current source (I0), and a second electrode of the reference transistor (N41) is grounded.

9. The on-time state switching control circuit of a fast transient response dc converter according to claim 8, characterized in that the reference transistor (N41) is equal to the differential N transistor width-to-length ratio in the differential amplification block (3).

10. The on-time state-switching control circuit of a fast transient response dc converter according to claim 8, characterized in that the reference module (5) further comprises: and a reference resistor (Rt) connected between the reference voltage terminal (Q2) and ground.

11. The on-time state-switching control circuit of a fast transient response direct current converter according to any of claims 1 to 5, characterized in that the integration module (4) comprises: an integrating capacitor (C1) and a transmission gate;

the input end of the transmission gate is connected to the output end of the differential amplification module (3), and the output end of the transmission gate is connected to one end of the integrating capacitor (C1); the other end of the integrating capacitor (C1) is grounded;

the transmission gate transmits the differential amplification current to one end of the integration capacitor (C1) within a preset time window (t 1), so that one end of the integration capacitor (C1) obtains the integration voltage (Vset).

12. A fast transient response dc converter, comprising:

the on-time state switching control circuit of a fast transient response dc converter of any of claims 1-10.

13. A power management chip, comprising:

14. A wearable Bluetooth device, comprising:

a Bluetooth module;

the fast transient response dc converter of claim 12, configured to supply power to the bluetooth module.