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CN216900809U - Test circuit and test system of chip - Google Patents

Test circuit and test system of chip Download PDF

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Publication number
CN216900809U
CN216900809U CN202220325402.9U CN202220325402U CN216900809U CN 216900809 U CN216900809 U CN 216900809U CN 202220325402 U CN202220325402 U CN 202220325402U CN 216900809 U CN216900809 U CN 216900809U
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chip
circuit
test
tester
power supply
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陈立志
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Shanghai Awinic Technology Co Ltd
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Shanghai Awinic Technology Co Ltd
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Abstract

The application discloses a test circuit and a test system of a chip, wherein the test circuit of the chip tests the chip based on a test signal sent by a test machine; the test circuit includes: a switch, an inductor and a load capacitor; the first end of the switch is connected with the first power supply or the second power supply of the tester, and the second end of the switch is connected with the voltage input end of the chip; the first end of the inductor is connected with a first power supply of the tester, and the second end of the inductor is connected with the switching tube of the chip; the first end of the load capacitor is connected with the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor is grounded, and the voltage output end of the tester is connected with the voltage output end of the chip. The test circuit is connected with different power supplies of the chip and the tester, so that the test of a plurality of functional modules in the chip is realized.

Description

Test circuit and test system of chip
Technical Field
The application relates to the technical field of testing, in particular to a test circuit and a test system of a chip.
Background
When the chip has a Boost function, a main switching tube control circuit module in a Boost circuit can be integrated in the chip. When the chip realizes the Boost function, a circuit containing an energy storage element needs to be built at the periphery of the chip, so that when the chip is tested, a Boost booster circuit needs to be built to complete the test of the Boost function of the chip.
In addition, many other functional modules, such as an overcurrent protection functional module, an overvoltage protection functional module, etc., are included in the chip, and the testing is also required. However, these functional modules cannot be tested in the Boost voltage Boost circuit, so that part of the functions of the chip cannot be tested.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a test circuit and a test system of a chip, so that a plurality of functional modules in the chip can be tested.
In a first aspect, an embodiment of the present application provides a test circuit for a chip, where the test circuit includes: a switch, an inductor and a load capacitor;
the test circuit is used for testing the chip based on the test signal sent by the tester;
the first end of the switch is connected with a first power supply or a second power supply of the tester, and the second end of the switch is connected with the voltage input end of the chip;
the first end of the inductor is connected with a first power supply of the testing machine, and the second end of the inductor is connected with the switching tube of the chip;
the first end of the load capacitor is connected with the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor is grounded, and the voltage output end of the tester is connected with the voltage output end of the chip.
In one possible implementation, the test circuit further includes: a capacitance to ground;
the first end of the capacitor to ground is connected with the first end of the inductor, and the second end of the capacitor to ground is grounded.
In one possible implementation, the test circuit further includes: a first switch tube;
the first end of the first switch tube is connected with the second end of the load capacitor, and the second end of the first switch tube is grounded.
In one possible implementation, the test circuit further includes: a second switching tube;
the first end of the second switch tube is connected with the second end of the ground capacitor, and the second end of the second switch tube is grounded.
In one possible embodiment, the chip comprises: and the switching tube of the chip belongs to the Boost circuit module.
In a second aspect, an embodiment of the present application provides a chip testing system, where the system includes the testing circuit described in any one of the foregoing implementation manners of the first aspect, and further includes: a tester and a chip;
the testing machine comprises: the tester comprises a first power supply, a second power supply and a tester voltage output end;
the chip includes: the chip comprises a voltage input end, a first functional module, a second functional module and a chip voltage output end;
the test circuit is used for testing the chip based on the test signal sent by the tester.
In one possible implementation, the first functional module of the chip is a Boost voltage Boost circuit module, where the Boost voltage Boost circuit module includes: a switching tube;
the second functional module includes: at least one of an overcurrent protection module and an overvoltage protection module.
In one possible embodiment, the testing machine further comprises: a third power supply;
and a third power supply of the tester is connected with a switching tube of the chip and a second end of an inductor in the test circuit.
In the implementation manner of the embodiment of the present application, the test circuit of the chip tests the chip based on the test signal sent by the test machine; the test circuit includes: a switch, an inductor and a load capacitor; the first end of the switch is connected with the first power supply or the second power supply of the tester, and the second end of the switch is connected with the voltage input end of the chip; the first end of the inductor is connected with a first power supply of the tester, and the second end of the inductor is connected with the switching tube of the chip; the first end of the load capacitor is connected with the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor is grounded, and the voltage output end of the tester is connected with the voltage output end of the chip. The test circuit is connected with different power supplies of the chip and the test machine, so that the test of a plurality of functional modules in the chip is realized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some of the embodiments provided in the present application, and other drawings can be obtained by those skilled in the art according to these drawings.
FIG. 1 is a diagram illustrating a system for testing a chip according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a test circuit of a chip according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of a Boost circuit in an embodiment of the present application;
fig. 4A is a schematic diagram of another Boost voltage Boost circuit in the embodiment of the present application;
fig. 4B is a schematic diagram of another Boost circuit in the embodiment of the present application;
FIG. 5 is a diagram illustrating another system for testing a chip according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and the described embodiments are only exemplary embodiments of the present application, and not all implementations. Those skilled in the art can combine the embodiments of the present application to obtain other embodiments without inventive work, and these embodiments are also within the scope of the present application.
When a chip comprising a Boost circuit is tested, a Boost application circuit is required to be built on the periphery of the chip to complete the test of the Boost function of the chip. Since many other functional modules, such as an overcurrent protection functional module, an overvoltage protection functional module, etc., are also included in the chip, the test is also required. However, these functional modules cannot be tested in the Boost application circuit, so that some functions of the chip cannot be tested.
Based on this, the embodiment of the application provides a test circuit of a chip, and the test circuit tests the chip based on a test signal sent by a test machine. Specifically, the test circuit includes: a switch, an inductor and a load capacitor; the first end of the switch is connected with the first power supply or the second power supply of the tester, and the second end of the switch is connected with the voltage input end of the chip; the first end of the inductor is connected with a first power supply of the tester, and the second end of the inductor is connected with the switching tube of the chip; the first end of the load capacitor is connected with the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor is grounded, and the voltage output end of the tester is connected with the voltage output end of the chip. The test circuit is connected with different power supplies of the chip and the tester, so that the test of a plurality of functional modules in the chip is realized.
The testing principle of the chip will be described below with reference to a specific application scenario.
Referring to fig. 1, the figure is a schematic diagram of a chip testing system according to an embodiment of the present application.
In the application scenario, an automatic testing machine is used for realizing the functional test of the chip.
The chip testing system mainly includes an automatic tester 101, a hardware testing circuit 102, and a chip 103 to be tested.
The automatic tester 101 needs to communicate with the chip 103 to be tested through the hardware test circuit 102, so as to apply an excitation signal (a voltage signal, a current signal, etc.) to the chip 103 to be tested. The chip 103 to be tested outputs an electrical signal according to the excitation signal, and the output electrical signal is fed back to the automatic testing machine 101 through the hardware testing circuit 102. The automated testing machine 101 generates test data from the fed-back electrical signal.
Based on the principle of chip testing, the embodiment of the application provides a test circuit of a chip, which controls the chip to be connected with different power supplies of a test machine through the test circuit, so as to test a plurality of functional modules in the chip.
Referring to fig. 2, the figure is a schematic diagram of a test circuit of a chip according to an embodiment of the present application.
The test circuit 200 includes: a switch 201, an inductor 202, and a load capacitor 203;
the test circuit 200 tests the chip based on the test signal sent by the tester;
in the test circuit 200, a first end of a switch 201 is connected with a first power supply or a second power supply of a test machine, and a second end of the switch 201 is connected with a voltage input end of a chip;
the first end of the inductor 202 is connected with a first power supply of the tester, and the second end of the inductor 202 is connected with a switching tube of the chip;
the first end of the load capacitor 203 is connected to the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor 203 is grounded, and the voltage output end of the tester is connected to the voltage output end of the chip.
In a possible implementation manner, the chip provided by the embodiment of the present application includes a Boost circuit module, that is, a main switching tube control module in the Boost circuit is integrated in the chip.
Because the switching tube control module of the Boost circuit is integrated in the chip, when the Boost function of the chip is tested, the Boost circuit containing the energy storage element is required to be built on the periphery of the chip, the energy storage element comprises an inductor and a load capacitor, and the load capacitor is used for realizing the Boost function of the chip. The chip also comprises a plurality of other functional modules, such as an overcurrent protection module, an overvoltage protection module and the like, but the functional modules cannot be tested in the Boost voltage booster circuit, and the existing technology can only build another test circuit for the functional modules or remove the original Boost voltage booster circuit, so that the test efficiency of the chip is low.
In the test circuit provided by the embodiment of the application, when the Boost function of a chip is tested, based on a test signal sent by a test machine, a test circuit control switch is connected with a first power supply of the test machine and a voltage input end of the chip, because the chip is grounded, a first end of a load capacitor is connected with a voltage output end of the chip, a second end of the load capacitor is grounded, the load capacitor is equivalently connected with two ends of the chip in parallel, and the Boost circuit of the chip is formed by inputting voltage, an inductor, the chip and the load capacitor, so that the Boost function test of the chip is realized.
The operation principle of the Boost circuit in the chip will be described with reference to the accompanying drawings.
Referring to fig. 3, the figure is a schematic diagram of a Boost voltage Boost circuit provided in an embodiment of the present application.
As shown in fig. 3, a main switching tube control circuit module in the Boost circuit is integrated in the chip, wherein the switching tube may be a triode or a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), which is referred to as a MOS tube for short.
A switch tube control circuit module of a Boost circuit in a chip mainly comprises a diode and an MOS tube, and the diode D can prevent a capacitor from discharging to the ground. A test circuit comprising an inductor L and a capacitor C is built on the periphery of the chip, the input voltage is Vin, and the output voltage is Vout.
In this embodiment, the switching transistor in the Boost voltage-boosting circuit is described by taking a MOS transistor as an example.
When the Boost circuit is in a charging process, the MOS transistor is in a closed state, that is, the MOS transistor is turned on, and at this time, an equivalent circuit of the Boost circuit is as shown in fig. 4A.
The MOS tube can be replaced by a conducting wire, and the diode D prevents the capacitor C from discharging to the ground. Since the input voltage Vin is a direct current, the current in the inductor L increases linearly at a rate that is related to the size of the inductor. As inductor current increases, inductor L stores energy.
When the Boost circuit is in the discharging process, the MOS transistor is in a disconnected state, that is, the MOS transistor is turned off, and at this time, an equivalent circuit of the Boost circuit is as shown in fig. 4B.
When the MOS transistor is turned off, the current flowing through the inductor L does not immediately become 0 due to the current holding characteristic of the inductor L, but slowly decreases to 0 from the current value at the time of completion of charging. Because the originally conducted circuit is disconnected, the inductor L can only discharge through a new circuit, namely the inductor L starts to charge the capacitor C, the voltage at the two ends of the capacitor C is gradually increased, the output voltage Vout is higher than the input voltage Vin, and the boosting function of the chip is realized.
The boosting process is the energy transfer process of the inductor. The inductor stores energy during charging and releases energy during discharging. If the capacitance is large enough, the output terminal can maintain a continuous current during the discharge process. If this switching process is repeated, an output voltage higher than the input voltage can be obtained across the capacitor.
When other functional modules of the chip are tested, for example, an overcurrent protection module or an overvoltage protection module, the connection between the voltage input end of the chip and the first power supply of the testing machine needs to be disconnected, and then the voltage input end of the chip and the second power supply of the testing machine are connected through the switch, so that the disconnection between the voltage input end of the chip and the Boost functional module is realized. At the moment, the voltage input end of the chip is powered by the second power supply of the testing machine, so that the testing of other functional modules is realized.
In addition, if the on-resistance characteristic of the MOS tube in the Boost circuit of the chip needs to be tested independently, namely the on-circuit with the Boost function does not need to be constructed, the MOS tube of the chip can be directly connected with a third power supply of the testing machine, namely the MOS tube of the chip is supplied with power by the third power supply of the testing machine independently, the tests of other functional modules in the chip are not influenced, and the voltage and the current of the MOS tube can be changed to finish the performance test of the MOS tube.
The test circuit provided by the embodiment of the application realizes the connection of the chip and different power supplies of the test machine based on the test signal of the test machine, and realizes the test of a plurality of functional modules of the chip under the condition of not changing a hardware circuit. And an additional test circuit does not need to be built for a certain functional module, so that the test efficiency of the chip is improved.
Further, the test circuit provided by the embodiment of the present application may further include: and the first end of the ground capacitor is connected with the first end of the inductor, and the second end of the ground capacitor is grounded.
When the power input end of the chip is connected with the first power supply of the tester, a Boost circuit of the chip is formed. When the Boost circuit module is in a working state, the MOS transistor is in an intermittent conduction state, and a Pulse Width Modulation (PWM) waveform is generated. Because the conduction circuit comprises the energy storage element inductance, the steady state of the circuit is influenced by the influence of the PWM waveform. Therefore, a ground capacitor can be added at two ends of the inductor of the test circuit to stabilize the voltage and current at two ends of the inductor, so that the state of the chip tends to be stable.
When some functions of the chip are tested, if the Boost circuit can affect the functional module to be tested, in order to avoid frequently changing the structure of the hardware circuit, a first switch tube can be added at the load capacitor end of the test circuit in advance, that is, the first end of the first switch tube is connected with the second end of the load capacitor, and the second end of the first switch tube is grounded. When the load capacitor is needed to be utilized, the first switch tube is closed; when the influence of the load capacitor needs to be eliminated, the first switch tube can be disconnected, so that the load capacitor is controlled to be disconnected from the original circuit.
Similarly, the test circuit may further include a second switch tube, a first end of the second switch tube is connected to the second end of the ground capacitor, and a second end of the second switch tube is grounded. When the influence on the ground capacitance needs to be eliminated, the second switching tube can be controlled to be switched off, so that the ground capacitance is controlled to be switched off from the original circuit.
Under the condition that the hardware structure of the test circuit is not changed, the first switch tube or the second switch tube is controlled to be disconnected, the influence of load capacitance or ground capacitance is eliminated, and the test efficiency of the chip is improved.
Based on the above embodiment of the test circuit, the embodiment of the present application further provides a test system of a chip.
Referring to fig. 5, the figure is a schematic diagram of a chip testing system according to an embodiment of the present application.
The test system 500 includes: a tester 501, a test circuit 502 provided in the above embodiment, and a chip 503;
the tester 501 comprises a first power supply V1, a second power supply V2, and a voltage output terminal Vout;
the chip 503 includes: the voltage input end VDD, the first functional module, the second functional module and the voltage output end Vboost;
the structure of the test circuit 502 is described in the above embodiments, and is not described herein again.
The first functional module of the chip 503 is a Boost circuit module, wherein the Boost circuit module includes: a switching tube SW; the second functional module includes: at least one of an overcurrent protection module and an overvoltage protection module.
The test machine 501 further includes: and a third power supply V3, a third power supply V3 is connected with the switch tube SW and the second end of the inductor in the test circuit.
In the test system 500, when a Boost voltage circuit module of the chip 503 needs to be tested, a switch of the test circuit 501 is controlled to connect the first power supply V1 of the test machine 501 and the voltage input terminal VDD of the chip 503, that is, the chip 503 is supplied with power by the first power supply V1, and a Boost voltage circuit is formed by an inductor, a load capacitor and a switch tube, so that the test of the related functions of the Boost is completed.
When testing a second functional module of the chip 503, for example, an overcurrent protection module or an overvoltage protection module, since the second functional module cannot be tested in the Boost voltage Boost circuit, it is first necessary to disconnect the voltage input terminal VDD of the chip 503 from the first power supply V1, and then connect the voltage input terminal VDD of the chip 503 to the second power supply V2 of the tester through a switch.
Because the inductor is connected to the second power supply V2 and is not connected to the first power supply V1, the disconnection between the voltage input end VDD of the chip and the Boost circuit module is realized. At this time, the voltage input end VDD of the chip is supplied by the second power supply V2, so as to implement the test of the second functional module.
In addition, if the on-resistance characteristic of the switching tube in the Boost circuit module of the chip needs to be tested independently, the switching tube can be controlled to be directly connected with a third power supply V3 of the testing machine, namely the switching tube of the chip is supplied with power independently by a third power supply V3, the test of a second functional module in the chip is not influenced, and the voltage and the current of the switching tube can be changed to finish the performance test of the switching tube.
According to the chip testing system provided by the embodiment of the application, the chip is controlled by the testing circuit to be connected with different power supplies of the testing machine, and a plurality of functional modules in the chip are tested under the condition that the hardware structure of the circuit is not changed.
It should be noted that the terms "first" and "second" are used herein to distinguish similar objects and are not used to describe a particular order or sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances and are merely descriptive of the various embodiments of the application and how objects of the same nature can be distinguished.
The embodiments in the present specification are described in a progressive manner, and similar parts between the embodiments may be referred to each other, and each embodiment focuses on differences from other embodiments. One of ordinary skill in the art can understand and implement it without inventive effort.
The above description is only an exemplary embodiment of the present application and should not be taken as limiting the present application in any way. Equivalent changes or modifications of the above embodiments are within the scope of the present application.

Claims (8)

1. A test circuit for a chip, the test circuit comprising: a switch, an inductor and a load capacitor;
the test circuit is used for testing the chip based on the test signal sent by the tester;
the first end of the switch is connected with a first power supply or a second power supply of the testing machine, and the second end of the switch is connected with the voltage input end of the chip;
the first end of the inductor is connected with a first power supply of the tester, and the second end of the inductor is connected with the switching tube of the chip;
the first end of the load capacitor is connected with the voltage output end of the tester and the voltage output end of the chip, the second end of the load capacitor is grounded, and the voltage output end of the tester is connected with the voltage output end of the chip.
2. The circuit of claim 1, wherein the test circuit further comprises: a capacitance to ground;
the first end of the capacitor to ground is connected with the first end of the inductor, and the second end of the capacitor to ground is grounded.
3. The circuit of claim 2, wherein the test circuit further comprises: a first switch tube;
the first end of the first switch tube is connected with the second end of the load capacitor, and the second end of the first switch tube is grounded.
4. The circuit of claim 3, wherein the test circuit further comprises: a second switching tube;
the first end of the second switch tube is connected with the second end of the ground capacitor, and the second end of the second switch tube is grounded.
5. The circuit of any of claims 1 to 4, wherein the chip comprises: and the switching tube of the chip belongs to the Boost circuit module.
6. A system for testing a chip, the system comprising the test circuit of any one of claims 1 to 5, further comprising: a tester and a chip;
the testing machine comprises: the tester comprises a first power supply, a second power supply and a tester voltage output end;
the chip includes: the chip comprises a voltage input end, a first functional module, a second functional module and a chip voltage output end;
the test circuit is used for testing the chip based on the test signal sent by the tester.
7. The system of claim 6, wherein the first functional module of the chip is a Boost circuit module, wherein the Boost circuit module comprises: a switching tube;
the second functional module includes: at least one of an overcurrent protection module and an overvoltage protection module.
8. The system of claim 7, wherein the testing machine further comprises: a third power supply;
and a third power supply of the tester is connected with a switching tube of the chip and a second end of an inductor in the test circuit.
CN202220325402.9U 2022-02-17 2022-02-17 Test circuit and test system of chip Active CN216900809U (en)

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Application Number Priority Date Filing Date Title
CN202220325402.9U CN216900809U (en) 2022-02-17 2022-02-17 Test circuit and test system of chip

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CN216900809U true CN216900809U (en) 2022-07-05

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114518527A (en) * 2022-02-17 2022-05-20 上海艾为电子技术股份有限公司 Chip test circuit, method and test system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114518527A (en) * 2022-02-17 2022-05-20 上海艾为电子技术股份有限公司 Chip test circuit, method and test system

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