CN216145615U - Semiconductor circuit having a plurality of transistors - Google Patents
Semiconductor circuit having a plurality of transistors Download PDFInfo
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- CN216145615U CN216145615U CN202121215955.0U CN202121215955U CN216145615U CN 216145615 U CN216145615 U CN 216145615U CN 202121215955 U CN202121215955 U CN 202121215955U CN 216145615 U CN216145615 U CN 216145615U
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a semiconductor circuit, which comprises a radiating substrate formed by a metal substrate and radiating fins in an integrated manner, wherein an insulating layer is constructed on the metal substrate end of the radiating substrate, a circuit structure, a resistance-capacitance element, a power device chip and a control IC chip are constructed on the insulating layer, and a plastic package shell for coating the circuit structure, the resistance-capacitance element, the power device chip and the control IC chip is further constructed on the metal substrate end of the radiating substrate. The metal substrate and the radiating fin of the semiconductor circuit are integrally designed, no middle heat conducting layer exists, the heat conducting efficiency can be greatly improved, the radiating capacity is improved, the complex operation related to the existing radiating fin installation is avoided, and various problems possibly caused by the semiconductor circuit after the complex operation are reduced, such as: the heat conduction layer is easy to have the conditions of inconsistent thickness, cavities, dryness and the like, the overall performance of the semiconductor circuit is improved, and the comprehensive cost is reduced.
Description
Technical Field
The utility model relates to the field of power semiconductors, in particular to a semiconductor circuit.
Background
The semiconductor circuit is a power driving product combining power electronics and integrated circuit technology, integrates an intelligent control IC, high-power devices for power output such as an IGBT, a MOSFET and an FRD and some resistance-capacitance elements, and the devices are welded on an aluminum substrate through tin-based solder.
When the semiconductor circuit is actually used, because high voltage and large current output exist, a large amount of heat is generated by a large amount of internal high-power devices. To ensure heat dissipation, as shown in fig. 1, the aluminum substrate 1 and the external heat sink 2 are usually fixed by screws 3 or other clamps, and a heat conducting layer 4, such as heat conducting silicone grease, heat conducting gel, heat conducting cloth, etc., is coated between the aluminum substrate 1 and the external heat sink 2 to enhance heat transfer between the semiconductor circuit and the external heat sink 2.
However, since the conventional semiconductor circuit and the external heat sink are fastened by screws or other clamps after the heat conductive layer is disposed therebetween, material and labor costs are increased, and there are problems in that assembly is difficult and mechanical damage may be caused to the semiconductor circuit during assembly. In addition, the heat conduction layer is easy to have the conditions of inconsistent thickness, cavities, dry-up and the like, and further influences the heat dissipation performance of the semiconductor circuit, so that the service life and the reliability of the whole semiconductor circuit are influenced. Moreover, the thermal conductivity of the heat conducting layer itself is usually only 1-6W/mK, which is much lower than the aluminum material of the heat sink itself, such as the thermal conductivity of 209W/mK of the commonly used 6063T5 aluminum alloy.
SUMMERY OF THE UTILITY MODEL
The utility model provides a semiconductor circuit, which aims to solve the technical problem of poor heat dissipation performance of an external heat sink of the conventional semiconductor circuit.
In order to achieve the above object, the present invention provides a semiconductor circuit, which includes a heat dissipation substrate integrally formed by a metal substrate and a heat dissipation plate, wherein an insulating layer is formed on a metal substrate end of the heat dissipation substrate, a circuit structure, a resistance-capacitance element, a power device chip and a control IC chip are formed on the insulating layer, and a plastic package casing for covering the circuit structure, the resistance-capacitance element, the power device chip and the control IC chip is further formed on the metal substrate end of the heat dissipation substrate.
Preferably, the heat sink includes a bottom plate and a plurality of heat dissipation fins arranged on the bottom plate at intervals, and the heat dissipation fins are mounted on one surface of the bottom plate far away from the metal substrate end.
Preferably, an installation seat is constructed on one surface of the bottom plate far away from the metal substrate end, and a plurality of cooling fans are arranged on the installation seat.
Preferably, the heat dissipation fans are located in regions right below the circuit structure, the resistance-capacitance element, the power device chip and the control IC chip.
Preferably, the resistance-capacitance element, the power device chip and the control IC chip are electrically connected to the circuit structure through inner leads, respectively.
Preferably, the circuit structure is further configured with a metal pin electrically connected thereto, and the metal pin is exposed to the outside of the plastic package housing.
Preferably, the metal substrate and the heat sink are integrally formed by a silver sintering process, and a sintering layer is formed between the metal substrate and the heat sink.
Preferably, the metal substrate and the heat sink are sintered into a whole by using a pressureless nano silver paste or a common silver paste and nickel-copper-silver plating layers respectively coated on the butt joint surfaces of the metal substrate and the heat sink.
Compared with the prior art, the embodiment of the utility model has the beneficial technical effects that:
the metal substrate and the radiating fin of the semiconductor circuit provided by the embodiment of the utility model are integrally designed, no middle heat conduction layer exists, the heat conduction efficiency can be greatly improved, the radiating capacity is improved, the complex operation related to the existing radiating fin installation is avoided, and various problems possibly caused by the semiconductor circuit after the complex operation are reduced, such as: the heat conduction layer is easy to have the conditions of inconsistent thickness, cavities, dryness and the like, so that the overall performance of the semiconductor circuit is improved, and the comprehensive cost is reduced.
Drawings
FIG. 1 is a schematic view of a prior art semiconductor circuit equipped heat sink;
FIG. 2 is a schematic diagram of a semiconductor circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a semiconductor circuit according to another embodiment of the present invention;
FIG. 4 is a schematic diagram of a semi-plastic semiconductor circuit according to the prior art;
FIG. 5 is a schematic diagram of a semiconductor circuit of the present invention fabricated by a sintering process;
FIG. 6 is a schematic diagram of a completed semiconductor circuit shown in FIG. 5;
fig. 7 is a schematic structural diagram of a heat dissipation substrate of a semiconductor circuit according to the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be illustrative of the present invention and should not be construed as limiting the present invention, and all other embodiments that can be obtained by one skilled in the art based on the embodiments of the present invention without inventive efforts shall fall within the scope of protection of the present invention.
The semiconductor circuit provided by the utility model is a circuit module which integrates a power switch device, a high-voltage driving circuit and the like together and is sealed and packaged on the outer surface, and is widely applied to the field of power electronics, such as the fields of frequency converters of driving motors, various inversion voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency household appliances and the like. The semiconductor circuit herein may be referred to by various other names, such as Modular Intelligent Power System (MIPS), Intelligent-Power Module (IPM), or hybrid integrated circuit, Power semiconductor Module, Power Module, etc. In the following embodiments of the present invention, collectively referred to as a Modular Intelligent Power System (MIPS).
Example one
An embodiment of the present invention provides a MIPS with a heat dissipation function, referring to fig. 2, the MIPS with a heat dissipation function includes a heat dissipation substrate 10 integrally formed by a metal substrate 11 and a heat dissipation fin 12, an insulating layer is configured on an end of the metal substrate 11 of the heat dissipation substrate 10, a circuit structure 20, a resistance-capacitance element 30, a power device chip 40 and a control IC chip 50 are configured on the insulating layer, and a plastic package casing 60 for covering the circuit structure 20, the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 is further configured on the end of the metal substrate 11 of the heat dissipation substrate 10.
The heat dissipation substrate 10 provided by the embodiment of the utility model is formed by integrating the metal substrate 11 and the heat dissipation fins 12, and a heat conduction layer is not required to be arranged between the metal substrate 11 and the heat dissipation fins 12, so that heat dissipated by the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 is directly dissipated to the air through the heat dissipation substrate 10 without passing through the middle heat conduction layer, and the heat dissipation capability of the MIPS is greatly improved. The upper region of the heat dissipation substrate 10 is configured as a metal substrate 11, the lower region of the heat dissipation substrate 10 is configured as a heat sink 12, an insulating layer is disposed on the metal substrate 11, a copper foil is laminated on the insulating layer, and the copper foil is processed into the circuit structure 20 by means of a mask, etching, and the like. It should be noted that the above description of the upper and lower parts is referred to the direction shown in the drawings, and the upper and lower parts herein only indicate the relative positional relationship between the two parts.
The circuit structure 20 is provided with a resistance-capacitance element 30, a power device chip 40 and a control IC chip 50 which are respectively electrically connected with the circuit structure, and the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 are fixed on the metal substrate 11 through tin-lead solder, tin-based lead-free solder or epoxy resin adhesive glue. It should be noted that a plurality of pads for soldering the rc element 30, the power device chip 40 and the control IC chip 50 are reserved on the circuit structure 20, and the shape and size of each pad are respectively matched with the rc element 30, the power device chip 40 and the control IC chip 50 to be soldered.
The metal substrate 11 and the heat sink 12 of the MIPS provided by the embodiment of the present invention are designed to be integrally formed, and since there is no middle heat conduction layer, the heat conduction efficiency can be greatly improved, the heat dissipation capability can be improved, the complex operation related to the existing installation of the heat sink 12 is avoided, and various adverse problems that the MIPS may have after the complex operation are reduced, such as: the heat conduction layer is easy to have the conditions of inconsistent thickness, cavities, dryness and the like, so that the overall performance of the MIPS is improved, and the comprehensive cost is reduced.
The MIPS with the heat dissipation function provided in this embodiment has two molding modes, specifically as follows:
the first molding mode is as follows:
firstly, laminating an insulating layer and a copper foil on a metal substrate 11 to form a circuit base material;
secondly, forming a circuit structure 20 on the circuit substrate through an etching process;
thirdly, assembling the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 on the circuit structure 20, and after the assembly is finished, plastically packaging the circuit structure 20, the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 by using a plastic package mold;
fourthly, respectively manufacturing a metal plating layer 200 on the exposed surface of the metal substrate 11 and the heat radiating fin 12 by using a metallization process;
and fifthly, sintering the plating surface of the metal substrate 11 and the plating surface of the heat sink 12 to obtain the integrally formed heat dissipation substrate 10, wherein the metal plating layer 200 on the metal substrate 11 and the metal plating layer 200 on the heat sink 12 form a sintered layer 300.
In this embodiment, the existing semi-plastic MIPS is manufactured according to the method related to steps S10 to S30, as shown in fig. 4, and then the metallization process is used to manufacture the metal plating layer 200 on the exposed surface of the metal substrate 11 and on the heat sink 12, where the metallization process may be electroplating, sputtering, and the like, and then the manufactured metal plating layer 200 of the semi-plastic MIPS and the metal plating layer 200 of the heat sink 12 are sintered into a whole to obtain the integrally-formed heat sink substrate 10. It should be noted that the metal plating layer 200 on the metal substrate 11 and the metal plating layer 200 on the heat sink 12 will form a sintered layer 300 after the sintering process, as shown in fig. 5-6. The metal plating layer 200 is a nickel-copper-silver plating layer, and the metal substrate 11 and the heat sink 12 are sintered into a whole by using a non-pressure nano silver paste or a common silver paste.
The MIPS manufacturing method does not need to change the existing manufacturing method of the semi-plastic MIPS, and comprises processes, equipment, materials and the like, and only the metal plating layer 200 needs to be arranged on the exposed surface of the metal substrate 11.
The second molding mode is as follows:
firstly, manufacturing a radiating substrate 10 with a metal substrate 11 and radiating fins 12 integrated;
secondly, pressing the insulating layer and the copper foil on the metal substrate 11 to form a circuit substrate;
thirdly, forming a circuit structure 20 on the circuit substrate by an etching process;
fourthly, assembling the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 on the circuit structure 20, and after the assembly is completed, plastically packaging the circuit structure 20, the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 by using a plastic package mold.
In this embodiment, the heat dissipating substrate 10 shown in fig. 7 is fabricated, and the heat dissipating substrate 10 is integrally formed by the metal substrate 11 and the heat sink 12, which can be obtained by stamping, but is not limited thereto, which is merely exemplary and not limiting, and the skilled person can select the substrate according to the actual situation. After the heat dissipation substrate 10 is manufactured, a circuit base material is formed on a metal plate end of the heat dissipation substrate 10 through a pressing fit of an insulating layer and a copper foil, then a circuit structure 20 is formed on the circuit base material through an etching process, then the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 are assembled on the circuit structure 20, after the assembly is completed, the circuit structure 20, the resistance-capacitance element 30, the power device chip 40 and the control IC chip 50 are subjected to hot-pressing injection molding through a plastic package mold, a plastic package material with epoxy resin as a main component is poured, and a plastic package shell 60 is formed after curing molding. In this embodiment, the plastic package material is a mixture of epoxy resin, phenolic resin, a filler (silicon dioxide or other solid powder), a release agent, a coloring agent, a flame retardant, and other materials.
Example two
Referring to fig. 2, the heat sink 12 according to the embodiment of the utility model includes a bottom plate 121 and a plurality of heat dissipation fins 122 spaced apart from the bottom plate 121, wherein the heat dissipation fins 122 are mounted on a surface of the bottom plate 121 away from the metal substrate 11. In this embodiment, one surface of the bottom plate 121 contacts the metal substrate 11, the other surface contacts the plurality of heat dissipation fins 122, and the metal substrate 11 contacts the capacitance-resistance element 30, the power device chip 40, and the control IC chip 50, so that heat dissipated by the capacitance-resistance element 30, the power device chip 40, and the control IC chip 50 is conducted to the outside air through the metal substrate 11, the bottom plate 121, and the heat dissipation fins 122 in sequence, thereby achieving timely and rapid heat dissipation. It should be noted that the bottom plate 121 and the heat dissipation fins 122 included in the heat sink 12 are integrally formed, that is, the metal substrate 11, the bottom plate 121, and the heat dissipation fins 122 are integrally formed, and it is not necessary to add a heat conduction layer between the adjacent two, so that the heat dissipation performance of the MIPS can be greatly improved.
EXAMPLE III
Referring to fig. 3, a mounting base 70 is configured on a surface of the bottom plate 121 away from the metal substrate 11 according to the embodiment of the present invention, and a plurality of heat dissipation fans 80 are disposed on the mounting base 70. In this embodiment, a fan mounting location is disposed on the bottom plate 121, a mounting seat 70 is disposed on the fan mounting location, and then the heat dissipation fan 80 is mounted through the mounting seat 70, the heat dissipation fan 80 can accelerate the air flow at the position of the heat dissipation fin 12, so that the heat conducted on the heat dissipation fin 12 is quickly dissipated into the air, and the purpose of quickly dissipating heat is achieved, so as to further improve the heat dissipation performance of the MIPS provided in the embodiment of the present invention. Preferably, the number of the heat dissipation fans 80 provided in the embodiment of the present invention is two, and the two heat dissipation fans 80 are arranged on the bottom plate 121 side by side.
Example four
Referring to fig. 3, the heat dissipation fans 80 according to the embodiment of the present invention are located in the areas directly below the circuit structure 20, the rc element 30, the power device chip 40, and the control IC chip 50. In this embodiment, as shown in fig. 2, the rc element 30, the power device chip 40 and the control IC chip 50 are located at the middle region of the heat sink 12, and most of the heat emitted therefrom is conducted to the outside air through the middle region of the heat sink 12, so that the heat dissipation fan 80 is disposed in the region directly below the rc element 30, the power device chip 40 and the control IC chip 50, but not disposed at the edge region of the heat sink 12, so as to improve the heat dissipation performance of the MIPS proposed in the embodiment of the present invention.
EXAMPLE five
Referring to fig. 2 or fig. 3, the rc element 30, the power device chip 40 and the control IC chip 50 according to the embodiment of the utility model are electrically connected to the circuit structure 20 through inner leads 90, respectively. In the present embodiment, the rc element 30, i.e., the resistor and the capacitor, is electrically connected to the circuit structure 20 through the inner lead 90, the power device, i.e., the IGBT, the MOSFET, the FRD, etc., is electrically connected to the circuit structure 20 through the inner lead 90, and the power device chip 40 and the control IC chip 50 are electrically connected to the circuit structure 20 through the inner lead 90.
EXAMPLE six
Referring to fig. 2 or fig. 3, the circuit structure 20 according to the embodiment of the utility model is further configured with a metal pin 100 electrically connected thereto, and the metal pin 100 is exposed outside the plastic package casing 60. In this embodiment, the metal pins 100 are installed at the preset positions of the circuit structure 20, the metal pins 100 are electrically connected to the circuit structure 20 through the bending positions at the root portions of the metal pins 100, and the metal pins 100 penetrate through one side of the plastic package casing 60 and are exposed outside the plastic package casing 60.
The above is only a part or preferred embodiment of the present invention, and neither the text nor the drawings should limit the scope of the present invention, and all equivalent structural changes made by the present specification and the contents of the drawings or the related technical fields directly/indirectly using the present specification and the drawings are included in the scope of the present invention.
Claims (8)
1. A semiconductor circuit is characterized by comprising a radiating substrate formed by a metal substrate and radiating fins in an integrated mode, wherein an insulating layer is constructed on the metal substrate end of the radiating substrate, a circuit structure, a resistance-capacitance element, a power device chip and a control IC chip are constructed on the insulating layer, and a plastic package shell used for wrapping the circuit structure, the resistance-capacitance element, the power device chip and the control IC chip is further constructed on the metal substrate end of the radiating substrate.
2. The semiconductor circuit of claim 1, wherein the heat sink comprises a base plate and a plurality of heat fins spaced apart from the base plate, the heat fins being mounted on a side of the base plate away from the metal substrate.
3. The semiconductor circuit of claim 2, wherein a mounting base is formed on a surface of the bottom plate away from the metal substrate, and a plurality of heat dissipation fans are disposed on the mounting base.
4. The semiconductor circuit of claim 3, wherein a plurality of said heat dissipation fans are located in regions directly under said circuit structure, said RC element, said power device chip, and said control IC chip.
5. The semiconductor circuit of claim 1, wherein the rc element, the power device chip and the control IC chip are electrically connected to the circuit structure through inner leads, respectively.
6. The semiconductor circuit according to claim 1, wherein the circuit structure is further configured with metal pins electrically connected thereto, and the metal pins are exposed to the outside of the plastic package housing.
7. The semiconductor circuit according to claim 1, wherein the metal substrate and the heat sink are integrally formed by a silver sintering process, and a sintered layer is formed between the metal substrate and the heat sink.
8. The semiconductor circuit according to claim 7, wherein the metal substrate and the heat sink are integrally sintered by a pressureless nano silver paste or a normal silver paste and nickel-copper-silver plating layers respectively applied to the abutting surfaces of the metal substrate and the heat sink.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121215955.0U CN216145615U (en) | 2021-06-01 | 2021-06-01 | Semiconductor circuit having a plurality of transistors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121215955.0U CN216145615U (en) | 2021-06-01 | 2021-06-01 | Semiconductor circuit having a plurality of transistors |
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| Publication Number | Publication Date |
|---|---|
| CN216145615U true CN216145615U (en) | 2022-03-29 |
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| CN202121215955.0U Expired - Fee Related CN216145615U (en) | 2021-06-01 | 2021-06-01 | Semiconductor circuit having a plurality of transistors |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113192943A (en) * | 2021-06-01 | 2021-07-30 | 广东汇芯半导体有限公司 | Semiconductor circuit and method for manufacturing the same |
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- 2021-06-01 CN CN202121215955.0U patent/CN216145615U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113192943A (en) * | 2021-06-01 | 2021-07-30 | 广东汇芯半导体有限公司 | Semiconductor circuit and method for manufacturing the same |
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