CN215267070U

CN215267070U - VCSEL device integrated at wafer level

Info

Publication number: CN215267070U
Application number: CN202120730565.0U
Authority: CN
Inventors: 郭铭浩; 王立; 李念宜
Original assignee: Zhejiang Ruixi Technology Co ltd
Current assignee: Zhejiang Ruixi Technology Co ltd
Priority date: 2021-04-09
Filing date: 2021-04-09
Publication date: 2021-12-21
Anticipated expiration: 2031-04-09

Abstract

Disclosed is a VCSEL device integrated at a wafer level, wherein the VCSEL device comprises: the laser structure comprises a base layer, a VCSEL laser unit and a semiconductor optical structure clamped between the base layer and the VCSEL laser unit. The semiconductor optical structure includes: the laser device includes an optical modulation section for modulating laser light emitted from an N-DBR layer of the VCSEL laser unit, and a protection section covering the optical modulation section. The VCSEL device integrates a VCSEL laser unit for forming and emitting laser light and a semiconductor optical structure for modulating the laser light emitted by the VCSEL laser unit on a wafer level.

Description

VCSEL device integrated at wafer level

Technical Field

The present application relates to the field of semiconductors, and more particularly to integrated VCSEL devices at the wafer level.

Background

A Vertical-Cavity Surface-Emitting Laser (VCSEL) is a semiconductor Laser, and Laser light is emitted perpendicularly to an upper Surface or a lower Surface. Compared with the traditional edge-emitting semiconductor laser, the VCSEL laser has the characteristics of small temperature drift, low threshold value, high optical fiber coupling efficiency, easiness in integration and packaging and the like.

In the actual industry, VCSEL lasers are often used as basic components (e.g., as light sources) and assembled with other devices as modules. For example, when the VCSEL laser is applied to a TOF camera module, the VCSEL laser is assembled with devices such as a circuit board, a bracket, an optical diffraction element, and a metal shield to form a laser projection module of the TOF camera module.

When assembling the VCSEL laser with other devices to form a projection module, an important technical challenge is to stably and precisely mount an optical element for modulating laser light on a laser projection path of the VCSEL laser. For example, in the assembly process of the laser projection module of the TOF camera module as described above, the mounting accuracy of the optical diffraction element with respect to the VCSEL laser greatly affects the performance of the laser projection module.

In the existing packaging products of VCSEL lasers, the relative positional relationship between the VCSEL laser and the optical element is achieved by means of physical positioning and/or structural cooperation. For example, in the laser projection module of the TOF camera module as described above, the relative positional relationship between the optical diffraction element and the VCSEL laser is ensured depending on the mounting accuracy of the bracket on the circuit board and the mounting accuracy of the optical diffraction element on the bracket. However, this solution, which relies on physical positioning and/or structural cooperation, has many drawbacks in practical applications.

First, the positioning accuracy that can be achieved by physical positioning is limited, that is, when the accuracy requirement of the relative positional relationship between the VCSEL laser and the optical element is high, the physical positioning may not meet the application requirements.

Secondly, the realization of physical positioning needs to rely on a specific physical structure, and accordingly, the stability of the physical structure matching will affect the positioning stability. It will be appreciated that, even if no accidental collision occurs with the physical structures, the accuracy of the fit between the physical structures may be reduced over time, affecting the relative positional relationship between the optical element and the VCSEL laser.

In order to improve the stability between the VCSEL laser and the optical element, some manufacturers choose to attach the optical element directly to the laser emitting surface of the VCSEL laser. Although this assembly scheme can improve the stability of the fit between the VCSEL laser and the optical element to some extent, it is still difficult to ensure the positioning and fitting accuracy between the VCSEL laser and the optical element, so that the final product still has difficulty in meeting the performance requirements.

In the actual industry, VCSEL lasers are usually provided by chip manufacturers, and the assembly of VCSEL packaged products is performed by the packaging factories. I.e. from the VCSEL laser to the VCSEL packaging product through two nodes of the industry chain. In addition, in the actual industry, a packaging factory may purchase VCSEL lasers provided by different manufacturers, and meanwhile, problems such as different assembly precision may occur during the assembly process, so that the consistency of the finally formed VCSEL packaging product is difficult to ensure.

Disclosure of Invention

One advantage of the present application is to provide a VCSEL device integrated at a wafer level, wherein the VCSEL device integrates a VCSEL laser unit for forming and emitting laser light and a semiconductor optical structure for modulating laser light emitted from the VCSEL laser unit at the wafer level.

Another advantage of the present application is to provide a VCSEL device integrated at a wafer level, wherein during a fabrication process of the VCSEL device, a relatively precise positioning between the VCSEL laser unit and the optical modulation portion of the semiconductor optical structure is achieved at a wafer level, so that a relatively high positioning precision is achieved between the VCSEL laser unit and the optical modulation portion in the finally formed VCSEL device.

It is yet another advantage of the present application to provide a VCSEL device integrated at a wafer level, wherein the semiconductor optical structure includes at least two semiconductor layer structures stacked on each other, the at least two semiconductor layer structures being made of semiconductor materials doped with metal atoms having different concentrations, wherein a predetermined region of the at least two semiconductor layer structures is oxidized to form the protection portion, and a non-oxidized portion of the at least two semiconductor layer structures forms the optical modulation portion.

It is yet another advantage of the present application to provide a VCSEL device integrated at a wafer level, wherein a protection part covering the optical modulation part is molded at the same time during the process of forming the optical modulation part to protect a structure of the optical modulation part by the protection part. That is, in the embodiment of the present application, the optical modulation section and the protection section are molded in the same process, and the molded protection section can also provide a protection effect for the optical modulation section.

It is yet another advantage of the present application to provide a VCSEL device integrated at a wafer level, wherein the semiconductor optical structure is formed between the base layer and the VCSEL laser unit to provide reinforcement for the overall structural strength of the VCSEL device. Also because of the presence of the semiconductor optical structure, the thickness of the base layer can be relatively reduced to avoid affecting the emission of laser light.

It is yet another advantage of the present application to provide a VCSEL device integrated at a wafer level, wherein the fabrication of the VCSEL device can be done at a chip fabrication facility, improving industrial efficiency.

To achieve at least one of the above advantages or other advantages and objects, according to one aspect of the present application, there is provided a VCSEL device integrated at a wafer level, including:

a base layer;

a VCSEL laser unit comprising: an epitaxial structure, a positive electrode and a negative electrode electrically connected to the epitaxial structure; wherein, epitaxial structure includes from bottom to top in proper order: the LED light source comprises an N-type electric connection layer, an N-DRB layer, an active region, a limiting layer, a P-DBR layer and a P-type electric connection layer, wherein the limiting layer forms a limiting hole used for limiting the light emitting aperture, the positive electrode is electrically connected to the P-type electric connection layer, and the negative electrode is electrically connected to the N-type electric connection layer; wherein the N-DBR layer and the P-DBR layer are configured such that: after the epitaxial structure is turned on, laser light generated by the active region is reflected a plurality of times in a cavity formed between the N-DBR layer and the P-DBR layer and then exits from the N-DBR layer; and

a semiconductor optical structure sandwiched between the base layer and the VCSEL laser units, comprising: and a protection portion covering the optical modulation portion, wherein the optical modulation portion corresponds to the limiting hole and modulates the laser light emitted from the N-DBR layer.

In the VCSEL device integrated at a wafer level according to the present application, the semiconductor optical structure includes at least two semiconductor layer structures stacked on each other, wherein a predetermined region of the at least two semiconductor layer structures is oxidized to form the protection portion, and a portion of the at least two semiconductor layer structures that is not oxidized forms the optical modulation portion.

In a VCSEL device integrated at wafer level according to the present application, the at least two semiconductor layer structures are made of semiconductor materials doped with metal atoms having different concentrations.

In a wafer level integrated VCSEL device according to the present application, the semiconductor material with different concentrations of metal atom doping is selected from one of: GaN, AlN, Al_XGa_1-XAs(x＝0～1)、lnP、Al_XGa_1-XAsSb(x＝0～1)、AlInAs、InGaAsP。

In a VCSEL device integrated at a wafer level according to the present application, the optical modulation section forms a convex lens.

In a VCSEL device integrated at wafer level according to the present application, the concentration of doped metal atoms in the semiconductor material of the at least two semiconductor layer structures increases sequentially from top to bottom.

In a VCSEL device integrated at a wafer level according to the present application, the optical modulation section forms a concave lens.

In a VCSEL device integrated at wafer level according to the present application, the concentration of doped metal atoms in the semiconductor material of the at least two semiconductor layer structures decreases from top to bottom and then increases.

In a VCSEL device integrated at wafer level according to the present application, the base layer is made of a light permeable material.

In a VCSEL device integrated at wafer level according to the present application, the base layer is made of a light permeable semiconductor material.

In the VCSEL device integrated at a wafer level according to the present application, the at least two semiconductor layer structures are integrally formed on the upper surface of the base layer by an epitaxial growth process.

In a VCSEL device integrated at wafer level according to the present application, the confinement layer is an oxidized confinement layer.

In a VCSEL device integrated at the wafer level according to the present application, the confinement layer is an ion confinement layer.

According to another aspect of the present application, there is provided a method of fabricating a VCSEL device, comprising:

forming a semiconductor structure by a semiconductor growth process, wherein the semiconductor structure comprises: the semiconductor device comprises a substrate layer, a first semiconductor layer formed on the upper surface of the substrate layer, and a second semiconductor layer formed on the first semiconductor layer, wherein the first semiconductor layer comprises at least two semiconductor layer structures which are mutually overlapped, the at least two semiconductor layer structures are made of semiconductor materials doped with metal atoms with different concentrations, and the second semiconductor layer sequentially comprises from bottom to top: an N-type electrical connection layer, an N-DRB layer, an active region, a P-DBR layer, and a P-type electrical connection layer, wherein a partial region of an upper surface of the N-type electrical connection layer is exposed to form an electrical connection region;

forming a positive electrode and a negative electrode on the semiconductor structure;

forming a protective layer covering the positive electrode and the negative electrode;

performing oxidation treatment on the first semiconductor layer and the second semiconductor layer so that at least a portion of the P-DBR layer of the second semiconductor layer is oxidized to form a confinement layer over the active region and at least a portion of the first semiconductor layer is oxidized, wherein the confinement layer forms a confinement hole for confining a light emission aperture, the oxidized portion of the first semiconductor layer forms a protective portion, and a non-oxidized portion of the first semiconductor layer forms an optical modulation portion, wherein the optical modulation portion corresponds to the confinement hole; and

exposing the positive electrode and the negative electrode.

In a method of fabricating a VCSEL device according to the present application, a semiconductor structure is formed by a semiconductor growth process, comprising: forming a substrate layer through a semiconductor growth process, overlapping in a first semiconductor layer of the substrate layer and overlapping in an epitaxial processing layer of the first semiconductor layer, wherein the epitaxial processing layer sequentially comprises from bottom to top: an N-type electrical connection layer, an N-DRB layer, an active region, a P-DBR layer, and a P-type electrical connection layer, wherein the entire upper surface of the N-type electrical connection layer is occupied; and removing a portion of the epitaxial processing layer to expose a partial region of the upper surface of the N-type electrical connection layer, wherein the unremoved portion of the epitaxial processing layer forms the second semiconductor layer, the base layer, the first semiconductor layer, and the second semiconductor layer form the semiconductor structure, and the exposed region of the upper surface of the N-type electrical connection layer forms an electrical connection region.

In a method of manufacturing a VCSEL device according to the present application, forming a protective layer that covers the positive electrode and the negative electrode includes: forming a protective layer covering the positive electrode, the negative electrode and the second semiconductor layer; and removing the protective layer covering the second semiconductor layer and reserving the protective layer covering the positive electrode and the negative electrode.

In a method of fabricating a VCSEL device according to the present application, forming a positive electrode and a negative electrode on the semiconductor structure includes: forming the positive electrode on the P-type electric connection layer; and forming the negative electrode on the electrical connection region of the N-type electrical connection layer.

Further objects and advantages of the present application will become apparent from an understanding of the ensuing description and drawings.

These and other objects, features and advantages of the present application will become more fully apparent from the following detailed description, the accompanying drawings and the claims.

Drawings

These and/or other aspects and advantages of the present application will become more apparent and more readily appreciated from the following detailed description of the embodiments of the invention, taken in conjunction with the accompanying drawings of which:

fig. 1 illustrates a schematic diagram of a VCSEL device in accordance with an embodiment of the present application.

Figure 2 illustrates a schematic diagram of a variant implementation of the VCSEL device according to an embodiment of the present application.

Fig. 3 illustrates a flow chart of a method of fabricating the VCSEL device according to an embodiment of the present application.

Fig. 4A illustrates one of the schematic diagrams of a fabrication process of the VCSEL device according to an embodiment of the present application.

Fig. 4B illustrates a second schematic diagram of a fabrication process of the VCSEL device according to an embodiment of the present application.

Fig. 4C illustrates a third schematic diagram of a fabrication process of the VCSEL device according to an embodiment of the present application.

Detailed Description

The terms and words used in the following specification and claims are not limited to the literal meanings, but are used only by the inventors to enable a clear and consistent understanding of the application. Accordingly, it will be apparent to those skilled in the art that the following descriptions of the various embodiments of the present application are provided for illustration only and not for the purpose of limiting the application as defined by the appended claims and their equivalents.

It is understood that the terms "a" and "an" should be interpreted as meaning that a number of one element or element is one in one embodiment, while a number of other elements is one in another embodiment, and the terms "a" and "an" should not be interpreted as limiting the number.

While ordinal numbers such as "first," "second," etc., will be used to describe various components, those components are not limited herein. The term is used only to distinguish one element from another. For example, a first component could be termed a second component, and, similarly, a second component could be termed a first component, without departing from the teachings of the present inventive concept. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, numbers, steps, operations, components, elements, or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, components, elements, or groups thereof.

Summary of the application

As described above, in the existing packaged products of VCSEL lasers, the precision of the fit between the VCSEL laser and the optical element is achieved by means of physical positioning and/or structural fit. However, there are many drawbacks in practical applications depending on the technical solution of physical positioning and/or structural cooperation.

First, the positioning accuracy that can be achieved by physical positioning is limited, that is, when the accuracy requirement of the relative positional relationship between the VCSEL laser and the optical element is high, the physical positioning may not meet the application requirements. Secondly, the realization of physical positioning needs to rely on a specific physical structure, and accordingly, the stability of the physical structure matching will affect the positioning stability.

More specifically, in the process of directly attaching the optical element to the laser emitting surface of the VCSEL laser, since it is difficult to determine the position of the light emitting hole of the VCSEL laser, it is difficult to precisely align the optical element with the light emitting hole of the VCSEL laser in the assembly process, so that the laser performance of the finally molded packaged product of the VCSEL laser is difficult to satisfy the preset requirements.

Moreover, limited by the shape of the optical element, some optical elements have a difficult mounting process, for example, when the optical element is implemented as a concave lens or a convex lens, the mounting surface of the optical element and the VCSEL laser is not flat, and therefore, the mounting process is difficult and it is difficult to ensure the mounting accuracy.

Also, during assembly, the optical element is attached to the laser emitting surface of the VCSEL device using an adhesive such as glue. That is, in the packaging product of the VCSEL laser, an adhesive may also be present between the VCSEL laser and the optical element. It will be appreciated that the optical properties of the laser light generated by the VCSEL laser, after passing through the adhesive between the VCSEL laser and the optical element and reaching the optical element, are affected by the adhesive, resulting in an affected performance of the finally projected laser light modulated by the optical element.

In addition, in the actual industry, the VCSEL laser is usually provided by the chip manufacturer, and the assembly of the VCSEL package product is completed by the package manufacturer. I.e. from the VCSEL laser to the VCSEL packaging product through two nodes of the industry chain. In addition, in the actual industry, a packaging factory may purchase VCSEL lasers provided by different manufacturers, and meanwhile, problems such as different assembly precision may occur during the assembly process, so that the consistency of the finally formed VCSEL packaging product is difficult to ensure.

It is particularly worth mentioning that since the existing packaged products of VCSEL lasers are provided by packaging factories and most packaging factories tend to solve the problems from the packaging point of view when facing the technical problems of the packaged products of VCSEL lasers. This is a technical advantage of the packaging plant and also an involuntary technical blind spot of the packaging plant.

In view of the above technical problems, the present inventors have proposed a technical solution for integrating VCSEL lasers and optical elements at a wafer level based on semiconductor product design and manufacturing processes. In particular, in semiconductor product design, relatively precise positioning between a VCSEL laser and an optical element is achieved at a wafer level, so that the VCSEL laser and the optical element in the finally formed VCSEL device have relatively high positioning precision.

And, since the VCSEL laser and the optical element are configured integrally at a wafer level, there are no other unnecessary components that may affect the laser light between the VCSEL laser and the optical element, so that the VCSEL device can project the laser light modulated by the optical element with relatively high accuracy.

Meanwhile, the preparation of the VCSEL device can be completed in a chip manufacturing factory, and the industrial efficiency is improved. Specifically, during the fabrication process, the optical element can be precisely formed at a predetermined position of the VCSEL laser at a wafer level by an existing semiconductor process.

Based on this, the present application proposes a VCSEL device integrated at the wafer level, comprising: a base layer; a VCSEL laser unit comprising: an epitaxial structure, a positive electrode and a negative electrode electrically connected to the epitaxial structure; wherein, epitaxial structure includes from bottom to top in proper order: the LED light source comprises an N-type electric connection layer, an N-DRB layer, an active region, a limiting layer, a P-DBR layer and a P-type electric connection layer, wherein the limiting layer forms a limiting hole used for limiting the light emitting aperture, the positive electrode is electrically connected to the P-type electric connection layer, and the negative electrode is electrically connected to the N-type electric connection layer; wherein the N-DBR layer and the P-DBR layer are configured such that: after the epitaxial structure is turned on, laser light generated by the active region is reflected a plurality of times in a cavity formed between the N-DBR layer and the P-DBR layer and then exits from the N-DBR layer; and a semiconductor optical structure sandwiched between the base layer and the VCSEL laser units, comprising: and a protection portion covering the optical modulation portion, wherein the optical modulation portion corresponds to the limiting hole and modulates the laser light emitted from the N-DBR layer.

In addition, the present application also provides a method for manufacturing a VCSEL device, which includes: forming a semiconductor structure by a semiconductor growth process, wherein the semiconductor structure comprises: the semiconductor device comprises a substrate layer, a first semiconductor layer formed on the upper surface of the substrate layer, and a second semiconductor layer formed on the first semiconductor layer, wherein the first semiconductor layer comprises at least two semiconductor layer structures which are mutually overlapped, the at least two semiconductor layer structures are made of semiconductor materials doped with metal atoms with different concentrations, and the second semiconductor layer sequentially comprises from bottom to top: an N-type electrical connection layer, an N-DRB layer, an active region, a P-DBR layer, and a P-type electrical connection layer, wherein a partial region of an upper surface of the N-type electrical connection layer is exposed to form an electrical connection region; forming a positive electrode and a negative electrode on the semiconductor structure; forming a protective layer covering the positive electrode and the negative electrode; performing oxidation treatment on the first semiconductor layer and the second semiconductor layer so that at least a portion of the P-DBR layer of the second semiconductor layer is oxidized to form a confinement layer over the active region and at least a portion of the first semiconductor layer is oxidized, wherein the confinement layer forms a confinement hole for confining a light emission aperture, the oxidized portion of the first semiconductor layer forms a protective portion, and a non-oxidized portion of the first semiconductor layer forms an optical modulation portion, wherein the optical modulation portion corresponds to the confinement hole; and exposing the positive electrode and the negative electrode.

Having described the general principles of the present application, various non-limiting embodiments of the present application will now be described with reference to the accompanying drawings.

Schematically integrated VCSEL device at wafer level

As shown in fig. 1, a VCSEL device integrated at a wafer level according to an embodiment of the present application is illustrated, wherein the VCSEL device includes a substrate layer 100, a VCSEL laser unit 200 for forming and emitting laser light, and a semiconductor optical structure 300 integrally formed with the VCSEL laser unit 200 at a wafer level, the semiconductor optical structure 300 includes an optical modulation section 60 and a protection section 70 covering the optical modulation section 60, wherein the optical modulation section 60 of the semiconductor optical structure 300 is disposed on a laser emission path of the VCSEL laser 100 and is configured to modulate laser light emitted from the VCSEL laser unit 200, and the protection section 70 is configured to protect a structure of the optical modulation section 60.

In the example illustrated in fig. 1, the optical modulation part 60 may form an optical element for converging light, such as a convex lens. It should be understood that in other examples of the present application, the optical modulation section 60 may also form an optical element for diverging light rays, such as a concave lens, as shown in fig. 2. Of course, it should be understood that the type of the optical modulation section 60 is not limited in the embodiment of the present application.

Accordingly, when the optical modulation part 60 forms an optical element for converging light, that is, the optical modulation part 60 has a shape of a convex lens, the optical modulation part 60 can reduce a beam divergence angle of laser light emitted from the VCSEL laser unit 200, as shown in fig. 1. When the optical modulation section 60 forms an optical element for diverging light, that is, when the optical modulation section 60 has a shape of a concave lens, the optical modulation section 60 can increase a beam divergence angle emitted from the VCSEL laser unit 200.

As shown in fig. 1 to 2, in the embodiment of the present application, the VCSEL laser unit 200 of the VCSEL device includes an epitaxial structure 10 and a positive electrode 20 and a negative electrode 30 electrically connected to the epitaxial structure 10. Accordingly, the epitaxial structure 10 of the VCSEL laser unit 200 includes, in order from bottom to top: an N-type electrical connection layer 11, an N-DBR layer 12, an active region 13, a confinement layer 14, a P-DBR layer 15, and a P-type electrical connection layer 16, wherein the confinement layer 14 forms a confinement hole 141 for confining the light emission aperture.

The N-DBR layer 12 is made of N-type doped Al with high aluminum content_xGa_1-xAs (x ═ 1-0) and N-doped Al with low aluminum content_xGa_1-xAlternating layers of As (x 1-0), wherein the Al is N-doped and has high aluminum content_xGa_1-xAs and N-doped low aluminum content Al_xGa_1-xAs has different refractive indices to form an N-type Distributed Bragg Reflector (N-DBR). The P-DBR layer 15 is formed of alternating layers of P-type doped high aluminum content AlGaAs and P-type doped low aluminum content AlGaAs, wherein the P-type doped high aluminum content AlGaAs and the P-type doped low aluminum content AlGaAs have different refractive indices to form a P-type Distributed Bragg Reflector (P-DBR). In some examples of the present application, the N-DBR layer 12 and the P-DBR layer 15 may be made of materials even without aluminum content, that is, without aluminum. It is worth mentioning that the choice of material for the alternating layers depends on the desired operating wavelength of the laser, and the optical thickness of the alternating layers is equal to or approximately equal to 1/4 of the operating wavelength of the laser.

In the present embodiment, the active region 13 includes a quantum well (of course, in other examples of the present invention, the active region 13 may include a quantum dot), which may be made of aliningaas (e.g., AlInGaAs, GaAs, AlGaAs, and InGaAs), InGaAsP (e.g., InGaAsP, GaAs, InGaAs, GaAsP, and GaP), GaAsSb (e.g., GaAsSb, GaAs, and GaSb), InGaAsN (e.g., InGaAsN, GaAs, InGaAs, GaAsN, and GaN), or AlInGaAs (e.g., AlInGaAs, AlGaAs, InGaAs, InGaAsP, GaAs, InGaAs, GaAsP, and GaP). Of course, in the embodiment of the present application, the active region 13 may also be made of other compositions for forming a quantum well layer.

As shown in fig. 1 to 2, the active region 13 is sandwiched between the N-DBR layer 12 and the P-DBR layer 15 to form a resonant cavity, wherein photons are repeatedly amplified by being reflected back and forth in the resonant cavity after being excited to form laser oscillation, thereby forming laser light. Those skilled in the art will appreciate that the direction of the laser light can be selectively controlled by the configuration and design of the N-DBR layer 12 and the P-DBR layer 15, for example, to exit from the P-DBR layer 15 (i.e., exit from the top surface of the VCSEL laser unit 200) or to exit from the N-DBR layer 12 (i.e., exit from the bottom surface of the VCSEL laser unit 200).

It is worth mentioning that, in the embodiment of the present application, the N-DBR layer 12 and the P-DBR layer 15 are configured such that: after the epitaxial structure 10 is turned on, the laser light generated from the active region 13 is reflected a plurality of times in the cavity formed between the N-DBR layer 12 and the P-DBR layer 15 and then emitted from the N-DBR layer 12 of the VCSEL laser unit 200. Accordingly, the semiconductor optical structure 300 for modulating laser light emitted from the VCSEL laser unit 200 is disposed below the VCSEL laser unit 200.

Specifically, the semiconductor optical structure 300 is sandwiched between the substrate layer 100 and the VCSEL laser unit 200, and the semiconductor optical structure 300 is integrally formed on the upper surface of the substrate layer 100. The laser light emitted from the N-DBR layer 12 of the epitaxial structure 10 is modulated by the semiconductor optical structure 300 and then emitted from the base layer 100.

Accordingly, in order to reduce the influence of the base layer 100 on the laser performance, the base layer 100 is made of a light-permeable material, and preferably, the light-permeable material of which the base layer 100 is made has good light-permeability. Further, the base layer 100 is made of a light-transmissive semiconductor material, so that the semiconductor optical structure 300 is formed on the base layer 100 by a semiconductor growth process.

In order to improve the light transmittance of the substrate layer 100, the thickness of the substrate layer 100 of the VCSEL laser unit 200 may be reduced appropriately. It should be noted that the thickness of the substrate layer 100 is reduced while ensuring the overall structural strength of the VCSEL laser unit 200.

It is worth mentioning that the semiconductor optical structure 300 is formed between the substrate layer 100 and the VCSEL laser unit 200, which can provide reinforcement for the overall structural strength of the VCSEL device. Also due to the presence of the semiconductor optical structure 300, the thickness of the substrate layer 100 is allowed to be relatively reduced to avoid affecting the emission of laser light.

It is worth mentioning that the N-type electrical connection layer 11 is formed between the N-DBR layer 12 and the semiconductor optical structure 300. Accordingly, the laser generated by the active region 13 exits from the N-DBR layer 12 and then passes through the N-type electrical connection layer 11 to reach the semiconductor optical structure 300. In order to avoid the N-type electrical connection layer 11 from affecting the emission of laser light from the N-DBR layer 12, the N-type electrical connection layer 11 is preferably made of a light-transmissive semiconductor material. Further, it is preferable that the light-transmittable material of which the N-type electric connection layer 11 is made has good light-transmittable property.

In some examples of the present application, the confinement layer 14 may be implemented as an oxidized confinement layer, which is formed over the active region 13 by an oxidation process. In a specific implementation, the oxide confinement layer may be formed as a separate layer over the active region 13. Of course, in other embodiments, the oxidized confinement layer may also be formed above the active region 13 by oxidizing at least a portion of the lower region of the P-DBR layer 15, which is not limited in this application. In other examples of the present application, the confinement layer 14 may also be implemented in other forms, for example, as an ion confinement layer (not shown), which is formed above the active region 13 by an ion implantation process, which is not limited in this application.

During operation, an operating voltage/current is applied to the positive electrode 20 and the negative electrode 30 of the VCSEL laser unit 200 to generate a current in the semiconductor structure. After being turned on, current is restricted from flowing by the confinement layer 14 formed above the active region 13, which is finally introduced into the middle region of the semiconductor structure, so that laser light is generated in the middle region of the active region 13. More specifically, as shown in fig. 1 to fig. 2, in the embodiment of the present application, the confinement layer 14 forms a confinement hole 141 for limiting a light emitting aperture, wherein the confinement layer 14 has a higher resistivity to confine carriers to flow into an intermediate region of the semiconductor corresponding to the confinement hole 141, and the refractive index of the confinement layer 14 is lower to laterally confine the carriers, the carrier and optical lateral confinement increases the density of the carriers and photons in the active region 13, the efficiency of generating light in the active region 13 is improved, and the confinement hole 141 defines the light emitting aperture of the VCSEL laser unit 200.

As described above, in the embodiment of the present application, the VCSEL laser unit 200 includes the positive electrode 20 and the negative electrode 30 electrically connected to the epitaxial structure 10. Specifically, as shown in fig. 1 to 2, in the embodiment of the present application, the positive electrode 20 is electrically connected to the P-type connection layer 16 of the epitaxial structure 10. A partial region of the upper surface of the N-type electrical connection layer 11 of the epitaxial structure 10 is exposed to form an electrical connection region, and the negative electrode 30 is electrically connected to the N-type electrical connection layer 11. It should be noted that, in other examples of the present application, the positive electrode 20 and the negative electrode 30 may also be disposed at other positions of the epitaxial structure 10 or the substrate layer 100, for example, in some examples of the present application, the positive electrode 20 and the negative electrode 30 may be disposed at the same plane, and therefore, the present application is not limited thereto.

It should be understood that, after an operating voltage/current is applied to the positive electrode 20 and the negative electrode 30 of the VCSEL laser unit 200, the active region 13 is excited to generate laser light and the laser light is emitted from the lower surface of the N-DBR layer 12 after being reflected and oscillated between the N-DBR layer 12 and the P-DBR layer 15. Accordingly, as shown in fig. 1 to 2, in the present example, the optical modulation section 60 of the semiconductor optical structure 300 integrally formed with the VCSEL laser unit 200 is located on the emission path of the laser light, and therefore, the optical modulation section 60 can modulate the laser light.

Specifically, in the embodiment of the present application, the semiconductor optical structure 300 is formed on the substrate layer 100 through an epitaxial growth process. The semiconductor optical structure 300 includes at least two semiconductor layer structures 310 stacked on each other, the at least two semiconductor layer structures 310 are made of semiconductor materials doped with metal atoms having different concentrations, wherein a predetermined region of the at least two semiconductor layer structures 310 is oxidized to form the protection portion 70, and a portion of the at least two semiconductor layer structures 310 that is not oxidized forms the optical modulation portion 60.

Accordingly, the at least two semiconductor layer structures 310 are formed on the upper surface of the substrate layer 100 through an epitaxial growth process. Different semiconductor layer structures 310 in the semiconductor optical structure 300 made of semiconductor materials doped with metal atoms with different concentrations have different oxidation rates, so that at least partial regions of the semiconductor optical structure 300 can be oxidized at different oxidation rates through an oxidation process (e.g., a wet oxidation process) to form the protection part 70, and the portions of the semiconductor optical structure 300 that are not oxidized form the optical modulation part 60 with a specific shape. That is, in the process of forming the optical modulation section 60, the protection section 70 is formed to cover the optical modulation section 60, and the protection section 70 protects the optical modulation section 60 to protect the structure of the optical modulation section 60.

It should be noted that, in the embodiment of the present application, the protection part 70 may cover the entire outer surface of the optical modulation part 60, so that the protection part 70 can protect the optical modulation part 60 completely. Of course, in other examples of the present application, the protection portion 70 may cover only at least a portion of the outer surface of the optical modulation portion 60. It should be understood that the semiconductor optical structure 300 may be designed in other structures, and accordingly, the optical modulation unit 60 may be formed in other manners, and the protection unit 70 covering the optical modulation unit 60 may also be formed in other manners, which is not limited by the present application.

In the embodiment of the present application, the semiconductor layer structure 310 is made of a material, i.e., the semiconductor material doped with metal atoms with different concentrations is selected from one of the following materials: GaN, AlN, Al_XGa_1-XAs(x＝0～1)、lnP、Al_XGa_1- _XAsSb(x＝0～1)、AlInAs、InGaAsP。

It should be noted that in the present example, the material of the semiconductor optical structure 300 is similar to (or identical to) the material of the substrate layer 100, and therefore, the fabrication and forming process of the semiconductor optical structure 300 can be completed based on the existing mature semiconductor process. The forming position of the optical modulation portion 60 of the semiconductor optical structure 300 can be controlled more precisely by the distribution of the concentration of the metal atoms in the material of the semiconductor layer structure 310, so that the optical modulation portion 60 is formed at the preset position of the VCSEL laser unit 200 precisely at the wafer level, specifically, the optical modulation portion 60 corresponds to the limiting hole 141 for limiting the light emitting aperture of the VCSEL laser unit 200.

Accordingly, parameters such as the size and shape of the optical modulation section 60 of the semiconductor optical structure 300 can be controlled more precisely by the concentration of metal atoms in the material of the semiconductor layer structure 310. As shown in fig. 1, when the optical modulation part 60 forms a convex lens for converging light rays, the concentration of the metal atoms doped in the semiconductor material of the at least two semiconductor layer structures 310 increases sequentially from top to bottom. Accordingly, in the oxidation process, the more the semiconductor layer structures 200 having high metal atom concentration are oxidized, that is, the oxidation regions of the at least two semiconductor layer structures 200 increase sequentially from top to bottom, and thus, the portions thereof that are not oxidized can form the optical modulation part 60 having a convex lens shape.

Accordingly, as shown in fig. 2, when the optical modulation part 60 forms a concave lens for diverging light, the concentration of the metal atoms doped in the semiconductor material of the at least two semiconductor layer structures 310 decreases from top to bottom and then increases. Accordingly, in the oxidation process, the more the semiconductor layer structure 200 with high metal atom concentration is oxidized, i.e., the oxidized regions of the at least two semiconductor layer structures 200 decrease from top to bottom and then increase, so that the portions thereof that are not oxidized can form the optical modulation part 60 with a concave lens shape. Further, the size of the beam divergence angle of the laser light emitted from the VCSEL laser unit 200 can be controlled by adjusting the distribution of the metal concentration of the semiconductor material of the semiconductor layer structure 310.

In summary, the VCSEL device based on the embodiment of the present application is illustrated, which integrates the VCSEL laser unit 200 and the semiconductor optical structure 300 for modulating the laser light emitted from the VCSEL laser unit 200 on a wafer level. Also, the VCSEL device may adjust the optical performance of the VCSEL device by adjusting the parameter configuration of the optical modulation unit 60, which is not limited in this application.

Preparation method of illustrative VCSEL device

According to another aspect of the present application, there is also provided a method of fabricating a VCSEL device, which is used to fabricate the VCSEL device as described above.

Fig. 3 illustrates a flow chart of a method of fabricating the VCSEL device according to an embodiment of the present application. As shown in fig. 3, a method for manufacturing a VCSEL device according to an embodiment of the present application includes: s110, forming a semiconductor structure through a semiconductor growth process, wherein the semiconductor structure comprises: the semiconductor device comprises a substrate layer, a first semiconductor layer formed on the upper surface of the substrate layer, and a second semiconductor layer formed on the first semiconductor layer, wherein the first semiconductor layer comprises at least two semiconductor layer structures which are mutually overlapped, the at least two semiconductor layer structures are made of semiconductor materials doped with metal atoms with different concentrations, and the second semiconductor layer sequentially comprises from bottom to top: an N-type electrical connection layer, an N-DRB layer, an active region, a P-DBR layer, and a P-type electrical connection layer, wherein a partial region of an upper surface of the N-type electrical connection layer is exposed to form an electrical connection region; s120, forming a positive electrode and a negative electrode on the semiconductor structure; s130, forming a protective layer wrapping the positive electrode and the negative electrode; s140, performing an oxidation process on the first semiconductor layer and the second semiconductor layer, so that at least a portion of the P-DBR layer of the second semiconductor layer is oxidized to form a confinement layer located above the active region and at least a portion of the first semiconductor layer is oxidized, wherein the confinement layer forms a confinement hole for confining a light emitting aperture, the oxidized portion of the first semiconductor layer forms a protection portion, and the unoxidized portion of the first semiconductor layer forms an optical modulation portion, wherein the optical modulation portion corresponds to the confinement hole; and, S150 exposing the positive electrode and the negative electrode.

Fig. 4A to 4C illustrate a schematic diagram of a fabrication process of the VCSEL device according to an embodiment of the present application. As shown in fig. 4A, in step S110, a semiconductor structure 700 is formed through a semiconductor growth process. Specifically, the process of forming the semiconductor structure 700 includes: firstly, forming a base layer 100, a first semiconductor layer 400 stacked on the base layer, and an epitaxial processing layer 500 stacked on the first semiconductor layer 400 by a semiconductor growth process; next, a portion of the epitaxial processing layer 500 is removed to form the second semiconductor layer 600, and further, the base layer 100, the first semiconductor layer 400, and the second semiconductor layer 600 form the semiconductor structure 700.

Accordingly, the step S120 includes: s210, forming a substrate layer, a first semiconductor layer stacked on the substrate layer and an epitaxial processing layer stacked on the first semiconductor layer through a semiconductor growth process, wherein the epitaxial processing layer sequentially comprises from bottom to top: an N-type electrical connection layer, an N-DRB layer, an active region, a P-DBR layer, and a P-type electrical connection layer, wherein the entire upper surface of the N-type electrical connection layer is occupied; and S220, removing a part of the epitaxial processing layer to expose a partial region of the upper surface of the N-type electric connection layer, wherein the unremoved part of the epitaxial processing layer forms the second semiconductor layer, the base layer, the first semiconductor layer and the second semiconductor layer form the semiconductor structure, and the exposed region of the upper surface of the N-type electric connection layer forms an electric connection region.

Specifically, in step S210, a base layer 100, a first semiconductor layer 400 stacked on the base layer 100, and an epitaxial processing layer 500 stacked on the first semiconductor layer are formed through a semiconductor growth process, wherein the epitaxial processing layer 500 sequentially includes, from bottom to top: an N-type electrical connection layer 11, an N-DRB layer 12, an active region 13, a P-DBR layer 15, and a P-type electrical connection layer 16, wherein the entire upper surface of the N-type electrical connection layer is occupied.

Preferably, the base layer 100 is made of a light-permeable semiconductor material, and preferably, the light-permeable semiconductor material making up the base layer 100 has good light permeability to reduce the influence of the base layer 100 on the laser performance.

It is worth mentioning that the semiconductor optical structure 300 is formed between the substrate layer 100 and the VCSEL laser unit 200, which can provide reinforcement for the overall structural strength of the VCSEL device. Also due to the presence of the semiconductor optical structure 300, the thickness of the substrate layer 100 can be relatively reduced to avoid affecting the emission of laser light. Specifically, the substrate layer 100 having a predetermined thickness may be obtained by controlling semiconductor growth process parameters, or a portion of the formed substrate layer may be removed to obtain the substrate layer 100 having a predetermined thickness.

The first semiconductor layer 400 is integrally formed on the upper surface of the substrate layer 100 through a mature semiconductor growth process (e.g., a metal vapor deposition process and/or a metal vapor deposition process). The epitaxial processing layer 500 is integrally formed on the upper surface of the first semiconductor layer 400 through a semiconductor growth process, and the epitaxial processing layer 500 includes the at least two semiconductor layer structures 310 stacked on each other, and the at least two semiconductor layer structures 310 are made of a material selected from the following semiconductor materials doped with metal atoms at different concentrations: GaN, AlN, Al_XGa_1-XAs(x＝0～1)、lnP、Al_XGa_1-XAsSb(x＝0～1)、AlInAs、InGaAsP。

The N-type electrical connection layer 11, the N-DRB layer 12, the active region 13, the P-DBR layer 15, and the P-type electrical connection layer 16 of the epitaxial processing layer 500 are stacked on each other. The N-DRB layer 12 is stacked on the entire upper surface of the N-type electric connection layer 11, that is, the entire upper surface of the N-type electric connection layer 11 is occupied.

In step S220, a portion of the epitaxial processing layer 500 is removed to expose a partial region of the upper surface of the N-type electrical connection layer 11, wherein the unremoved portion of the epitaxial processing layer 500 forms the second semiconductor layer 600, the base layer 100, the first semiconductor layer 400 and the second semiconductor layer 600 form the semiconductor structure 700, and the exposed region of the upper surface of the N-type electrical connection layer 11 forms the electrical connection region 101.

Specifically, at least a portion of the epitaxial processing layer 500 may be removed by an etching process. Accordingly, after removing a portion of the epitaxial processing layer 500, a partial region of the upper surface of the N-type electrical connection layer 11 is exposed, and the electrical connection region 101 is formed, so that an electrode is formed on the electrical connection region 101 of the N-type electrical connection layer 11. The remaining portion of the epitaxial layer 500 forms the second semiconductor layer 600, and the base layer 100, the first semiconductor layer 400, and the second semiconductor layer 600 form the semiconductor structure 700.

As shown in fig. 4B, the process of forming the positive electrode 20 and the negative electrode 30 on the semiconductor structure 700 includes, first, forming the positive electrode 20 on the P-type electrical connection layer 16; next, the negative electrode 30 is formed on the electrical connection region 101 of the N-type electrical connection layer 11. More specifically, the positive electrode 20 may be disposed on the upper surface of the P-type electrical connection layer 16 of the second semiconductor layer 600 through an electroplating process, and the negative electrode 30 may be disposed on the electrical connection region 101 of the N-type electrical connection layer 11. Of course, the positive electrode 20 and the negative electrode 30 may be disposed by other processes, and the application is not limited thereto. It should also be understood that the positive electrode 20 and the negative electrode 30 may be disposed at other positions of the semiconductor structure 700, and the application is not limited thereto.

It is noted that the positive electrode 20 and the negative electrode 30 may be formed simultaneously or sequentially, for example, the positive electrode 20 may be formed on the upper surface of the P-type electrical connection layer 16 of the epitaxial processing layer 500 before step S220, i.e., before removing a portion of the epitaxial processing layer 500. Accordingly, after the step S220, after a portion of the epitaxial process layer 500 is removed, the negative electrode 30 is formed on the N-type electrical connection layer 11 of the epitaxial process layer 500. For example, after step S220, the positive electrode 20 may be first formed on the P-type electrical connection layer 16 of the epitaxial processing layer 500, and then the negative electrode 30 may be formed on the N-type electrical connection layer 11 of the epitaxial processing layer 500, which is not limited in this application.

It should be noted that after forming the positive electrode 20 and the negative electrode 30 on the second semiconductor layer 600 of the semiconductor structure 700, in order to avoid the oxidation of the positive electrode 20 and the negative electrode 30 during the oxidation process, before performing the oxidation process on the first semiconductor layer 400 and the second semiconductor layer 600 of the semiconductor structure 700, a protection layer 800 wrapping the positive electrode 20 and the negative electrode 30 is required to protect the structure and performance of the positive electrode 20 and the negative electrode 30 from being damaged.

Accordingly, as shown in fig. 4B, in the embodiment of the present application, the process of forming the protective layer 800 covering the positive electrode 20 and the negative electrode 30 includes: forming a protective layer covering the positive electrode 20, the negative electrode 30, and the second semiconductor layer 600; and removing the protective layer 800 covering the second semiconductor layer 600 and leaving the protective layer 800 covering the positive electrode 20 and the negative electrode 30.

Specifically, the protective layer 800 may be formed on the surface of the positive electrode 20, the surface of the negative electrode 30, and the surface of the second semiconductor layer 600 through a conductor growth process. The protective layer 800 may be removed by an etching process to facilitate an oxidation process of the second semiconductor layer 600, and damage to the positive electrode 20 and the negative electrode 30 due to the oxidation process may be prevented.

As shown in fig. 4C, after the oxidation treatment is performed on the first semiconductor layer and the second semiconductor layer, at least a portion of the P-DBR layer 15 of the second semiconductor layer 600 is oxidized to form a confinement layer 14 located above the active region 13 and to oxidize at least a portion of the first semiconductor layer 400, wherein the confinement layer 14 forms a confinement hole 141 for confining a light emitting aperture, the oxidized portion of the first semiconductor layer 400 forms a protection portion 70, and the unoxidized portion of the first semiconductor layer 400 forms an optical modulation portion 60, wherein the optical modulation portion 60 corresponds to the confinement hole 141.

It is worth mentioning that when the confinement layer 14 is implemented as an oxidized confinement layer, the confinement layer 14 may be formed by oxidizing at least a portion of the P-DBR layer 16 of the second semiconductor layer 600. That is, in the manufacturing method of the present application, the first semiconductor layer 400 and the second semiconductor layer 600 may be simultaneously subjected to oxidation treatment to simultaneously form the optical modulation section 60 and the oxidation restriction layer 14. Of course, the first semiconductor layer 400 and the second semiconductor layer 600 may be oxidized in sequence, for example, the second semiconductor layer 600 is oxidized first, and then the first semiconductor layer 400 is oxidized.

In step S140, in the process of oxidizing the first semiconductor layer 400, at least a portion of the first semiconductor layer 400 is oxidized, wherein the oxidized portion of the first semiconductor layer 400 forms the protection portion 70, and the unoxidized portion of the first semiconductor layer 400 forms the optical modulation portion 60.

Specifically, different semiconductor layer structures 310 in the first semiconductor layer 400 made of semiconductor materials doped with metal atoms with different concentrations have different oxidation rates, so that at least partial regions of the first semiconductor layer 400 are oxidized at different oxidation rates, wherein the non-oxidized portions of the first semiconductor layer 400 have a specific shape to form the optical modulation section 60 corresponding to the limiting hole 141, and the oxidized portions of the first semiconductor layer 400 form the protection section 70 covering the optical modulation section 60.

It should be noted that, according to the predetermined shape of the optical modulation section 60 and the concentration distribution of the metal atoms of the material of the semiconductor layer structure 310 at the predetermined position of the second semiconductor layer 600, at least a portion of the first semiconductor layer 400 is oxidized at different oxidation rates, and further, the portion that is not oxidized in the formation of the optical modulation section 60 is formed into the predetermined shape at the predetermined position (corresponding to the limiting hole 141) of the epitaxial structure 10.

It should be noted that the metal concentration gradient of the material (i.e., the semiconductor material doped with the metal atoms having different concentrations) of the adjacent semiconductor layer structures 310 is not too large. In this way, the difference in the oxidation rate of each of the semiconductor layer structures 310 is small, and the edges of the oxidized regions of each of the semiconductor layer structures 310 smoothly transition to each other, and accordingly, the edges of the regions of each of the semiconductor layer structures 310 that are not oxidized smoothly transition to each other, so that the shape of the optical modulator 60 to be formed can be controlled more precisely.

In particular, in the process of performing the oxidation treatment on the first semiconductor layer 400 through the oxidation process (e.g., the wet oxidation process), the protection part 70 covering the optical modulation part 60 is simultaneously molded when the optical modulation part 60 is formed, so that the structure of the optical modulation part 60 is protected by the protection part 70. That is, in the embodiment of the present application, the optical modulation section 60 and the protection section 70 are molded in the same process, and the molded protection section 70 can also provide a protection effect for the optical modulation section 60.

It is worth mentioning that the thickness of the protection part 70 can be controlled by designing the concentration distribution of the metal atoms of the material of which the semiconductor layer structure 310 is made and the thickness of the first semiconductor layer 400. It should be understood that the protection portion 70 may be first removed by an etching process, and then a new protection portion 70 having a predetermined thickness range may be formed on the surface of the optical modulation portion 60 by an oxidation process or other processes.

In step S150, the positive electrode and the negative electrode are exposed. Specifically, as shown in fig. 4C, when the positive electrode 20 and the negative electrode 30 are covered by the protective layer 800, the positive electrode 20 and the negative electrode 30 cannot be electrically connected to other devices. To this end, electrical connection of the VCSEL device to other devices through the positive electrode 20 and the negative electrode 30 may be facilitated by removing at least a portion of the protective layer 800 on the surface of the positive electrode 20 and the negative electrode 30 such that the positive electrode 20 and the negative electrode 30 are exposed. For example, a partial region of the protective layer 800 is removed through an etching process to form a first channel that can electrically connect the positive electrode 20 and a second channel that can electrically connect the negative electrode 30 in the protective layer 800, or the protective layer 800 is entirely removed through an etching process to expose the positive electrode 20 and the negative electrode 30. It is worth mentioning that the damage to the positive electrode 20 and the negative electrode 30 should be avoided as much as possible in the process of removing the protective layer 800 by etching process.

In summary, a method for manufacturing a VCSEL device according to an embodiment of the present application is illustrated, which relatively precisely shapes the optical modulation part 60 for modulating the VCSEL laser unit 200 at a predetermined position of the VCSEL laser unit 200 on a wafer level through an oxidation process.

The foregoing describes the general principles of the present application in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present application are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present application. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the foregoing disclosure is not intended to be exhaustive or to limit the disclosure to the precise details disclosed.

Claims

1. A VCSEL device integrated at a wafer level, comprising:

a base layer;

a VCSEL laser unit comprising: an epitaxial structure, a positive electrode and a negative electrode electrically connected to the epitaxial structure; wherein, epitaxial structure includes from bottom to top in proper order: the LED light source comprises an N-type electric connection layer, an N-DBR layer, an active region, a limiting layer, a P-DBR layer and a P-type electric connection layer, wherein the limiting layer forms a limiting hole used for limiting the light emitting aperture, the positive electrode is electrically connected to the P-type electric connection layer, and the negative electrode is electrically connected to the N-type electric connection layer; wherein the N-DBR layer and the P-DBR layer are configured such that: after the epitaxial structure is turned on, laser light generated by the active region is reflected a plurality of times in a cavity formed between the N-DBR layer and the P-DBR layer and then exits from the N-DBR layer; and

2. The wafer level integrated VCSEL device of claim 1, wherein the semiconductor optical structure comprises at least two semiconductor layer structures stacked on top of each other, wherein a predetermined region of the at least two semiconductor layer structures is oxidized to form the protection portion, and a portion of the at least two semiconductor layer structures that is not oxidized forms the optical modulation portion.

3. A VCSEL device integrated at the wafer level in accordance with claim 2, wherein the at least two semiconductor layer structures are made of semiconductor materials doped with different concentrations of metal atoms.

4. A VCSEL device integrated at a wafer level in accordance with claim 3, wherein the semiconductor material having different concentrations of metal atom doping is selected from one of: GaN, AlN, Al_XGa_1-XAs(x＝0～1)、lnP、Al_XGa_1- _XAsSb(x＝0～1)、AlInAs、InGaAsP。

5. A VCSEL device integrated at the wafer level in accordance with claim 3, wherein the optical modulating portion forms a convex lens.

6. The wafer level integrated VCSEL device of claim 5, wherein a concentration of doped metal atoms in the semiconductor material of the at least two semiconductor layer structures increases sequentially from top to bottom.

7. A VCSEL device integrated at the wafer level in accordance with claim 3, wherein the optical modulating portion forms a concave lens.

8. The wafer level integrated VCSEL device of claim 7, wherein a concentration of doped metal atoms in the semiconductor material of the at least two semiconductor layer structures decreases and then increases from top to bottom.

9. A VCSEL device integrated at the wafer level in accordance with claim 3, wherein the base layer is made of a light permeable material.

10. A VCSEL device integrated at the wafer level in accordance with claim 9, wherein the base layer is made of a light transmissive semiconductor material.

11. The wafer level integrated VCSEL device of claim 10, wherein the at least two semiconductor layer structures are integrally formed on an upper surface of the base layer by an epitaxial growth process.

12. A wafer level integrated VCSEL device in accordance with claim 1, wherein said confinement layer is an oxidized confinement layer.

13. A wafer level integrated VCSEL device in accordance with claim 1, wherein said confinement layer is an ion confinement layer.