CN215069957U - MOSFET chip structure - Google Patents

Abstract

The embodiment of the application discloses MOSFET chip structure, this MOSFET chip structure includes arc base island and MOSFET bare chip, and one side of the drain electrode of MOSFET bare chip is bonded on the arc base island, and the edge of arc base island extends to source electrode and gate electrode one side of MOSFET bare chip. The tail end of the arc-shaped base island is equivalent to the extension of the drain electrode and can be positioned at the same side with the source electrode and the gate electrode, so that the MOSFET chip structure is conveniently welded on a PCB (printed circuit board), the MOSFET chip structure has no routing process, the packaging is simple and quick, and the risk of a crater in the routing process is avoided; and the distance of the source electrode of the MOSFET chip structure contacting the PCB is shortened, so that the on-resistance can be obviously reduced.

Description

MOSFET chip structure

Technical Field

The application relates to the field of semiconductor devices, in particular to a MOSFET chip structure and a preparation method thereof.

Background

With the continuous development of the electronic industry, more and more devices are integrated on a Printed Circuit Board (PCB), and therefore, the miniaturization of a single device has become an inevitable trend in the development of the device packaging process.

In the conventional package of the MOSFET product, leads such as aluminum wires are generally used to lead electrodes in a semiconductor chip to pins for soldering, so as to achieve electrical connection. However, such a wire bonding process is complicated and has a risk of cratering.

SUMMERY OF THE UTILITY MODEL

It is an object of the present application to provide a MOSFET chip structure that can improve the above-mentioned problems.

The embodiment of the application is realized as follows:

in a first aspect, the present application provides a MOSFET chip structure, comprising:

the MOSFET comprises an arc-shaped base island and an MOSFET bare chip;

the MOSFET bare chip comprises a first surface and a second surface which are opposite, a source electrode and a gate electrode of the MOSFET bare chip are arranged on the first surface, a drain electrode of the MOSFET bare chip is arranged on the second surface, and the drain electrode is bonded on the front surface of the arc-shaped base island; the tail end of the arc-shaped base island extends to the first surface of the MOSFET bare chip in the direction away from the back surface of the arc-shaped base island.

It can be understood that the application discloses a MOSFET chip structure, and this MOSFET chip structure includes arc base island and MOSFET bare chip, and the drain electrode side of MOSFET bare chip is bonded on arc base island, and the edge of arc base island extends to source electrode and gate electrode side of MOSFET bare chip. The tail end of the arc-shaped base island is equivalent to the extension of the drain electrode and can be positioned at the same side with the source electrode and the gate electrode, so that the MOSFET chip structure is conveniently welded on a PCB (printed circuit board), the MOSFET chip structure has no routing process, the packaging is simple and quick, and the risk of popping pits in the routing process is avoided; and the distance of the source electrode of the MOSFET chip structure contacting the PCB is shortened, so that the on-resistance can be obviously reduced.

In an alternative embodiment of the present application, the end of the arc-shaped base island is an extended drain of the MOSFET chip structure; the extended drain is a distance from the second surface of the MOSFET die equal to a distance from the first surface of the MOSFET die to the second surface of the MOSFET die.

It will be appreciated that the extended drain area is spaced from the front surface by a distance equal to the distance from the first surface to the front surface, and thus the extended drain area and the first surface may be coplanar for interfacing with a PCB when the MOSFET die structure is soldered to the PCB. The source electrode, the gate electrode and the extension drain electrode in the MOSFET chip structure are respectively welded with the PCB through solders to realize electric connection.

In an alternative embodiment of the present application, the direction from the second surface to the first surface is a main direction;

the MOSFET bare chip comprises the drain electrode, a silicon-based main body, an oxide layer and an insulating layer which are sequentially stacked along the main direction;

the oxide layer correspondingly forms a source through hole and a grid through hole at the source and the grid in the silicon-based main body; the source electrode is formed by filling metal materials in the source through hole; the gate through hole is also filled with a metal material to form the gate electrode;

the insulating layer forms a source groove and a gate groove in the orthographic projection area of the source electrode and the gate electrode; the source electrode is exposed out of the bottom of the source groove, and the gate electrode is exposed out of the bottom of the gate groove.

In an alternative embodiment of the present application, the source via hole and the gate via hole are filled with a metal material, which is an aluminum material.

In an alternative embodiment of the present application, the insulating layer includes a Polyamide (PA) layer and a Polyimide resin (PI) layer sequentially stacked in the main direction.

The beneficial effect of this application:

the application discloses a MOSFET chip structure. The MOSFET chip structure comprises an arc-shaped base island and an MOSFET bare chip, wherein one side of a drain electrode of the MOSFET bare chip is bonded on the arc-shaped base island, and the edge of the arc-shaped base island extends towards one side of a source electrode and a gate electrode of the MOSFET bare chip. The arc-shaped base island is equivalent to the extension of the drain electrode and can be positioned at the same side with the source electrode and the gate electrode, so that the MOSFET chip structure is convenient to be welded on a PCB. The MOSFET chip structure has no routing process, is simple and quick to package, and avoids the risk of popping pits in the routing process; and the distance of the source electrode of the MOSFET chip structure contacting the PCB is shortened, so that the on-resistance can be obviously reduced.

To make the aforementioned objects, features and advantages of the present application more comprehensible, alternative embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.

FIG. 1 is a schematic diagram of a MOSFET chip structure provided herein;

FIG. 2 is a schematic diagram of the MOSFET chip structure shown in FIG. 1 soldered to a PCB;

fig. 3 to 7 are schematic views of the MOSFET chip structure shown in fig. 1 and steps of the method for manufacturing the same.

Reference numerals:

the semiconductor device includes an arc-shaped base island 11, a front surface 101, a back surface 102, the arc-shaped base island 11, an extended drain 110, a MOSFET bare chip 20, a first surface 201, a second surface 202, a source electrode 21, a gate electrode 22, a drain electrode 23, a silicon-based body 24, an oxide layer 25, an insulating layer 26, a polyamide layer 261, a polyimide resin layer 262, a PCB 30, a support layer 50, a blue film 60, and a wafer 70.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In a first aspect, as shown in fig. 1, the present application provides a MOSFET chip structure, comprising: an arcuate base island 11 and a MOSFET die 20.

The MOSFET bare chip 20 comprises a first surface 201 and a second surface 202 which are opposite, the first surface 201 is provided with a source electrode 21 and a gate electrode 22 of the MOSFET bare chip 20, and the second surface 202 is provided with a drain electrode 23 of the MOSFET bare chip 20; the drain electrode 23 on the second surface 202 is bonded to the front surface 101. The end of the arc-shaped base island 11 extends to the first surface 201 of the MOSFET die 20 in a direction away from the back surface 102 of the arc-shaped base island 11.

It can be understood that the present application discloses a MOSFET chip structure, which includes an arc-shaped base island 11 and a MOSFET die 20, wherein the drain electrode 23 side of the MOSFET die 20 is bonded on the arc-shaped base island 11, and the edge of the arc-shaped base island 11 extends to the source electrode 21 and the gate electrode 22 side of the MOSFET die 20 to form the arc-shaped base island 11. The arc-shaped base island 11 corresponds to the extension of the drain electrode 23 and can be on the same side as the source electrode 21 and the gate electrode 22, so as to facilitate the soldering of the MOSFET chip structure on the PCB 30, as shown in fig. 2. The MOSFET chip structure has no routing process, is simple and quick to package, and avoids the risk of popping pits in the routing process; and the distance of the source electrode 21 of the MOSFET chip structure contacting the PCB 30 is shortened, so that the on-resistance can be obviously reduced.

In an alternative embodiment of the present application, the arc-shaped base island 11 terminates with an extended drain 110 of the MOSFET chip structure; the extended drain 110 is located a distance from the second surface 202 of the MOSFET die 20 that is equal to a distance from the first surface 201 of the MOSFET die 20 to the second surface 202 of the MOSFET die 20.

It is understood that the distance from the extended drain 110 to the second surface 202 is equal to the distance from the first surface 201 to the second surface 202, so that the extended drain 110 and the first surface 201 can be in the same plane to interface with the PCB 30 when the MOSFET chip structure is soldered on the PCB 30. As shown in fig. 2, the source electrode 21, the gate electrode 22 and the extended drain 110 in the MOSFET chip structure are electrically connected by being soldered to the PCB board 30 by solder, respectively.

As shown in fig. 1, in an alternative embodiment of the present application, the direction from the second surface 202 to the first surface 201 is the main direction (as shown in the X direction of fig. 1); the MOSFET die 20 includes a drain electrode 23, a silicon-based body 24, an oxide layer 25, and an insulating layer 26, which are sequentially stacked in a main direction.

The oxide layer 25 forms source and gate vias at the source and gate, respectively, in the silicon-based body 24; the source through hole is filled with a metal material to form a source electrode 21; the gate via is also filled with a metal material to form a gate electrode 22.

The insulating layer 26 forms a source groove and a gate groove in the orthographic projection area of the source electrode 21 and the gate electrode 22; the source electrode 21 exposes the bottom of the source recess, and the gate electrode 22 exposes the bottom of the gate recess.

In an alternative embodiment of the present application, the drain electrode 23 is a bonding material containing a metal component; the source through hole and the gate through hole are filled with aluminum materials.

In the embodiment of the present application, the drain electrode 23 may be a bonding material containing a silver component, and the bonding material containing a metal component may further contain solder to facilitate increase in adhesion and increase in conductivity of the thin film.

In an alternative embodiment of the present application, the insulating layer 26 includes a Polyamide (PA) layer 261 and a Polyimide resin (PI) layer 262 sequentially stacked in a main direction.

In a second aspect, the present application provides a method for preparing a MOSFET chip structure, the method being used for preparing any one of the MOSFET chip structures of the first aspect, the method comprising:

41. a support layer 50 is provided, and the drain electrodes 23 of the MOSFET dies 20 are adhered to the support layer 50.

As shown in fig. 6, a plurality of MOSFET die 20 are attached to a support layer 50.

42. A plurality of arcuate base islands 11 are provided as shown in fig. 7.

43. One MOSFET die 20 is transferred from the support layer 50 onto the arcuate base island 11.

44. The drain electrode 23 is bonded to the front surface 101 of the arc-shaped base island as shown in fig. 1.

Wherein, step 41 may specifically include the following steps:

411. a wafer 70 is provided, the wafer 70 comprising a silicon-based body 24, an oxide layer 25 and an insulating layer 26, which are sequentially stacked, as shown in fig. 3.

412. A drain electrode 23 is formed on the surface of the silicon based body 24 facing away from the insulating layer 26, as shown in fig. 5.

In the embodiment of the present application, the drain electrode 23 may be formed by spin-coating a conductive layer on the surface of the silicon-based body 24 facing away from the insulating layer 26.

413. The drain electrode 23 side of the wafer 70 is attached to the support layer 50 as shown in fig. 6.

The material of the support layer 50 may be selected from any single-layer structure capable of providing a flat surface, which is a blue film commonly used in the field of packaging in this embodiment, and may also be a silicon wafer 70 or a glass sheet in other embodiments, or even a flat plate made of a metal material such as stainless steel.

414. The wafer 70 and the drain electrode 23 on the support layer 50 are diced to obtain a plurality of MOSFET dies 20, as shown in fig. 6.

In an alternative embodiment of the present application, after providing a wafer 70 in step 411, before fabricating drain electrode 23 on the surface of silicon base body 24 facing away from insulating layer 26 in step 412, the method further includes: the insulating layer 26 side of the wafer 70 is attached to the blue film 60 as shown in fig. 4.

In an alternative embodiment of the present application, after the step 412 "fabricating the drain electrode 23 on the surface of the silicon-based body 24 facing away from the insulating layer 26", before the step 413 "attaching the drain electrode 23 side of the wafer 70 to the supporting layer 50", the method further includes: the thickness of the blue film 60 is reduced until removed.

The embodiments in the present application are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments. Especially, as for the device, apparatus and medium type embodiments, since they are basically similar to the method embodiments, the description is simple, and the related points may refer to part of the description of the method embodiments, which is not repeated here.

Thus, particular embodiments of the present subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may be advantageous.

The expressions "first", "second", "said first" or "said second" used in various embodiments of the present disclosure may modify various components regardless of order and/or importance, but these expressions do not limit the respective components. The above description is only configured for the purpose of distinguishing elements from other elements. For example, the first user equipment and the second user equipment represent different user equipment, although both are user equipment. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure.

When an element (e.g., a first element) is referred to as being "operably or communicatively coupled" or "connected" (operably or communicatively) to "another element (e.g., a second element) or" connected "to another element (e.g., a second element), it is understood that the element is directly connected to the other element or the element is indirectly connected to the other element via yet another element (e.g., a third element). In contrast, it is understood that when an element (e.g., a first element) is referred to as being "directly connected" or "directly coupled" to another element (a second element), no element (e.g., a third element) is interposed therebetween.

The above description is only an alternative embodiment of the application and is illustrative of the technical principles applied. It will be appreciated by those skilled in the art that the scope of the invention herein disclosed is not limited to the particular combination of features described above, but also encompasses other arrangements formed by any combination of the above features or their equivalents without departing from the spirit of the invention. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.

The foregoing is illustrative of only alternative embodiments of the present application and is not intended to limit the present application, which may be modified or varied by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (5)

1. A MOSFET chip structure, comprising:

the MOSFET comprises an arc-shaped base island and an MOSFET bare chip;

the MOSFET bare chip comprises a first surface and a second surface which are opposite, a source electrode and a gate electrode of the MOSFET bare chip are arranged on the first surface, a drain electrode of the MOSFET bare chip is arranged on the second surface, and the drain electrode is bonded on the front surface of the arc-shaped base island; the tail end of the arc-shaped base island extends to the first surface of the MOSFET bare chip in the direction away from the back surface of the arc-shaped base island.

2. The MOSFET chip structure of claim 1,

the tail end of the arc-shaped base island is an extended drain electrode of the MOSFET chip structure;

the extended drain is a distance from the second surface of the MOSFET die equal to a distance from the first surface of the MOSFET die to the second surface of the MOSFET die.

3. The MOSFET chip structure of claim 2,

the direction from the second surface to the first surface is a main direction;

the MOSFET bare chip comprises the drain electrode, a silicon-based main body, an oxide layer and an insulating layer which are sequentially stacked along the main direction;

the oxide layer correspondingly forms a source through hole and a grid through hole at the source and the grid in the silicon-based main body; the source electrode is formed by filling metal materials in the source through hole; the gate through hole is also filled with a metal material to form the gate electrode;

the insulating layer forms a source groove and a gate groove in the orthographic projection area of the source electrode and the gate electrode; the source electrode is exposed out of the bottom of the source groove, and the gate electrode is exposed out of the bottom of the gate groove.

4. The MOSFET chip structure of claim 3,

and the source electrode through hole and the grid electrode through hole are filled with aluminum materials.

5. The MOSFET chip structure of claim 3,

the insulating layer includes a polyamide layer and a polyimide resin layer that are stacked in order along the main direction.

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