CN213876403U

CN213876403U - Control circuit and electronic product

Info

Publication number: CN213876403U
Application number: CN202120269183.2U
Authority: CN
Inventors: 朱叶玲
Original assignee: Yisheng Xiamen Technology Co ltd; Shenzhen Zowee Technology Co Ltd
Current assignee: Shenzhen Zowee Technology Co Ltd
Priority date: 2021-01-29
Filing date: 2021-01-29
Publication date: 2021-08-03
Anticipated expiration: 2031-01-29

Abstract

The embodiment of the utility model discloses control circuit and electronic product relates to electron technical field. This application control circuit is including the communication interface that charges, with the voltage detection and the drive unit that the communication interface that charges is connected to and charge the control unit and the communication control unit who is connected respectively with voltage detection and drive unit, voltage detection and drive unit are used for detecting the voltage of the communication interface input that charges to control output drive signal in order to control according to the voltage condition of input charge control unit or communication control unit charge or the data communication function. Therefore, the embodiment of the application can control the electronic product to realize the charging or data communication function according to different voltage range values input by the charging communication interface by only one control circuit, can greatly save the material cost, and can avoid the phenomenon of communication failure caused by code drop probability generated by decoding.

Description

Control circuit and electronic product

Technical Field

The utility model relates to the field of electronic technology, in particular to control circuit and electronic product.

Background

Present electronic product such as bracelet, wrist-watch and earphone box etc. that charges all generally need charge with external power supply equipment, still need carry out data communication interaction with other intelligent terminal simultaneously, and the current electronic product charge and the interactive function of data communication respectively through different circuits realize controlling, so can influence the manufacturing cost of product.

For example, it is mutual that need have between current TWS wireless bluetooth headset charging box and the bluetooth headset to charge and data communication, and the TWS wireless bluetooth headset charging box on the market all adopts two power pins to realize charging, in addition add 1 or a plurality of communication pin, or adopt wireless communication chip, built-in conversion circuit that charges, MCU control circuit control is decoded, signal switching circuit realizes charging box and earphone charging and data communication interactive function, present this scheme has higher requirement to the development design degree of difficulty, and manufacturing material cost is on the high side, in addition because need adopt MCU control to decode, the code dropping probability appears easily, lead to causing the phenomenon of bluetooth headset communication failure.

SUMMERY OF THE UTILITY MODEL

In view of this, an object of the embodiments of the present invention is to provide a control circuit and an electronic product, so as to solve the problem that the charging and data communication interaction of the control product needs to be realized through different circuits in the electronic product, and the production cost is high.

The utility model provides an above-mentioned technical problem adopted technical scheme as follows:

according to the utility model discloses an aspect provides a control circuit, including the communication interface that charges, with the voltage detection and the drive unit of the communication interface connection that charges to and the charge control unit and the communication control unit of being connected respectively with voltage detection and drive unit, voltage detection and drive unit are used for detecting the voltage of the communication interface input that charges to control output drive signal with control according to the voltage condition of input charge control unit or communication control unit charge or the data communication function.

The voltage detection and drive unit comprises a first voltage detection drive unit and a second voltage detection drive unit, the charging control unit comprises a first switch circuit, and the first voltage detection drive unit is electrically connected with the first switch circuit.

Wherein the communication control unit includes a second switch circuit electrically connected to the first voltage detection driving unit.

The first switch circuit is a PMOS (P-channel metal oxide semiconductor) tube, the first voltage detection driving unit is a first voltage detection driving chip, the first voltage detection driving chip comprises a voltage input end VDD, a control signal output end OUT and a grounding end VSS, the control signal output end OUT is connected with a grid control end G of the PMOS tube, the voltage input end VDD is connected with a source electrode S of the PMOS tube, and a drain electrode D of the PMOS tube is connected with a charging output end in the charging communication interface.

The second switch circuit comprises an NMOS (N-channel metal oxide semiconductor) tube, the second voltage detection driving unit is a second voltage detection driving chip, the second voltage detection driving chip comprises a voltage input end VDD, a control signal output end OUT and a grounding end VSS, the control signal output end OUT is connected with a grid control end G of the NMOS tube, the voltage input end VDD is connected with a drain electrode D of the NMOS tube together to form a power input end, and a source electrode S of the NMOS tube is connected with a data signal end in the charging communication interface.

The source S of the NMOS transistor is connected to the internal power VCC through a resistor R27.

The gate control end G of the NMOS transistor and the control signal output end OUT are connected to an internal power VCC through a resistor R26.

The voltage detection and drive unit further comprises an electrostatic protection circuit device ESD, one end of the electrostatic protection circuit device ESD is connected with the VDD of the voltage detection and drive unit, the drain D of the NMOS tube and the source S of the PMOS tube, and the other end of the electrostatic protection circuit device ESD is grounded.

According to another aspect of the embodiments of the present invention, there is provided an electronic product, which includes the control circuit described above.

Wherein the electronic product comprises a control circuit as defined in any of the above.

Compared with the prior art that the electronic product needs to be controlled by different circuits to realize the functions of charging and communication, the control circuit and the electronic product in the embodiment of the application are used for detecting the voltage value range input by the charging communication interface through the voltage detection and driving unit and controlling the output driving signal according to the input voltage value condition to control the charging control unit or the communication control unit to perform the charging or data communication function, so that the electronic product can be controlled to realize the charging or data communication function according to different voltage range values input by the charging communication interface only by one control circuit, the material cost can be greatly saved, and the phenomenon that the communication fails due to the fact that the code falling probability is generated by decoding can be avoided.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

Fig. 1 is a schematic structural diagram of an embodiment of a control circuit provided in the present invention;

fig. 2 is a schematic structural diagram of another embodiment of a control circuit provided in an embodiment of the present invention;

fig. 3 is a schematic circuit diagram of a control circuit according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of an earphone charging box and a TWS wireless earphone combination with a control circuit according to an embodiment of the present invention.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects of the present invention to be solved clearer and more obvious, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Please refer to fig. 1 to 4, which are schematic structural diagrams of a control circuit and an electronic product according to an embodiment of the present invention. Only the portions related to the present embodiment are shown for convenience of explanation.

Example one

Referring to fig. 1 and fig. 2, an embodiment of the present application provides a control circuit, which includes a charging communication interface 10, a voltage detection and driving unit 20 connected to the charging communication interface 10, and a charging control unit 30 and a communication control unit 40 respectively connected to the voltage detection and driving unit 20, where the voltage detection and driving unit 20 is configured to detect a voltage input by the charging communication interface 10, and control an output driving signal according to an input voltage condition to control the charging control unit 30 or the communication control unit 40 to perform a charging or data communication function.

Specifically, the charging communication interface 10 is used for connecting an external charging power source to perform charging or implementing a data communication function with an electronic product. In one embodiment, the charging communication interface 10 may be a USB port or a POGO-PIN.

The voltage detection and driving unit 20 is configured to detect a voltage value range of an external input power source, and control to output a driving control signal to the charging control unit 30 or the communication control unit 40 according to the voltage value range to perform charging or data communication function control. In the present embodiment, when the externally input voltage value range is 3.7V-5.2V, the voltage detection and driving unit 20 outputs the driving control signal to control the charging control unit 30 to operate; when the voltage value range input from the outside is 0V-3.6V, the voltage detection and driving unit 20 outputs a driving control signal to control the communication control unit 40 to operate.

In one embodiment, the voltage detection and driving unit 20 includes a first voltage detection driving unit 201 and a second voltage detection driving unit 202, the charging control unit 30 includes a first switch circuit 301, and the first voltage detection driving unit 201 is electrically connected to the first switch circuit 301.

In an embodiment, the communication control unit 40 includes a second switch circuit 401, and the second switch circuit 401 is electrically connected to the first voltage detection driving unit 201.

Referring to fig. 3, in an embodiment, the first switch circuit 301 is a PMOS transistor, the first voltage detection driving unit 201 is a first voltage detection driving chip U5, the first voltage detection driving chip U5 includes a voltage input terminal VDD, a control signal output terminal OUT and a ground terminal VSS, the control signal output terminal OUT is connected to a gate control terminal G of the PMOS transistor, the voltage input terminal VDD and a source S of the PMOS transistor are connected together to an external power input terminal, and a drain D of the PMOS transistor is connected to a charging output terminal in the charging communication interface.

In an embodiment, the second switch circuit 401 includes an NMOS transistor, the second voltage detection driving unit 202 is a second voltage detection driving chip U6, the second voltage detection driving chip U6 includes a voltage input terminal VDD, a control signal output terminal OUT and a ground terminal VSS, the control signal output terminal OUT is connected to the gate control terminal G of the NMOS transistor, the voltage input terminal VDD and the drain D of the NMOS transistor are connected together to a power input terminal, and the source S of the NMOS transistor is connected to the data signal terminal in the charging communication interface.

In one embodiment, the source S of the NMOS transistor is connected to the internal power VCC through a resistor R27.

In one embodiment, the gate control terminal G of the NMOS transistor and the control signal output terminal OUT are connected to an internal power VCC through a resistor R26.

Furthermore, the control circuit further comprises an electrostatic protection circuit device ESD4, one end of the electrostatic protection circuit device ESD4 is connected with VDD of the voltage detection and driving unit, a drain D of the NMOS transistor and a source S of the PMOS transistor, and the other end of the electrostatic protection circuit device ESD4 is grounded.

Referring to fig. 3, the following describes in detail a specific operation principle of the control circuit according to an embodiment of the present application:

when the external power supply of the charging communication interface 10 is charged, the charging dc power supply passes through the positive electrode 5V2 and the negative electrode GND2 contact point, and is subjected to electrostatic protection by the electrostatic protection circuit device ESD4 to the source S terminal of the PMOS transistor Q1, the drain D terminal of the NOMS transistor N1, the 4-pin voltage input terminal VDD of the first voltage detection driving chip U5, and the 4-pin voltage input terminal VDD of the voltage detection chip U6. When the first voltage detection driving chip detects that the charging voltage is greater than 3.7V, the 1-pin control signal output end OUT of the first voltage detection driving chip U5 is controlled to output a low level, the control end G of the PMOS transistor Q1 is controlled to be a low level, and at this time, the PMOS transistor Q1 is turned on. The charging voltage power supply is output to the VCHGER power supply from the source S end of the PMOS pipe Q1 to the drain D end of the PMOS pipe Q1, and the rear end of the VCHGER can be charged normally. The voltage detected by the second voltage detection driving chip U6 is higher than the voltage of 3.7V, the 1-pin control signal output end OUT of the second detection driving chip U6 outputs a low level, the gate control end G of the NMOS transistor N1 is controlled to be a low level, at this time, the NMOS transistor N1 is turned off, and the charging voltage cannot pass through the NMOS transistor to the DATA end.

When data communication is carried out, communication voltage passes through a contact point of an anode 5V2 and a cathode GND2, is subjected to electrostatic protection by an electrostatic protection circuit device ESD4 and then reaches the source S end of the PMOS tube Q1, the drain D end of the NOMS tube N1, the 4-pin voltage input end VDD of the first voltage detection driving chip U5 and the 4-pin voltage input end VDD of the second voltage detection driving chip U6. When the first voltage detection driving chip detects that the charging voltage is less than 3.7V, the 1-pin control signal output end OUT of the first voltage detection driving chip U5 is controlled to output a high level, the control end G of the PMOS transistor Q1 is controlled to be a high level, and at this time, the PMOS transistor Q1 is turned off and is not turned on. The charging voltage power supply cannot reach the drain D end of the PMOS tube Q1 through the source S end of the PMOS tube Q1, and the charging function of the rear end VCHGER power supply is closed. The second voltage detection driving chip U6 detects that the voltage is less than the voltage of 3.7V, the 1-pin control signal output terminal OUT of the second detection driving chip U6 outputs a high level, the control terminal G of the NMOS transistor N1 is controlled to be a high level, at this time, the NMOS transistor N1 is turned on, the communication voltage is output to the DATA terminal from the drain terminal D of the NMOS transistor N1 to the source terminal S of the NMOS transistor N1, and the DATA communication transmission is performed from B to a or from a to B for the backend DATA.

So, for prior art need come the function that the electronic product realized charging and communication respectively through different circuits, this application embodiment just can realize the charging and the data communication function of electronic product through a control circuit, the material cost of saving the product that can be very big also avoids appearing MCU control decoding and produces the phenomenon that falls the code probability and cause communication failure simultaneously.

The control circuit passes through voltage detection and drive unit 20 is used for detecting the voltage value scope of charging communication interface 10 input to control output drive signal in order to control according to the voltage value condition of input charge control unit or communication control unit charge or the data communication function, thereby this application embodiment control circuit can come control electronic product to realize charging or the data communication function according to the different voltage range value of charging communication interface input, and the material cost is saved that can be very big, and can avoid appearing needing to decode and produce and fall the phenomenon that the code probability causes the communication failure.

Example two

The second embodiment of the present application further provides an electronic product, where the electronic product according to the second embodiment of the present application is provided with a control circuit, and a basic structure of the control circuit is substantially the same as that of the control circuit according to the first embodiment of the present application, and is not described herein again.

In practical applications, the electronic product may be an electronic product with charging and communication functions, such as a wearable electronic product, specifically, for example, a bracelet, a smart watch, a TWS wireless headset, and the like.

The following description will take an example in which an electronic product, such as a TWS wireless headset, uses the control circuit to implement charging and data communication interaction with the headset.

Referring to fig. 4, in this embodiment, the control circuit is disposed in the earphone charging box 2, the lower end of the earphone rod portion of the TWS wireless earphone 3 has an earphone signal terminal POGO-PIN, the lower end of the receiving slot of the earphone charging box has a box signal terminal POGO-PIN abutting against the earphone signal terminal POGO-PIN, and the box signal terminal POGO-PIN is connected to the charging communication interface of the control circuit.

When the TWS wireless earphone is placed into the earphone charging box, the earphone signal terminal POGO-PIN on the TWS wireless earphone is abutted to the box signal terminal POGO-PIN, the charging box detects the electric quantity condition of the TWS wireless earphone, when the electric quantity of the TWS wireless earphone is detected to be insufficient, 5V voltage is output to the earphone, the voltage detection and driving unit 20 of the control circuit detects that the output voltage 5V is within the charging voltage range, so that the 1-PIN control signal output end OUT of the first voltage detection driving chip U5 is controlled to output low level, the control end G of the PMOS tube Q1 is controlled to be low level, and the PMOS tube Q1 is switched on at the moment. The charging voltage power supply is output to the VCHGER power supply from the source S end of the PMOS pipe Q1 to the drain D end of the PMOS pipe Q1, and the rear end of the VCHGER can be charged normally. When the second voltage detection driving chip U6 detects a voltage higher than 3.7V, the 1-pin control signal output terminal OUT of the second detection driving chip U6 outputs a low level to control the gate control terminal G of the NMOS transistor N1 to be a low level, at this time, the NMOS transistor N1 is turned off, and the charging voltage cannot pass through the NMOS transistor to the DATA terminal.

When a button 4 on the earphone charging box is pressed to control the TWS wireless earphone to carry OUT data communication with the charging box, a voltage value in a range of 0-3.6V is output to the earphone, when the first voltage detection driving chip detects that the charging voltage is smaller than 3.7V, the 1-pin control signal output end OUT of the first voltage detection driving chip U5 is controlled to output a high level, the control end G of the PMOS tube Q1 is controlled to be a high level, and at the moment, the PMOS tube Q1 is stopped and is not conducted. The charging voltage power supply cannot reach the drain D end of the PMOS tube Q1 through the source S end of the PMOS tube Q1, and the charging function of the rear end VCHGER power supply is closed. The second voltage detection driving chip U6 detects that the voltage is less than 3.7V voltage, the 1-pin control signal output end OUT of the second detection driving chip U6 outputs high level, the control end G of the NMOS tube N1 is controlled to be high level, the NMOS tube N1 is conducted at the moment, the communication voltage is output to a DATA DATA end from the drain D end of the NMOS tube N1 to the source S end of the NMOS tube N1, and the DATA of the rear end is transmitted from the TWS wireless earphone to the earphone charging box or from the earphone charging box to the TWS wireless earphone for DATA communication.

The electronic product of the embodiment of the application passes through the voltage detection and driving unit 20 of the control circuit detects the voltage value range input by the charging communication interface 10, and controls the output driving signal according to the input voltage value condition to control the charging control unit or the communication control unit to perform charging or data communication function, so that the electronic product of the embodiment of the application can realize the charging or data communication function only by one control circuit, the material cost can be greatly saved, and the phenomenon that the communication fails due to the code falling probability caused by decoding can be avoided.

The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, without thereby limiting the scope of the invention. Any modification, equivalent replacement and improvement made by those skilled in the art without departing from the scope and spirit of the present invention should be within the scope of the claims of the present invention.

Claims

1. A control circuit is characterized by comprising a charging communication interface, a voltage detection and drive unit connected with the charging communication interface, and a charging control unit and a communication control unit which are respectively connected with the voltage detection and drive unit, wherein the voltage detection and drive unit is used for detecting the voltage input by the charging communication interface and controlling and outputting a drive signal according to the input voltage condition so as to control the charging control unit or the communication control unit to perform charging or data communication functions.

2. The control circuit according to claim 1, wherein the voltage detection and driving unit comprises a first voltage detection driving unit and a second voltage detection driving unit, and the charging control unit comprises a first switch circuit, and the first voltage detection driving unit is electrically connected to the first switch circuit.

3. The control circuit according to claim 2, wherein the communication control unit includes a second switching circuit electrically connected to the first voltage detection driving unit.

4. The control circuit as claimed in claim 2, wherein the first switch circuit is a PMOS transistor, the first voltage detection driving unit is a first voltage detection driving chip, the first voltage detection driving chip includes a voltage input terminal VDD, a control signal output terminal OUT and a ground terminal VSS, the control signal output terminal OUT is connected to the gate control terminal G of the PMOS transistor, the voltage input terminal VDD and the source S of the PMOS transistor are connected together to a power input terminal, and the drain D of the PMOS transistor is connected to the charging output terminal of the charging communication interface.

5. The control circuit as claimed in claim 3, wherein the second switch circuit includes an NMOS transistor, the second voltage detection driving unit is a second voltage detection driving chip, the second voltage detection driving chip includes a voltage input terminal VDD, a control signal output terminal OUT and a ground terminal VSS, the control signal output terminal OUT is connected to the gate control terminal G of the NMOS transistor, the voltage input terminal VDD is connected to the power input terminal together with the drain terminal D of the NMOS transistor, and the source terminal S of the NMOS transistor is connected to the data signal terminal of the charging communication interface.

6. The control circuit of claim 5 wherein the source S of the NMOS transistor is connected to an internal power source VCC through a resistor R27.

7. The control circuit of claim 5, wherein the gate control terminal G of the NMOS transistor and the control signal output terminal OUT are connected to an internal power source VCC through a resistor R26.

8. The control circuit according to any one of claims 1 to 7, further comprising an electrostatic protection circuit device ESD, one end of the electrostatic protection circuit device ESD is connected to VDD of the voltage detection and driving unit, a drain D of the NMOS transistor and a source S of the PMOS transistor, and the other end of the electrostatic protection circuit device ESD is grounded.

9. An electronic product, characterized in that the electronic product comprises a control circuit according to any of claims 1-8.

10. The electronic product of claim 9, wherein the charging voltage of the control circuit has a range value of 3.7V-5.2V; the data communication voltage range value of the control circuit is 0V-3.6V.