CN211296592U - A power decoupling circuit - Google Patents

Abstract

The utility model relates to a power decoupling circuit. The power decoupling circuit includes: the first diode switch circuit, the second diode switch circuit, the third diode switch circuit, the fourth diode switch circuit, the inductor and the decoupling capacitor; one end of the first diode switch circuit is connected with the positive electrode of the decoupling capacitor, the negative electrode of the decoupling capacitor is connected with one end of the second diode switch circuit, the other end of the first diode switch circuit is respectively connected with the other end of the second diode switch circuit and one end of the inductor, and the other end of the inductor is connected with the positive electrode of the output end of the inverter; one end of the third diode switch circuit is connected with the positive electrode of the decoupling capacitor, the negative electrode of the decoupling capacitor is connected with one end of the fourth diode switch circuit, and the other end of the third diode switch circuit is respectively connected with the other end of the fourth diode switch circuit and the negative electrode of the output end of the inverter. The utility model aims at improving the work efficiency of circuit when reducing power decoupling circuit control complexity.

Description

A power decoupling circuit

technical field

The utility model relates to the technical field of inverters, in particular to a power decoupling circuit.

Background technique

The existing decoupling technologies mainly include three categories: PV-level power decoupling, DC-link level, and AC-level. For PV-level power decoupling, Professor Shimizu of Tokyo Metropolitan University once proposed an inverter with a decoupling circuit, which uses the inductor-capacitor resonance in the decoupling circuit. When the excitation current gradually decreases to zero, the magnetization energy of the excitation winding is transferred to the decoupling capacitor for storage; then the excitation current increases in the opposite direction, and the energy stored in the decoupling capacitor is transferred to the secondary load side according to the law of sinusoidal change . This method is feasible in theory, but in practice, there are defects of low energy utilization rate, large energy loss in the decoupling process, and low efficiency during circuit operation. Moreover, the magnetization process needs to consider the problem of magnetic reset. In addition, the design of magnetic flux leakage is also complicated. In view of the shortcomings of this scheme, scholars have successively proposed some improved schemes, such as the two new inverters designed by Professor Hu Haibing, whose energy utilization has been greatly improved, but there are many circuit components involved in decoupling in this scheme. , so that additional switching losses are generated during the switching process, which invisibly increases unnecessary energy losses. Zare simplifies the power decoupling circuit on the basis of this scheme, and introduces soft switching technology to reduce the switching loss of the circuit, but the control strategy design is much more complicated.

For the DC-link power decoupling technology, due to the high bus voltage, the decoupling capacitor is directly connected to the bus in parallel, so that the secondary ripple energy is mainly processed by the capacitor. Although this scheme avoids complicated circuit design, there is a problem that the high bus voltage with a large number of harmonics affects the current quality during grid connection. Although a control method to reduce ripple can be used, such as Rodriguez proposed adding LPF, the entire system The dynamic responsiveness is greatly reduced, affecting its work efficiency.

The existing AC-level power decoupling technology mainly reduces the capacitance of the decoupling capacitor through a large voltage change at the AC terminal. Generally speaking, most of the proposed current mode inverters put the inverter circuit together with the decoupling circuit, making the control extremely complicated.

It can be seen from this that the existing power decoupling circuit is either complicated to control or has low working efficiency. Based on this, it is necessary to provide a power decoupling circuit with simple control and high working efficiency.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a power decoupling circuit, which can improve the working efficiency of the circuit while reducing the control complexity of the power decoupling circuit.

For achieving the above object, the utility model provides the following scheme:

A power decoupling circuit, comprising: a first bridge arm, a second bridge arm, an inductor and a decoupling capacitor; the first bridge arm, the second bridge arm and the decoupling capacitor are connected in parallel;

The first bridge arm includes a first diode switch circuit and a second diode switch circuit; one end of the first diode switch circuit is connected to the anode of the decoupling capacitor, and the The negative electrode is connected to one end of the second diode switch circuit, and the other end of the first diode switch circuit is respectively connected to the other end of the second diode switch circuit and one end of the inductor, so The other end of the inductor is connected to the positive pole of the output end of the inverter;

The second bridge arm includes a third diode switch circuit and a fourth diode switch circuit; one end of the third diode switch circuit is connected to the anode of the decoupling capacitor, and the The negative electrode is connected to one end of the fourth diode switch circuit, and the other end of the third diode switch circuit is respectively connected to the other end of the fourth diode switch circuit and the output end of the inverter. Negative connection.

Optionally, the first diode switch circuit includes a first switch tube and a first diode, the emitter of the first switch tube is connected to the anode of the first diode, and the first switch tube is connected to the anode of the first diode. The collector of the switch tube is respectively connected to the cathode of the first diode and the anode of the decoupling capacitor;

The second diode switch circuit includes a second switch tube and a second diode, the emitter of the second switch tube is connected to the anode of the second diode, and the collector of the second switch tube is connected to the anode of the second diode. The electrodes are respectively connected with the cathode of the second diode, the emitter of the first switch tube and one end of the inductor;

The third diode switch circuit includes a third switch tube and a third diode, the emitter of the third switch tube is connected to the anode of the third diode, and the collector of the third switch tube is connected to the anode of the third diode. The electrodes are respectively connected to the negative electrode of the third diode and the positive electrode of the decoupling capacitor;

The fourth diode switch circuit includes a fourth switch tube and a fourth diode, the emitter of the fourth switch tube is connected to the anode of the fourth diode, and the collector of the fourth switch tube is connected to the anode of the fourth diode. The electrodes are respectively connected with the cathode of the fourth diode, the emitter of the third switch tube and the cathode of the output end of the inverter.

Optionally, the inverter includes a third bridge arm, a fourth bridge arm and an inverter capacitor; the third bridge arm, the fourth bridge arm and the inverter capacitor are connected in parallel; the inverter capacitor The positive pole of the inverter capacitor is connected to the positive pole of the power supply, and the negative pole of the inverter capacitor is connected to the negative pole of the power supply; the third bridge arm includes a fifth diode switch circuit and a sixth diode switch circuit; the fifth diode switch One end of the circuit is connected to the anode of the inverter capacitor, the cathode of the inverter capacitor is connected to one end of the sixth diode switch circuit, and the other end of the fifth diode switch circuit is respectively connected to the The other end of the sixth diode switch circuit is connected to the other end of the inductor;

The fourth bridge arm includes a seventh diode switch circuit and an eighth diode switch circuit; one end of the seventh diode switch circuit is connected to the anode of the inverter capacitor, and the The negative electrode is connected to one end of the eighth diode switch circuit, and the other end of the seventh diode switch circuit is respectively connected to the other end of the eighth diode switch circuit and the third diode switch Connect the other end of the circuit.

Optionally, the fifth diode switch circuit includes a fifth switch tube and a fifth diode, the emitter of the fifth switch tube is connected to the anode of the fifth diode, and the fifth switch tube is connected to the anode of the fifth diode. The collector of the switch tube is respectively connected with the cathode of the fifth diode and the anode of the inverter capacitor;

The sixth diode switch circuit includes a sixth switch tube and a sixth diode, the emitter of the sixth switch tube is connected to the anode of the sixth diode, and the collector of the sixth switch tube is connected to the anode of the sixth diode. The electrodes are respectively connected with the cathode of the sixth diode, the emitter of the fifth switch tube and the other end of the inductor;

The seventh diode switch circuit includes a seventh switch tube and a seventh diode, the emitter of the seventh switch tube is connected to the anode of the seventh diode, and the collector of the seventh switch tube is connected to the anode of the seventh diode. The electrodes are respectively connected with the cathode of the seventh diode and the anode of the inverter capacitor;

The eighth diode switch circuit includes an eighth switch tube and an eighth diode, the emitter of the eighth switch tube is connected to the anode of the eighth diode, and the collector of the eighth switch tube is connected to the anode of the eighth diode. The electrodes are respectively connected to the cathode of the eighth diode, the emitter of the seventh switch tube and the other end of the third diode switch circuit.

Optionally, the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are all IGBT devices.

Optionally, the circuit structures of the first diode switch circuit, the second diode switch circuit, the third diode switch circuit and the fourth diode switch circuit are all the same.

Optionally, the circuit structures of the fifth diode switch circuit, the sixth diode switch circuit, the seventh diode switch circuit and the eighth diode switch circuit are all the same.

According to the specific embodiment provided by the present utility model, the present utility model discloses the following technical effects: compared with the existing circuit, the present utility model can design the first diode switch circuit, the second diode switch circuit, the third diode switch circuit and the third The diode switch circuit and the fourth diode switch circuit make the circuit can be regarded as an active reactive power filter, which directly forms charge and discharge energy with the external circuit, and can realize the separate control of each switch tube in each mode. This makes it easy to control the power decoupling circuit while improving the working efficiency of the circuit.

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings required in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only of the present invention. For some embodiments of the present invention, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

1 is a topology diagram of a power decoupling circuit according to an embodiment of the present invention;

2 is a structural diagram of a micro-inverter applied by a power decoupling circuit according to an embodiment of the present invention;

3 is a graph showing the relationship between input power P1 and output power P0 according to an embodiment of the present utility model;

4 is a mode sequence diagram of a power decoupling circuit in a grid cycle according to an embodiment of the present invention;

5 is a schematic diagram of four modes of a power decoupling circuit according to an embodiment of the present invention;

6 is a circuit diagram of four modes of a power decoupling circuit according to an embodiment of the present invention;

7 is an equivalent diagram of four modes of a power decoupling circuit according to an embodiment of the present invention;

8 is a simplified waveform diagram of a power decoupling circuit in a single switching cycle according to an embodiment of the present invention;

9 is a waveform diagram of a given value of iref under four operating modes of the power decoupling circuit according to the embodiment of the present invention;

10 is a simulation diagram of a power decoupling circuit according to an embodiment of the present invention applied to a two-stage inverter;

11 is a waveform diagram of four switching pulse waveforms and U _inv before and after the power decoupling circuit is connected according to an embodiment of the present invention;

12 is a waveform diagram of the pulse waveform, U _inv and inductor current of the fourth switch tube in different modes before and after the power decoupling circuit according to the embodiment of the present invention;

13 is a waveform diagram of the pulse waveform, U _inv and inductor current of the third switch tube in different modes before and after the power decoupling circuit is connected according to the embodiment of the present invention;

14 is a waveform comparison diagram of U _inv , I _d and U _d before and after the power decoupling circuit is connected in accordance with an embodiment of the present invention;

15 is a waveform comparison diagram of U _inv before and after the decoupling circuit works before and after the power decoupling circuit according to the embodiment of the present invention, the output voltage Uac after LC filtering, and the bus capacitor voltage Udc;

16 is a waveform diagram of a relevant experiment in which the decoupling circuit is not connected in the experiment before the power decoupling circuit according to the embodiment of the present invention;

FIG. 17 is a waveform diagram of a relevant experiment in which the decoupling circuit is not connected in the experiment after the power decoupling circuit according to the embodiment of the present invention is connected.

Detailed ways

The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the implementations. example. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

The purpose of the present invention is to provide a power decoupling circuit, which can improve the working efficiency of the circuit while reducing the control complexity.

In order to make the above objects, features and advantages of the present utility model more clearly understood, the present utility model will be described in further detail below with reference to the accompanying drawings and specific embodiments.

Example 1

As shown in FIG. 1 , a power decoupling circuit 5 provided in this embodiment includes: a first bridge arm, a second bridge arm, an inductance L _d and a decoupling capacitor C _d ; the first bridge arm, the The second bridge arm is connected in parallel with the decoupling capacitor C _d .

The first bridge arm includes a first diode switch circuit and a second diode switch circuit; one end of the first diode switch circuit is connected to the anode of the decoupling capacitor C _d , and the decoupling capacitor C d The cathode of the capacitor C _d is connected to one end of the second diode switch circuit, and the other end of the first diode switch circuit is respectively connected to the other end of the second diode switch circuit and the inductor L One end of _d is connected, and the other end of the inductor L _d is connected to the positive pole of the output end of the inverter 4 .

The second bridge arm includes a third diode switch circuit and a fourth diode switch circuit; one end of the third diode switch circuit is connected to the anode of the decoupling capacitor C _d , and the decoupling capacitor C d The cathode of the capacitor C _d is connected to one end of the fourth diode switch circuit, and the other end of the third diode switch circuit is respectively connected to the other end of the fourth diode switch circuit and the inverter The negative terminal of the output terminal of the device 4 is connected.

As an optional implementation manner, the first diode switch circuit includes a first switch tube S1 and a first diode, and the emitter of the first switch tube S1 and the first diode are connected to each other. The anode is connected, and the collector of the first switch tube S1 is respectively connected to the cathode of the first diode and the anode of the decoupling capacitor.

The second diode switch circuit includes a second switch S2 and a second diode, the emitter of the second switch S2 is connected to the anode of the second diode, and the second switch S2 The collector of S2 is respectively connected to the cathode of the second diode, the emitter of the first switch S1 and one end of the inductor.

The third diode switch circuit includes a third switch S3 and a third diode, the emitter of the third switch S3 is connected to the anode of the third diode, and the third switch S3 The collector of S3 is respectively connected to the cathode of the third diode and the anode of the decoupling capacitor _Cd .

The fourth diode switch circuit includes a fourth switch S4 and a fourth diode, the emitter of the fourth switch S4 is connected to the anode of the fourth diode, and the fourth switch S4 The collector of S4 is respectively connected to the cathode of the fourth diode, the emitter of the third switch S3 and the cathode of the output end of the inverter 4 .

As an optional implementation manner, the inverter 4 includes a third bridge arm, a fourth bridge arm, and an inverter capacitor C; the third bridge arm, the fourth bridge arm, and the inverter capacitor C is connected in parallel; the positive pole of the inverter capacitor C is connected to the positive pole of the power supply, and the negative pole of the inverter capacitor C is connected to the negative pole of the power supply; the third bridge arm includes a fifth diode switch circuit and a sixth diode switch circuit; one end of the fifth diode switch circuit is connected to the anode of the inverter capacitor C, the cathode of the inverter capacitor C is connected to one end of the sixth diode switch circuit, the fifth The other end of the diode switch circuit is respectively connected to the other end of the sixth diode switch circuit and the other end of the inductor Ld.

The fourth bridge arm includes a seventh diode switch circuit and an eighth diode switch circuit; one end of the seventh diode switch circuit is connected to the anode of the inverter capacitor C, and the inverter capacitor The cathode of C is connected to one end of the eighth diode switch circuit, and the other end of the seventh diode switch circuit is connected to the other end of the eighth diode switch circuit and the third diode respectively The other end of the tube switch circuit is connected.

As an optional implementation manner, the fifth diode switch circuit includes a fifth switch tube G1 and a fifth diode, and the emitter of the fifth switch tube G1 and the fifth diode are connected to each other. The anode is connected, and the collector of the fifth switch tube G1 is connected to the cathode of the fifth diode and the anode of the inverter capacitor C, respectively.

The sixth diode switch circuit includes a sixth switch tube G2 and a sixth diode, the emitter of the sixth switch tube G2 is connected to the anode of the sixth diode, and the sixth switch tube The collector of G2 is respectively connected to the cathode of the sixth diode, the emitter of the fifth switch G1 and the other end of the inductor Ld.

The seventh diode switch circuit includes a seventh switch G3 and a seventh diode, the emitter of the seventh switch G3 is connected to the anode of the seventh diode, and the seventh switch G3 The collector of G3 is connected to the cathode of the seventh diode and the anode of the inverter capacitor C, respectively.

The eighth diode switch circuit includes an eighth switch tube G4 and an eighth diode, the emitter of the eighth switch tube G4 is connected to the anode of the eighth diode, and the eighth switch tube The collector of G4 is respectively connected to the cathode of the eighth diode, the emitter of the seventh switch G3 and the other end of the third diode switch circuit.

As an optional implementation manner, the first switch S1 , the second switch S2 , the third switch S3 and the fourth switch S4 are all IGBT devices.

As an optional implementation manner, the first diode, the second diode, the third diode, and the fourth diode are all IGBT embedded diodes.

As an optional implementation manner, the circuits of the first diode switch circuit, the second diode switch circuit, the third diode switch circuit, and the fourth diode switch circuit The structure is the same.

As an optional implementation manner, the circuits of the fifth diode switch circuit, the sixth diode switch circuit, the seventh diode switch circuit, and the eighth diode switch circuit The structure is the same.

The structure and working principle of the micro-inverter based on the above-mentioned power decoupling circuit will be introduced below.

As shown in FIG. 2 , the micro-inverter structure includes: an inverter, the power decoupling circuit, a power grid, a first capacitor and a first inductor. The inverter and the power decoupling circuit are connected in parallel, the parallel type can make the efficiency higher and the volume smaller, while the series type also needs to handle the average power on the inverter side, and the positive pole of the first inductor is connected to the inverter The positive pole of the output terminal of the first inductor is connected to the positive pole of the first capacitor, the negative pole of the first capacitor is connected to the negative pole of the output terminal of the inverter, and the grid and the first capacitor are connected in parallel. The first capacitor and the first inductor form a filter circuit, and the main function of the filter circuit is to filter out the inevitable high-order harmonics caused by the modulation method. On the inverter side, the DC input voltage of the inverter is V _dc , the DC current of the inverter is I _dc , the AC output voltage of the inverter is U _inv , the grid voltage is V _grid , the DC current of the inverter is The input power is P _I , the AC output power of the inverter is P _o , the input voltage of the power decoupling circuit is V _c , and the decoupling power of the power decoupling circuit is P _c .

The relationship between P _I , P _o , and V _grid is shown in Figure 3, where 1 represents P _I , 2 represents P _o , and 3 represents V _grid . It is not difficult to see from Figure 3 that the DC input power P of the inverter _I is constant at 200W, and the AC output power P _o of the inverter is alternating, the average power of the two is the same, but the instantaneous power is not equal. The traditional method is to use a large-capacity electrolytic capacitor for energy buffering. In this embodiment, a power decoupling circuit is connected in parallel at the AC output side of the inverter to replace the large electrolytic capacitor in the inverter. A non-electrolytic capacitor with a smaller capacitance value extends the service life of the circuit, reduces the capacitance value, and improves the working efficiency of the micro-inverter without affecting the original function.

When the DC input power of the inverter is greater than its AC output power (P _I ≥P _o ), the excess energy is stored in the decoupling capacitor of the power decoupling circuit, and when the DC input power of the inverter is less than its AC output power ( P _I ≤ P _o ), the energy released by the decoupling capacitor in the power decoupling circuit is used to compensate the instantaneous power difference on both sides.

The micro-inverter is divided into four working modes, namely mode one, mode two, mode three and mode four.

When V _grid > 0, P _o < P _I , in mode one, the power decoupling circuit absorbs energy.

When V _grid >0, P _o >P _I , in mode two, the power decoupling circuit releases energy.

When V _grid < 0 and P _o < P _I , in mode three, the power decoupling circuit absorbs energy.

When V _grid <0, P _o >P _I , in mode four, the power decoupling circuit releases energy.

As shown in Figure 4, the circuit works in one power grid cycle in the following order: Mode 1 → Mode 2 → Mode 1 → Mode 3 → Mode 4 → Mode 3.

Considering that the input side voltage of the decoupling circuit is alternately positive and negative, and the input current has positive and negative directions, the circuit can functionally realize four-quadrant power conversion. Part (b) of Figure 5 is mode two, part (c) of Figure 5 is mode three, and part (d) of Figure 5 is mode four. As shown in Figure 5, the positive current direction is clockwise, and the voltage direction is both. Up is positive and down is negative. When the input voltage is in the same direction as the input current, the power decoupling circuit absorbs energy; otherwise, it releases energy.

From the relationship between DC input voltage, AC output voltage, DC input current and AC output current: if the DC input voltage in the power decoupling circuit is positive, the capacitor voltage increases, and absorbs energy, it can be equivalent to a boost circuit ; Similarly, if the DC input voltage is positive, the capacitor voltage is reduced, and energy is released, it can be equivalent to a buck circuit. The details of the equivalent circuit under each operating mode are shown in Table 1.

Table 1 Relationship between different working modes of power decoupling circuit

Input voltage Input Current The output voltage Output current Circuit class energy relationship Mode one just just just just Boost absorb Mode two just burden just burden Buck freed Mode three burden burden just just Boost absorb Mode four burden just just burden Buck freed

In FIG. 6 , the dotted line is a schematic diagram of a circuit in which the main control switch is turned off, and the solid line is a schematic diagram of a circuit in which the main control switch is turned on.

As shown in part (a) of FIG. 6 , U _inv represents the equivalent power supply on the AC side of the inverter. When the circuit is in mode one, when the grid instantaneous voltage (U _g ) is greater than 0, and the constant power (P _pv ) output by the photovoltaic cell is greater than the grid power (P _ac ), the first switch tube, the second switch The tube and the third switch tube are disconnected, and the fourth switch tube is controlled by the PEM signal as the main control switch. At this time, the decoupling capacitor (C _d ) absorbs energy, the voltage of C _d increases, the circuit, etc. Effective for Boost circuit. When the fourth switch tube is turned on, the current flow sequence is the positive pole of the inverter, the inductor, the fourth switch tube, the second diode, and the negative pole of the inverter; when the fourth switch tube is turned off, the current The order of circulation is the positive electrode of the inverter, the inductor, the third diode, the decoupling capacitor, the second diode, and the negative electrode of the inverter.

As shown in part (b) of Fig. 6, U _inv represents the equivalent power supply on the AC side of the inverter. When the circuit is in mode 2, when U _g > 0 and P _pv < P _ac , the first switch tube and the fourth switch tube are disconnected, the second switch tube is turned on, and the third switch tube is turned on. The switch tube is controlled by the PEM signal as the main control switch. At this time, the decoupling capacitor (C _d ) releases energy, and the voltage of C _d drops. The circuit is equivalent to a Buck circuit. When the third switch tube is turned on, the current flow sequence is the negative pole of the inverter, the second switch tube, the decoupling capacitor, the third switch tube, the inductor, and the positive pole of the inverter; when the third switch tube is disconnected When , the current flow sequence is the negative pole of the inverter, the second switch tube, the fourth diode, the inductor, and the positive pole of the inverter.

As shown in part (c) of FIG. 6 , U _inv represents the equivalent power supply on the AC side of the inverter. When the circuit is in mode three, when U _g < 0, P _pv < P _ac , the first switch, the second switch and the fourth switch are disconnected, and the third switch The tube is controlled by the PEM signal as the main control switch. At this time, the decoupling capacitor (C _d ) absorbs energy, and the voltage of C _d increases. The circuit is equivalent to a Boost circuit. When the third switch tube is turned on, the current flow sequence is the positive pole of the inverter, the first diode, the third switch tube, the inductor, and the negative pole of the inverter; when the third switch tube is turned off, the current The order of circulation is the positive electrode of the inverter, the first diode, the decoupling capacitor, the fourth diode, the inductor, and the negative electrode of the inverter.

As shown in part (d) of FIG. 6 , U _inv represents the equivalent power supply on the AC side of the inverter. When the circuit is in mode four, when U _g <0, P _pv >P _ac , the second switch tube and the third switch tube are disconnected, the first switch tube is turned on, and the first switch tube is turned on. The four-switch tube is controlled by the PEM signal as the main control switch. At this time, the decoupling capacitor (C _d ) releases energy, and the voltage of C _d drops, and the circuit is equivalent to the Buck circuit. When the fourth switch tube is turned on, the current flow sequence is the negative pole of the inverter, the inductor, the fourth switch tube, the decoupling capacitor, the first switch tube, and the positive pole of the inverter; when the fourth switch tube is turned off When , the current flow sequence is the negative pole of the inverter, the inductor, the third diode, the first switch tube, and the positive pole of the inverter. The working mode of the power decoupling circuit is shown in Table 2.

Table 2 Working mode of power decoupling circuit

In Table 2, the "0" state indicates that the switch is turned off, the "1" state indicates that the switch is turned on; the "1/0" state indicates that the switch is driven by a 20kHz high-frequency PEM control signal. The switch tube is used as the main control switch tube in the equivalent circuit of this mode. Therefore, expressing the above table with a logic circuit, the expression (1) can be obtained.

In expression (1), R ₁ and R ₂ are variables, and PEM is a state quantity. The first switch tube and the second switch tube are always controlled by the 100Hz low frequency signal, and the third switch tube and the fourth switch tube are controlled by the 20kHz high frequency PEM signal.

In addition to the above logical meanings, R ₁ and R ₂ also have electrical meanings. R ₁ represents the positive and negative conditions of the grid side voltage. When R ₁ =0, the grid voltage is in the positive half cycle, and the decoupling circuit absorbs energy. When R ₁ =1, the grid voltage is in the negative half cycle, and the decoupling circuit releases energy. The PEM signal is the driving signal of the master switch in various modes.

In order to realize the above circuit switch control, the pulse energy modulation technology is used to trigger the driving signal, and the entire circuit process can be controlled only by controlling the on-off of one switch in each state, which is also the key point of the utility model technology.

The pulse energy modulation technology calculates the pulse duty cycle according to the actual buffer energy required, so as to control the cut-off time of the corresponding switch conduction to achieve the purpose of energy buffering. The equivalent circuit diagrams of the four operating modes of the power decoupling circuit are shown in Figure 7, which can be regarded as single-switch circuits. Therefore, an energy control model can be established, and the control duration of the switch, that is, the duty cycle or the pulse width, can be determined according to the instantaneous energy value that needs to be coupled.

The grid side power is equal to the sum of a constant component and an AC component of twice the power frequency. In formula (2), P _ac represents the grid power, P _pv represents the output power of the photovoltaic module, that is, the input power at the DC side, and θ is the power factor angle. , ideally zero.

P _ac =P _pv -P _pv cos(2ωt+θ) (2)

Equation (3) shows that the decoupling circuit needs to process the decoupling power within one inverter equivalent switching cycle, and the transformer output voltage is discontinuous, so the decoupling circuit must work in DCM mode. P _pd represents the input power of the decoupling circuit:

P _pd =P _pv T _s cos(2ωt) (3)

T_S表示开关周期。As shown in Figure 8, U _inv is the output voltage of the inverter, i _grid is the current of the grid, and id is the instantaneous value of the inductor current. It can be seen from the figure that in a single switching cycle, at time _{t 1} , U _inv and id start at the same time, at time _{t 2} , after id reaches the given value, it starts to decrease, and at time t ₃ it drops to zero, and t ₃ <t ₄ < _{t 0} +T _s is satisfied, let

T _S represents the switching period.

It can be seen from Figure 8 that the shaded part of t ₂ -t ₁ is the pulse width of the PEM drive signal, and its size is determined by _idref . The calculation method of _idref in different modes is as follows:

As shown in part (a) of Figure 7, the equivalent circuit of mode 1 is Boost, i _d flows clockwise as the positive direction (the same below), L _d represents the inductance value, i _ref represents the reference current of the inductance, t ₁ ~ During the period of t ₂ , the switch S4 is turned on, and _{t 2 -t 1 can be} represented by DT _s , then there are

During the period from t ₂ to t ₃ , S ₄ is disconnected, and t ₃ -t ₂ can be represented by D'T _s , then there are

The input power P _pd of the decoupling circuit can be expressed as

U _d is the decoupling capacitor voltage, E _min is the energy stored by the decoupling capacitor at the previous moment, and the instantaneous energy E _c of the decoupling capacitor can be expressed as

Substituting equation (3) into equation (7), it can be further expressed as

U _L is the valley value of the decoupling capacitor voltage, so U _d can be obtained

Since the magnitude of the inverter output voltage U _inv is equal to the DC input voltage U _in , according to energy conservation, the input power of the power decoupling circuit is equal to the instantaneous power that the power decoupling circuit needs to process. Simultaneous (3) ~ (9) ,available

As shown in (b) of FIG. 7 , the equivalent circuit of mode 2 is Buck. During the period from t ₁ to t ₂ , the switch S3 is turned on.

During the period from t ₂ to t ₃ , S3 is disconnected

In the same way, i _dref can be obtained

As shown in (c) of FIG. 7 , the equivalent circuit of Mode 3 is Boost, which works in the boost state. During the period from t ₁ to t ₂ , the switch S3 is turned on.

During the period from t ₂ to t ₃ , S3 is disconnected

The input power of the decoupling circuit can be obtained, and (3), (6), (14), (15) can be obtained simultaneously

As shown in (d) of Figure 7, the equivalent circuit of Mode 4 is Buck, which works in a step-down state. During the period from t ₁ to t ₂ , the switch S4 is turned on.

During the period from t ₂ to t ₃ , S4 is turned off

According to the input power of the decoupling circuit, (3), (6), (17), (18) are obtained simultaneously

The waveforms of _idref under the four modes are shown in Figure 9, and the duty cycle of each mode can be obtained by inversely deduced through _idref .

In order to verify the above theoretical analysis, as shown in Figure 10, the working principle of the circuit is simulated and verified on a 200W system with Matlab software. Since the output current of the inverter is in the same phase as the grid-connected voltage, pure resistance is used in the simulation. load, the waveform of the output voltage is the same as the waveform of the output current, and the performance indicators of the two are exactly the same. The designed rated output power is 200W, the DC input voltage is 100V, the average voltage of the decoupling capacitor is 500V, and the voltage amplitude of the decoupling capacitor is 120V. According to formula (20), the required capacitance C _d can be calculated as 10.615μF.

In formula (20), P _pv represents the rated output power, ω represents the grid angular frequency, V _av represents the average value of the decoupling capacitor voltage, and ΔV represents the decoupling capacitor voltage amplitude. Other simulation parameters are shown in Table 3.

Table 3 Simulation parameters

FIG. 11 is a waveform diagram of four switching pulse waveforms and U _inv before and after the power decoupling circuit is connected according to the embodiment of the present invention. Part (a) of FIG. 11 is a waveform diagram of U _inv before and after the power decoupling circuit is connected. FIG. 11 Part (b) of Figure 11 shows the waveforms of the first switch before and after the power decoupling circuit is connected. Part (c) of Figure 11 is the waveform of the second switch before and after the power decoupling circuit is connected. Figure 11 (d) Part is the waveform diagram of the third switch tube before and after the power decoupling circuit is connected, and part (e) of FIG. 11 is the waveform diagram of the fourth switch tube before and after the power decoupling circuit is connected.

The working state of the inverter before and after the power decoupling circuit is connected to the power decoupling circuit at 0.06s is described in detail below.

As shown in Figure 12, when S4 is used as the master switch to control the decoupling circuit, part (a) of Figure 12 is the PEM drive signal before and after the power decoupling circuit is connected, and part (b) of Figure 12 is the power decoupling The waveform of the inverter output voltage U _inv before and after the circuit is connected and the part (c) of Figure 12 is the comparison of the waveform of the inductor current L _d before and after the power decoupling circuit is connected.

When U _inv >0, the two narrow pulses of S4-PEM in the figure correspond to mode one, and the decoupling capacitor C _d absorbs power; when U _inv <0, one wide pulse of S4-PEM in the figure corresponds to mode three , the decoupling capacitor C _d releases power. At the same time, pay attention to control the PEM signal so that the power released by the decoupling capacitor C _d is equal to the absorbed power, so as to achieve the effect of power balance.

13 is a waveform diagram of the pulse waveform of the third switch tube, U _inv and inductor current in different modes before and after the power decoupling circuit is connected to the embodiment of the present invention, and part (a) of FIG. 13 is the pulse waveform of the third switch tube . Part (b) of FIG. 13 is the waveform diagram of U _inv , and part (c) of FIG. 13 is the waveform diagram of the inductor current.

FIG. 14 is a comparison diagram of waveforms of U _inv , I _d , and U _d before and after the power decoupling circuit is connected according to the embodiment of the present invention. Part (a) of Figure 14 is the waveform diagram of U _inv , part (b) of Figure 14 is the waveform diagram of Id, and part (c) of Figure 14 is the waveform diagram of U _d , as shown in Figure 14, the decoupling capacitor The voltage fluctuates between 360V and 500V, and the average voltage is 430V, which has reached the expected value.

15 shows the waveforms of U _inv before and after the decoupling circuit works before and after the power decoupling circuit of the embodiment of the present utility model, the output voltage U _ac after LC filtering (which can replace the waveform of the grid-connected current i _ac ), and the bus capacitor voltage U _dc Comparison chart. Part (a) of Figure 15 is the waveform diagram of U _inv , part (b) of Figure 15 is the waveform diagram of the output voltage U _ac after LC filtering, and part (c) of Figure 15 is the waveform diagram of the bus capacitor voltage U _dc . As shown in Figure 15, before the decoupling circuit is connected, because the bus capacitor uses a small-capacity film capacitor of 40μF, the secondary power pulsation from the inverter output side cannot be stabilized, so the bus capacitor voltage oscillates greatly, and the amplitude at about 150V. Affected by the busbar voltage oscillation, a large number of harmonics are introduced into the AC output side of the inverter, and the waveforms of U _inv and U _ac are seriously distorted. At this time, the THD value of U _ac is 5.86%, and the power decoupling circuit is connected to the bus at 0.06s. The oscillation of the capacitor voltage is greatly reduced, and the waveform quality of the output voltage U _ac is greatly improved after filtering. Its THD value is 1.25%, and the total harmonic distortion before and after the power decoupling circuit is reduced by about 78.67%. The voltage U _ac phase remains continuous, showing a good tracking function. Therefore, turning on the power decoupling circuit is of great significance to improve the waveform quality and reduce the capacitance value of the busbar.

The above tests are all measured under the conditions of DC terminal voltage 100V and AC working full load 200W. When the grid side load is 40%, 50%, 66.8%, 100%, 200% of the rated value, the simulation results and The parameters are shown in Table 4. When the load is changed, C _d is calculated according to the average value of the decoupling capacitor voltage of 200V and the amplitude of 120V, as in the simulation under the rated state. When the load power on the AC side increases, the pulsating energy that needs to be balanced also increases, that is, the power required to balance the input and output increases, so the DC side bus capacitance required by the original circuit increases. When THD1 does not have a decoupling circuit The harmonic distortion rate of the grid-connected current measured, THD2 is the harmonic distortion rate of the grid-connected current measured with a decoupling circuit. When the load power on the AC side increases, the pulsating energy that needs to be balanced also increases, that is, the input and output needs. The balanced power increases, so the DC side bus capacitance value required by the original circuit (without decoupling circuit) increases, so the total harmonic distortion (THD value) becomes difficult to control with the increase of the AC side load power and are greater than 5%, and the total harmonic distortion rate reaches 12.37% when it reaches 400W, which greatly reduces the efficiency of the inverter, and the total harmonic distortion of the grid-connected current with decoupling circuit increases with the increase of the load power on the AC side. Continuous reduction, the effect of balancing input and output power is becoming more and more obvious. When the load power on the AC side reaches 400W, the total harmonic distortion is less than 1%, which greatly improves the working efficiency of high-power inverters. Therefore, the inverter with decoupling circuit has a much longer lifespan than the electrolytic capacitor inverter. In the high-power working environment, the inverter with decoupling circuit even works more efficiently than the electrolytic capacitor inverter.

Table 4 Simulation results under various working conditions

On the basis of the above theoretical analysis and simulation, the experiment is carried out. The main circuit of the experiment is a two-stage inverter, and the power supply is a 1500W regulated DC power supply. The voltage-stabilizing large electrolytic capacitor of the front-stage Boost circuit in the two-stage inverter replaces the 20μF film capacitor, and the experimental waveform shown in Figure 16 can be obtained when the decoupling capacitor C _d is not connected.

In the experiment, the input voltage of Boost is 30V. Figure 16 shows that when the decoupling circuit is not connected, there is a secondary ripple with obvious jitter at both ends of the film capacitor on the output side of the Boost circuit, and the amplitude of the secondary ripple is about 15V. , and the output side of the inverter can see that the voltage waveform has obvious distortion. The experimental effect of connecting the decoupling circuit is shown in Figure 17. Figure 17 shows that when the decoupling circuit is connected, there is also a secondary ripple of jitter at both ends of the film capacitor on the output side of the boost circuit, but the ripple amplitude is about 10V, which is about 33.3% lower than before, indicating that the inverter The quality of the output voltage waveform has been significantly improved, and the decoupling circuit has obviously played a role in reducing the capacitance value of the Boost side capacitor.

Both simulation and experimental results show that the power decoupling circuit provided by the embodiment of the present utility model can replace the traditional electrolytic capacitor to realize the power coupling function by connecting to the AC output end of the inverter in parallel, reduce the value of the coupling capacitance, and improve the micro-inversion. The efficiency of the inverter is realized, and a long-life electrolytic capacitor-free micro-inverter is realized. In addition, the structure of the inverter circuit is simple, the control technology is mature and reliable, and the system efficiency is high, which solves the problems of inverter stability and short service life in the distributed power generation system.

To sum up, the micro-inverter based on the power decoupling circuit of the present invention has the following advantages:

1. The AC output side of the micro-inverter is connected to the power decoupling circuit, which undertakes energy buffering, greatly reduces the coupling capacitance value, improves the performance and life of the micro-inverter, and realizes a micro-inverter without electrolytic capacitors. .

2. Carry out closed-loop control of the entire system, control the duty cycle of the switch tube of the front-stage Boost circuit by measuring the bus voltage U _dc and bus current I _dc , and control the power grid voltage U _ac and the output voltage of the AC side of the micro-inverter. The measurement moment of U _inv and decoupling capacitor voltage U _d controls the duty cycle of the power decoupling circuit, so as to control the output grid-connected current waveform and reduce the secondary disturbance power.

3. The power decoupling circuit is connected in parallel on the AC output side of the inverter, which is equivalent to an active power filter to balance the pulsating energy, thereby suppressing the secondary disturbance power in the inverter, and greatly reducing the voltage change on the AC side. Coupling capacitor value.

4. Using the pulse modulation technology PEM, in the DCM mode, the power decoupling circuit is controlled, the structure is simple, and the control is convenient.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments can be referred to each other.

The principles and implementations of the present utility model are described herein using specific examples. The descriptions of the above embodiments are only used to help understand the method and the core idea of the present utility model; meanwhile, for those skilled in the art, according to The idea of the present utility model will have changes in the specific implementation and application scope. In conclusion, the content of this specification should not be construed as a limitation on the present invention.

Claims (7)

1. A power decoupling circuit, comprising: the first bridge arm, the second bridge arm, the inductor and the decoupling capacitor are connected in series; the first bridge arm, the second bridge arm and the decoupling capacitor are connected in parallel;

the first bridge arm comprises a first diode switch circuit and a second diode switch circuit; one end of the first diode switch circuit is connected with the anode of the decoupling capacitor, the cathode of the decoupling capacitor is connected with one end of the second diode switch circuit, the other end of the first diode switch circuit is respectively connected with the other end of the second diode switch circuit and one end of the inductor, and the other end of the inductor is connected with the anode of the output end of the inverter;

the second bridge arm comprises a third diode switch circuit and a fourth diode switch circuit; one end of the third diode switch circuit is connected with the anode of the decoupling capacitor, the cathode of the decoupling capacitor is connected with one end of the fourth diode switch circuit, and the other end of the third diode switch circuit is respectively connected with the other end of the fourth diode switch circuit and the cathode of the output end of the inverter.

2. The power decoupling circuit of claim 1 wherein said first diode switch circuit comprises a first switch tube and a first diode, an emitter of said first switch tube being connected to an anode of said first diode, and a collector of said first switch tube being connected to a cathode of said first diode and an anode of said decoupling capacitor, respectively;

the second diode switching circuit comprises a second switching tube and a second diode, wherein an emitting electrode of the second switching tube is connected with an anode of the second diode, and a collector electrode of the second switching tube is respectively connected with a cathode of the second diode, an emitting electrode of the first switching tube and one end of the inductor;

the third diode switch circuit comprises a third switch tube and a third diode, wherein an emitter of the third switch tube is connected with the anode of the third diode, and a collector of the third switch tube is respectively connected with the cathode of the third diode and the anode of the decoupling capacitor;

the fourth diode switch circuit comprises a fourth switch tube and a fourth diode, an emitting electrode of the fourth switch tube is connected with an anode of the fourth diode, and a collector electrode of the fourth switch tube is respectively connected with a cathode of the fourth diode, an emitting electrode of the third switch tube and a cathode of an output end of the inverter.

3. The power decoupling circuit of claim 1 wherein said inverter comprises a third leg, a fourth leg, and an inverter capacitor; the third bridge arm, the fourth bridge arm and the inverter capacitor are connected in parallel; the positive electrode of the inversion capacitor is connected with the positive electrode of the power supply, and the negative electrode of the inversion capacitor is connected with the negative electrode of the power supply; the third bridge arm comprises a fifth diode switch circuit and a sixth diode switch circuit; one end of the fifth diode switch circuit is connected with the anode of the inverter capacitor, the cathode of the inverter capacitor is connected with one end of the sixth diode switch circuit, and the other end of the fifth diode switch circuit is respectively connected with the other end of the sixth diode switch circuit and the other end of the inductor;

the fourth bridge arm comprises a seventh diode switch circuit and an eighth diode switch circuit; one end of the seventh diode switch circuit is connected with the anode of the inverter capacitor, the cathode of the inverter capacitor is connected with one end of the eighth diode switch circuit, and the other end of the seventh diode switch circuit is respectively connected with the other end of the eighth diode switch circuit and the other end of the third diode switch circuit.

4. The power decoupling circuit of claim 3 wherein said fifth diode switch circuit includes a fifth switch tube and a fifth diode, an emitter of said fifth switch tube is connected to an anode of said fifth diode, and a collector of said fifth switch tube is respectively connected to a cathode of said fifth diode and an anode of said inverting capacitor;

the sixth diode switching circuit comprises a sixth switching tube and a sixth diode, wherein an emitting electrode of the sixth switching tube is connected with the anode of the sixth diode, and a collector electrode of the sixth switching tube is respectively connected with the cathode of the sixth diode, the emitting electrode of the fifth switching tube and the other end of the inductor;

the seventh diode switching circuit comprises a seventh switching tube and a seventh diode, wherein an emitting electrode of the seventh switching tube is connected with an anode of the seventh diode, and a collector electrode of the seventh switching tube is respectively connected with a cathode of the seventh diode and an anode of the inverter capacitor;

the eighth diode switching circuit comprises an eighth switching tube and an eighth diode, an emitting electrode of the eighth switching tube is connected with an anode of the eighth diode, and a collector electrode of the eighth switching tube is respectively connected with a cathode of the eighth diode, an emitting electrode of the seventh switching tube and the other end of the third diode switching circuit.

5. The power decoupling circuit of claim 2 wherein said first switching transistor, said second switching transistor, said third switching transistor and said fourth switching transistor are all IGBT devices.

6. The power decoupling circuit of claim 1 wherein said first diode switch circuit, said second diode switch circuit, said third diode switch circuit and said fourth diode switch circuit are identical in circuit configuration.

7. The power decoupling circuit of claim 3 wherein said fifth diode switch circuit, said sixth diode switch circuit, said seventh diode switch circuit and said eighth diode switch circuit are identical in circuit configuration.

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