CN211018828U - Multifunctional wireless repeater - Google Patents
Multifunctional wireless repeater Download PDFInfo
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- CN211018828U CN211018828U CN201921759341.1U CN201921759341U CN211018828U CN 211018828 U CN211018828 U CN 211018828U CN 201921759341 U CN201921759341 U CN 201921759341U CN 211018828 U CN211018828 U CN 211018828U
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Abstract
The utility model relates to a multi-functional wireless repeater in network interconnection equipment field, including master control CPU and power, be equipped with rectifier circuit between master control CPU and the input power, still contain two wireless module, the RS485 interface, the CAN interface and the I2C interface that is used for external sensor, the RS232 interface, participate in RS232_ RXD and RS232_ TXD on the master control CPU, participate in RS485_ RXD and RS485_ TXD, participate in CAN _ RXD and CAN _ TXD, participate in I2C1_ SDA and I2C1_ SC L and be connected with above-mentioned interface one-to-one, the RS485 interface, the data of wireless device is received to the CAN interface, recycle wireless module and go out data broadcasting, convey the wireless device that corresponds to received wireless data simultaneously, the used frequency channel difference scope 1MHZ of two wireless modules, first wireless module is used for and the gateway communication, the second wireless module is used for and the terminal communication, two modules CAN receive and dispatch simultaneously, each other does not interfere with each other.
Description
Technical Field
The utility model relates to a network interconnection equipment technical field, concretely relates to multi-functional wireless repeater.
Background
The repeater is used for prolonging the network distance under the local area network environment, operates in an OSI physical layer, is suitable for interconnection of two types of networks which are completely the same, has the main function of expanding the network transmission distance by retransmitting or forwarding data signals, has the function of amplifying and regenerating signals on a line, is used for expanding the length of a local area network segment, and is commonly used for bidirectional forwarding work of physical signals between two network nodes. Due to the loss, the power of the signal transmitted on the line will gradually attenuate, and when the attenuation reaches a certain degree, the signal will be distorted, thereby causing a receiving error.
The wireless repeater is placed between two wireless transmission devices and plays a role in signal amplification and extension. In a short-distance wireless communication system, under the influence of various factors such as environment and distance, the attenuation of wireless signals and the loss of wireless data are the biggest problems of short-distance wireless communication. In the prior art, the wireless repeater has single function, inconvenient installation and arrangement and complex operation method.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the defects of the prior art and providing a multifunctional wireless repeater with comprehensive functions, convenient installation and simple operation.
The purpose of the utility model is realized through the following technical scheme:
the multifunctional wireless repeater comprises a master control CPU, a power supply for supplying power to the master control CPU, two wireless modules, an RS485 interface, a CAN interface, an I2C interface and an RS232 interface, wherein the frequency difference between the used frequency bands of the two wireless modules is 1MHz, a rectifying circuit is arranged between the master control CPU and the input power supply, the master control CPU is electrically connected with the two wireless modules, the RS485 interface and the CAN interface, an RS232 interface circuit is connected between a pin RS232_ RXD and a pin RS232_ TXD in the master control CPU, an RS485 interface circuit is connected between the pin RS485_ RXD and the pin RS485_ TXD, a CAN interface circuit is connected between the pin CAN _ RXD and the pin CAN _ TXD, and an I2C interface circuit is connected between the pin I2C1_ and the pin I2C1_ SC L.
Specifically, the serial peripheral interface of SPI for connecting SPI bus is also provided.
Specifically, the power supply comprises a DC-DC chip with the model number of TPS8543 and is suitable for wide voltage input of 8V-36V.
Specifically, the main control CPU is selected to be CORTEX-M0.
Specifically, the two wireless modules are divided into a first wireless module and a second wireless module, the first wireless module is in communication connection with the wireless gateway, and the second wireless module is in communication connection with the terminal device.
Specifically, the RS232 interface is electrically connected with the RS485 interface chip.
Compared with the prior art, the utility model following advantage and beneficial effect are included:
(1) the utility model discloses in add RS485 interface and CAN interface and be used for connecting one of them wireless device, with the data of this wireless device through RS485 interface and the wired transmission of CAN interface to multi-functional wireless repeater, multi-functional wireless repeater rethread wireless module goes out data broadcasting, sends the wireless device of connecting RS485 interface and CAN interface to received wireless data through the bus simultaneously. The method and the device realize dual support for wired and wireless terminals, enrich types of terminals which can be accessed, and increase flexibility of wireless repeater access.
(2) The utility model discloses in be equipped with two wireless module, the used frequency channel of two wireless module differs the scope at 1MHz, one of them wireless module be used for with the gateway communication, another module be used for with the terminal communication. Because the frequency bands are different, the two wireless modules can be simultaneously operated without mutual interference. Efficient transmission of signals is achieved.
Drawings
Fig. 1 is a module connection diagram of the present invention.
Fig. 2 is a circuit schematic of a power supply.
Fig. 3 is a wiring schematic diagram of the master CPU.
Fig. 4 is a circuit schematic diagram of the RS232 interface.
Fig. 5 is a schematic circuit diagram of the CAN interface.
Fig. 6 is a circuit schematic diagram of an RS485 interface.
Fig. 7 is a circuit schematic of the I2C interface.
FIG. 8 is a schematic diagram of the circuitry to which master CPU pin IN _ IN0 connects.
FIG. 9 is a schematic diagram of the circuit to which the master CPU pin IN _ OUT0 connects.
Fig. 10 is a table of input source and output source selection comparisons.
Detailed Description
The present invention will be described in further detail with reference to the following examples and drawings, but the present invention is not limited thereto.
In the description of the present invention, it is to be noted that the terms "mounted, disposed, connected" and the like are to be interpreted broadly unless explicitly defined or limited otherwise. Furthermore, the utility model discloses a parts such as master control CPU, wireless module, power are the parts that general standard spare or field technician know, and its structure and principle all are this technical staff and all can learn through the technical manual or learn through conventional experimental method.
As shown in fig. 1 to 10, the specific implementation process of the present invention is as follows:
in a spatially wide environment, the coverage of a wireless signal is more important than bandwidth and speed. The wireless repeater expands the distance of network transmission by retransmitting or forwarding data signals, has the function of amplifying and regenerating signals on a line, is used for expanding the length of a local area network segment, and is commonly used for bidirectional forwarding work of physical signals between two network nodes. It is therefore a better option to use a repeater to extend the coverage of the base station.
The multifunctional wireless repeater comprises a main control CPU and a power supply for supplying power to the main control CPU, and further comprises two wireless modules, an RS485 interface, an SPI interface, a CAN interface, an RS232 interface for externally connecting a sensor and an I2C interface.
The two wireless modules are respectively a first wireless module and a second wireless module, the first wireless module is in communication connection with the wireless gateway, and the second wireless module is in communication connection with the terminal equipment. The frequency bands used by the first wireless module and the second wireless module are different by 1MHz, so that simultaneous receiving and transmitting are realized without mutual interference.
The multifunctional wireless repeater in the embodiment can be externally connected with a power supply of 8V-36V, comprises a DC-DC chip with the model number of TPS8543, and reduces the input voltage to 3.3V low voltage to supply power for the main control CPU. The principle is as follows: the input circuit between the main control CPU and the input power supply comprises a rectifier bridge MB6S which converts alternating current into direct current, the voltage of 8V-36V is converted into 5V or 12V in the first stage, and the voltage of 5V or 12V is converted into 3.3V low voltage in the second stage. The output power supply is 5V or 12V according to the output result of the signals of the OUT _ CHG _1 circuit and the OUT _ CHG _2 circuit connected with the output signals PA8 and PA 9.
The calculation method is as follows: VOUT _ CHG ═ 1 ═ (1+10/1.1) × 1.221 ═ 12.321V
VOUT_CHG=0:Vout=(1+10/3.1)*1.221=5.159V
The conversion of the supply voltage is here known in the art, and a specific circuit schematic is shown in fig. 2. The DC-DC chip also functions to isolate the RS485 transceiver to eliminate the effects of common mode voltage.
The main control CPU is selected to be CORTEX-M0, and is respectively and electrically connected with the two wireless modules, the RS485 interface and the CAN interface. A plurality of pins of the main control CPU:
an RS232 interface circuit is connected between the pin RS232_ RXD and the pin RS232_ TXD, the circuit diagram is shown in figure 4, the pin C1+ is connected with the pin C1-through a capacitor C1001, the pin C2+ is connected with the pin C2-through a capacitor C1002, the signal output pin R2OUT is connected with an RS232 signal input end RS232_ RXD in the master control CPU, and the signal input pin T2IN is connected with an RS232 signal output end RS232_ TXD in the master control CPU.
An RS485 interface circuit is connected between the pin RS485_ RXD and the pin RS485_ TXD. The circuit schematic is shown in fig. 6.
A CAN interface circuit is connected between pin CAN _ RXD and pin CAN _ TXD, and the schematic circuit diagram is shown in fig. 5. The CAN interface is correspondingly connected with a CAN bus protocol to realize real-time control. The CAN bus protocol has been widely used in the prior art, and belongs to the prior art.
The I2C interface circuit is connected between the pin I2C1_ SDA and the pin I2C1_ SC L. the I2C interface comprises a clock line (SC L) and a data line (SDA). The two lines are in an open-drain or open-collector structure and are correspondingly connected with the pin I2C1_ SDA and the pin I2C1_ SC L on the master CPU respectively, so that a plurality of devices can be mounted.
The RS232 interface standard appears earlier, so the RS232 interface needs to be electrically connected with the RS485 interface chip when necessary to realize the conversion from the RS232 signal to the RS485 signal.
The SPI interface generally uses 4 lines, namely a serial clock line (SC L K), a master input/slave output data line MISO, a master output/slave input data line MOSI and a low-level effective slave selection line NSS, and can complete the following operations in one SPI clock cycle, wherein 1) the master sends 1 bit of data through the MOSI line, the slave reads the 1 bit of data through the line, 2) the slave sends 1 bit of data through the MISO line, and the master reads the 1 bit of data through the line.
The input source and output source comparison table of the master CPU is shown in fig. 10.
The utility model discloses a concrete implementation way does:
the master control CPU is used as an equipment core and is respectively electrically connected with the first wireless module, the second wireless module, the CAN interface, the RS485 interface, the SPI interface, the RS232 interface, the I2C interface and the power supply. The first wireless module and the second wireless module are in work division and cooperation and operate simultaneously without mutual interference, the first wireless module is communicated with the wireless gateway, and the second wireless module is communicated with the terminal equipment; the CAN interface and the RS485 interface are used for accessing a CAN bus protocol and an RS485 protocol to realize real-time control and data calculation of equipment; the SPI interface is used for externally connecting equipment, so that the main control CPU and various peripheral equipment are communicated in a serial mode to exchange information, and an SPI bus can be directly connected with various standard peripheral devices produced by various manufacturers; the power module processes and converts the wide voltage of 8V-36V into 3.3V low-voltage power for equipment to use through the DC-DC chip, so that the equipment in the embodiment has stronger adaptability, and plays an isolation role at the same time to eliminate the influence of common-mode voltage on the operation of the equipment.
The above-mentioned embodiments only express the embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (6)
1. The multifunctional wireless repeater comprises a master control CPU and a power supply for supplying power to the master control CPU, and is characterized by further comprising two wireless modules, an RS485 interface, a CAN interface, an I2C interface for externally connecting a sensor and an RS232 interface, wherein the frequency difference between the frequency bands of the two wireless modules is 1MHz, a rectifying circuit is arranged between the master control CPU and the input power supply, the master control CPU is electrically connected with the two wireless modules, the RS485 interface and the CAN interface, an RS232 interface circuit is connected between a pin RS232_ RXD and a pin RS232_ TXD in the master control CPU, an RS485 interface circuit is connected between the pin RS485_ RXD and a pin RS485_ TXD, a CAN interface circuit is connected between the pin CAN _ RXD and the pin CAN _ TXD, and an I2C1_ SDA and an I2C1_ SC L are connected with an I2C interface circuit.
2. The multi-functional wireless repeater according to claim 1, wherein: and an SPI serial peripheral interface used for connecting an SPI bus is also arranged.
3. The multi-functional wireless repeater according to claim 1, wherein: the power supply comprises a DC-DC chip with the model number of TPS8543 and is suitable for wide voltage input of 8V-36V.
4. The multi-functional wireless repeater according to claim 1, wherein: the main control CPU is selected to be CORTEX-M0.
5. The multi-functional wireless repeater according to claim 1, wherein: the two wireless modules are divided into a first wireless module and a second wireless module, the first wireless module is in communication connection with the wireless gateway, and the second wireless module is in communication connection with the terminal equipment.
6. The multi-functional wireless repeater according to claim 1, wherein: and the RS232 interface is electrically connected with the RS485 interface chip.
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CN201921759341.1U CN211018828U (en) | 2019-10-21 | 2019-10-21 | Multifunctional wireless repeater |
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CN201921759341.1U CN211018828U (en) | 2019-10-21 | 2019-10-21 | Multifunctional wireless repeater |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117579440A (en) * | 2024-01-17 | 2024-02-20 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117579440A (en) * | 2024-01-17 | 2024-02-20 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
CN117579440B (en) * | 2024-01-17 | 2024-04-09 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
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