CN210667778U - Multi-applicability voice recognition circuit - Google Patents
Multi-applicability voice recognition circuit Download PDFInfo
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- CN210667778U CN210667778U CN201921108871.XU CN201921108871U CN210667778U CN 210667778 U CN210667778 U CN 210667778U CN 201921108871 U CN201921108871 U CN 201921108871U CN 210667778 U CN210667778 U CN 210667778U
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Abstract
The utility model discloses a speech recognition circuit of many suitability, the speech control chip through among the speech control circuit has integrateed ARM's Cortex-M0 nuclear, and operating frequency 48MHZ, speech recognition's correlation function mainly moves the completion on this chip, reset circuit: the system can normally operate when the system is powered on every time, the memory circuit is used for storing voice contents to be broadcasted, after the voice contents are identified every time, the sound files are stored in the memory circuit, and the downloading circuit is used for connecting the voice identification chip of a user with other products through the interface circuit, the serial port or the I2C when voice identification instructions of different clients are the same and the voice instructions are required to be replaced. Therefore, the design of hardware of other products is not needed, the voice recognition chip is directly integrated in the product to be produced, the voice recognition chip can normally work without being connected with WIFI, and the hardware cost is greatly reduced due to the structural design.
Description
Technical Field
The utility model relates to a speech recognition technology field, in particular to speech recognition circuit of many suitability.
Background
With the continuous development of artificial intelligence, the field of speech recognition is also rapidly developing. In order to diversify the application scenes of the voice recognition technology, the carrier is modularized, the limit of the use space time of products is broken through, and besides many devices which can only recognize voice are manufactured by combining with the user habits and the artificial intelligence technologies such as self-learning. The current voice recognition technology is mostly applied to products which are integrated by voice recognition such as voice lamps and intelligent voice sounds and main functions of the products, and users can only control the single products singly and recognize and control the single products in a close range, so that the product types are solidified and space-time limitation is generated. The inability to control any wireless product at any time and place; for similar products, each use is realized by depending on a mobile phone APP, the initialization setting of the mobile phone is removed, and the mobile phone is not needed to intervene later; the novel watch is also a wearing product on the market, combines the voice recognition control technology, has non-main functions, is mostly modified by a child watch, has large volume and single wearing and using mode, has poor experience on the aspect of voice recognition control and immature technology; the current voice recognition technology rarely relates to safety in the civil field, and the safety level of the voice recognition technology is improved no matter in the intelligent household field or intelligent buildings or other application scenes.
Therefore, the existing voice recognition device has the technical problems of low miniaturization degree, low safety, complex use and complex structure which need to depend on other equipment in a scene. Therefore, it is desirable to provide an intelligent speech recognition module that solves the above-mentioned problems.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the main technical problem who solves provides a speech recognition circuit of many suitability, and this speech control circuit is applicable to multiple application, need not to connect wifi and just can realize off-line speech recognition, and such structural design greatly reduced the hardware cost.
In order to solve the problem, the utility model provides a speech recognition circuit of many suitability, this circuit including the microphone circuit that is used for gathering sound, be used for the storage to need the sound file of broadcast memory circuit, interface circuit, be used for the programming burn and debug download circuit, digifax isolating circuit and the speech control circuit, microphone circuit, memory circuit, interface circuit, download circuit respectively, digifax isolating circuit and speech control circuit electricity are connected.
Furthermore, the digital-to-analog isolation circuit includes a resistor R74, a digital ground, an analog ground, a digital power supply VCCD, an analog power supply VCCA, and an inductor L1, wherein one end of the resistor R74 is connected to the analog ground, the other end of the resistor R is connected to the digital ground, one end of the inductor L1 is connected to the digital power supply VCCD, and the other end of the inductor L1 is connected to the analog power supply VCCA.
Further, the voice control circuit includes a voice recognition chip, a resistor R17, a capacitor C12, a capacitor C4, a capacitor C39, a magnetic bead FBA6, a resistor R83, a resistor R73, a capacitor C45, a capacitor C5, a capacitor C13, a capacitor C14, a capacitor C8, a capacitor C41 and a capacitor C6, the voice recognition chip is connected to the microphone circuit, the memory circuit, the interface circuit and the download circuit, the resistor R17 is connected to the 1 st pin of the voice recognition chip at one end and to the power supply VCCD at the other end, the capacitor C12 is connected to the 11 th pin of the voice recognition chip at one end and to the analog ground at the other end, one ends of the capacitor C4 and the capacitor C39 are connected to the 10 th pin of the voice recognition chip and to the analog ground at the other end, one end of the magnetic bead FBA6 is connected to the 17 th pin and the 21 th pin of the voice recognition chip at the other end and to the power supply VCCD at the other end, one end of the capacitor C585 and one, the other end is digit ground connection respectively, the 20 th pin digit ground connection of speech recognition chip, resistance R83 termination interface circuit's the 1 st pin, the 18 th pin of another termination speech recognition chip, resistance R73 termination interface circuit's the 2 nd pin, the 20 th pin of another termination speech recognition chip, electric capacity C14 termination power VCCD, other end ground connection, electric capacity C13 one end simulation ground connection, another termination power VCC-3V3, electric capacity C8 termination power VCCA, the 41 th pin of another termination speech recognition chip, the 41 th pin digit ground connection of speech recognition chip, electric capacity C14 one end 46 th pin of speech recognition chip, the 41 th pin of another termination speech recognition chip, electric capacity C6 one end 46 th pin of speech recognition chip, the 41 th pin of another termination speech recognition chip.
Furthermore, the output end of the microphone circuit is respectively connected with the 3 rd pin and the 4 th pin of the interface circuit, the microphone circuit comprises a resistor R43, a capacitor C9, a capacitor C46, a resistor R45, a capacitor C10, a resistor R44, a capacitor C47, a capacitor C48, a capacitor C43 and a capacitor C44, one end of the resistor R43 is connected with the 3 rd pin of the interface circuit, the other end of the resistor R45 is connected with the resistor C9, one ends of the capacitor C9 and the capacitor C46 are respectively connected with the common end of the resistor R43 and the resistor R45, the other ends of the capacitor C9 and the capacitor C46 and the capacitor C10 are respectively connected with the 42 th pin of the voice recognition chip, the other ends of the capacitor C10 and the resistor R45 are respectively connected with the digital ground, one end of the capacitor C43 is connected with the 3 rd pin of the interface circuit, the other end of the capacitor C48 is connected with the 43 th pin of the voice recognition chip, the other end is digitally grounded, one end of the resistor C44 is connected with the 4 th pin of the interface circuit, the other end is connected with the 44 th pin of the voice recognition chip, the resistor R44 and one end of the capacitor C47 are respectively connected with the 4 th pin of the interface circuit, and the other end is digitally grounded.
Furthermore, the memory circuit comprises a memory IC and a capacitor C42, wherein the 5 th pin and the 6 th pin of the memory IC are respectively connected with the 33 rd pin and the 34 th pin of the voice recognition chip, the common ends of the 3 rd pin, the 7 th pin and the 8 th pin of the memory IC are connected with one end of a capacitor C42, the other end of the capacitor C42 is connected with the analog ground, and the 3 rd pin of the memory IC is connected with the analog power supply.
Further, the interface circuit includes interface, resistance R84, resistance R82, resistance R19 and triode Q24, the 6 th pin of interface is connected to one end of resistance R84, another termination power VCCD, triode Q24's collecting electrode connects the 5 th pin of interface, triode Q24's emitter digital ground, resistance R82 is connected to triode Q24's base, resistance R19 one end connects triode Q24's base, other end simulation ground.
Further, the circuit also comprises a reset circuit, and the reset circuit is connected with the 22 nd pin of the voice recognition chip.
Furthermore, the circuit also comprises an indicating circuit, and the indicating circuit is connected with the 26 th pin and the 3 rd pin of the voice recognition chip.
Further, the model of the voice recognition chip is ISD9160-LQFP 48.
The utility model discloses voice control circuit, the Cortex-M0 nuclear of ARM has been integrateed through the voice control chip among the voice control circuit, and operating frequency 48MHZ, inside integrated 145 KB's FLASH and 12 KB's RAM. The related functions of voice recognition are mainly completed by running on the chip, and the reset circuit: the system can normally operate when the system is powered on every time, the memory circuit is used for storing voice contents to be broadcasted, after every recognition, if voice feedback is needed, the voice files are stored in the memory circuit, and the downloading circuit is used for burning bin files compiled by voice instructions to be updated into the module through the downloading circuit when the voice recognition instructions of different clients are the same and the voice instructions need to be replaced. Our speech recognition chip is connected to other products through interface circuits, serial ports or I2C. Therefore, the design of hardware of other products is not needed, the voice recognition chip is directly integrated in the product to be produced, and the voice recognition chip can normally work without being connected with WIFI. This greatly reduces hardware costs. The application field of the voice recognition function is greatly expanded. Such as the above mentioned intelligent desk lamp, small household appliance prompting, health care product, air conditioner companion, intelligent socket, automobile data recorder, electric fan. All products needing to be controlled can be integrated with the intelligent voice recognition function.
Drawings
In order to illustrate the embodiments of the invention or the technical solutions in the prior art more clearly, the drawings that are needed in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the description only show some embodiments of the invention and therefore should not be considered as limiting the scope, and for a person skilled in the art, other related drawings can also be obtained from these drawings without inventive effort.
Fig. 1 is a schematic circuit diagram of a voice control circuit in a voice recognition circuit with multiple applicability of the present invention.
Fig. 2 is a schematic circuit diagram of a digital-analog isolation circuit in a speech recognition circuit with multiple applicability.
Fig. 3 is a schematic circuit diagram of a microphone circuit in the speech recognition circuit with multiple applicability of the present invention.
Fig. 4 is a schematic circuit diagram of a memory circuit in the speech recognition circuit of the present invention.
Fig. 5 is a schematic circuit diagram of a download circuit in the speech recognition circuit of the present invention.
Fig. 6 is a schematic circuit diagram of an interface circuit in the speech recognition circuit of the present invention.
Fig. 7 is a schematic circuit diagram of a reset circuit in the speech recognition circuit of the present invention.
Fig. 8 is a schematic circuit diagram of an indicator circuit in the speech recognition circuit of the present invention.
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
To more clearly illustrate the technical solution of the present invention, the following claims are further described in detail with reference to specific embodiments and the drawings, it is to be understood that the following drawings only show some embodiments of the present invention, and therefore should not be considered as limiting the scope, and any limited number of modifications made by anyone within the scope of the claims still fall within the scope of the claims.
It should be understood that in the description of the present invention, it is to be noted that the terms "upper", "lower", and the like refer to orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships conventionally arranged in use of products of the present invention, and are used for convenience of description and simplicity of description, but do not refer to or imply that the devices or elements referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1 to 8, the circuit includes a microphone circuit for collecting sound, a memory circuit for storing a sound file to be played, an interface circuit, a download circuit for programming and debugging a program, a digital-analog isolation circuit, and a voice control circuit, where the microphone circuit, the memory circuit, the interface circuit, and the download circuit are respectively electrically connected to the digital-analog isolation circuit and the voice control circuit.
In this embodiment, the digital-to-analog isolation circuit of the voice control circuit includes a resistor R74, a digital ground, an analog ground, a digital power supply VCCD, an analog power supply VCCA, and an inductor L1, wherein one end of the resistor R74 of the voice control circuit is connected to the analog ground, the other end of the resistor R is connected to the digital ground, and one end of the inductor L1 of the voice control circuit is connected to the digital power supply VCCD, and the other end of the inductor L is connected to the analog. The digital-analog isolation circuit is used for isolating signals and inhibiting interference.
In this embodiment, the voice control circuit includes a voice recognition chip, a resistor R17, a capacitor C12, a capacitor C4, a capacitor C39, a magnetic bead FBA6, a resistor R83, a resistor R73, a capacitor C45, a capacitor C5, a capacitor C13, a capacitor C14, a capacitor C8, a capacitor C41 and a capacitor C6, the voice recognition chip is connected to the voice control circuit microphone circuit, the memory circuit, the interface circuit and the download circuit, the resistor R17 is connected to the 1 st pin of the voice recognition chip and to the power supply VCCD, the capacitor C12 is connected to the 11 th pin of the voice recognition chip and to the analog ground, the voice control circuit capacitor C4 and the capacitor C39 are connected to the 10 th pin of the voice recognition chip and to the analog ground, the FBA6 is connected to the 17 th pin and the 21 th pin of the voice recognition chip and to the power supply cd, the voice control circuit capacitor C45 and the capacitor C5 are connected to the FBA6, the other ends are respectively in digital grounding, the 20 th pin of the voice recognition chip of the voice control circuit is in digital grounding, one end of a voice control circuit resistor R83 is connected with the 1 st pin of the interface circuit, the other end of the voice control circuit resistor R73 is connected with the 2 nd pin of the interface circuit, the other end of the voice control circuit resistor R is connected with the 20 th pin of the voice recognition chip, one end of a voice control circuit capacitor C14 is connected with a power supply VCCD, the other end of the voice control circuit capacitor C13 is in analog grounding, the other end of the voice control circuit capacitor C13 is connected with a power supply VCC-3V3, one end of a voice control circuit capacitor C8 is connected with a power supply VCCA, the other end of the voice control circuit capacitor C6 is connected with the 46 th pin of the voice recognition chip, the 41 th pin of the voice control circuit voice recognition chip is in digital grounding, one end of a voice control circuit capacitor C14 is connected with the 46, the other end is connected with the 41 th pin of the voice recognition chip.
In this embodiment, the output terminal of the microphone circuit of the voice control circuit is connected to the 3 rd pin and the 4 th pin of the interface circuit, the microphone circuit of the voice control circuit includes a resistor R43, a capacitor C9, a capacitor C46, a resistor R45, a capacitor C10, a resistor R44, a capacitor C47, a capacitor C48, a capacitor C43 and a capacitor C44, one end of a resistor R43 of the voice control circuit is connected to the 3 rd pin of the interface circuit, the other end is connected to the resistor R45, one ends of the capacitor C9 and the capacitor C46 of the voice control circuit are connected to the common terminal of the resistor R43 and the resistor R45, the other end is connected to digital ground, one ends of the capacitor C9 of the voice control circuit, the capacitor C46 of the capacitor C10 of the voice control circuit are connected to the 42 th pin of the voice recognition chip, the other ends are connected to digital ground, the capacitor C10 of the voice control circuit is connected to the resistor R45, one end of, the other end is connected with the 43 th pin of the voice recognition chip, one end of a voice control circuit capacitor C48 is connected with the 42 th pin of the voice recognition chip, the other end is in digital grounding, one end of a voice control circuit resistor C44 is connected with the 4 th pin of the interface circuit, the other end is connected with the 44 th pin of the voice recognition chip, one ends of a voice control circuit resistor R44 and a capacitor C47 are respectively connected with the 4 th pin of the interface circuit, and the other ends are respectively in digital grounding.
In this embodiment, the voice control circuit memory circuit includes a memory IC and a capacitor C42, the 5 th pin and the 6 th pin of the memory IC of the voice control circuit are respectively connected to the 33 th pin and the 34 th pin of the voice recognition chip, the common terminals of the 3 rd pin, the 7 th pin and the 8 th pin of the memory IC of the voice control circuit are connected to one end of the capacitor C42, the other end of the capacitor C42 of the voice control circuit is connected to the analog ground, and the 3 rd pin of the memory IC of the voice control circuit is connected to the analog power supply.
In this embodiment, the interface circuit of the voice control circuit includes an interface, a resistor R84, a resistor R82, a resistor R19 and a transistor Q24, one end of the resistor R84 of the voice control circuit is connected to the 6 th pin of the interface, and the other end is connected to the power supply VCCD, the collector of the transistor Q24 of the voice control circuit is connected to the 5 th pin of the interface, the emitter of the transistor Q24 of the voice control circuit is grounded digitally, the base of the transistor Q24 is connected to the resistor R82, one end of the resistor R19 of the voice control circuit is connected to the base of the transistor Q24, and the other end is grounded in an analog.
In this embodiment, the circuit further includes a reset circuit, and the voice control circuit reset circuit is connected to the 22 nd pin of the voice recognition chip.
In this embodiment, the circuit further includes an indication circuit, and the voice control circuit is connected to the 26 rd and 3 rd pins of the voice recognition chip.
In the present embodiment, the model number of the voice recognition chip is ISD9160-LQFP 48. The chip can normally work only by externally connecting a loudspeaker and a microphone and then externally supplying DC-3.3V or DC-5V. And then the identification result is fed back to other main control platforms through the I2C or a serial port, or the brightness of other peripheral equipment or a mediation lamp is controlled through a common IO port or a PWM port. A Cortex-M0 core of ARM is integrated through a voice control chip in a voice control circuit, the running frequency is 48MHZ, and 145KB of FLASH and 12KB of RAM are integrated inside. The related functions of voice recognition are mainly completed by running on the chip, and the reset circuit: the system can normally operate when the system is powered on every time, the memory circuit is used for storing voice contents to be broadcasted, after every recognition, if voice feedback is needed, the voice files are stored in the memory circuit, and the downloading circuit is used for burning bin files compiled by voice instructions to be updated into the module through the downloading circuit when the voice recognition instructions of different clients are the same and the voice instructions need to be replaced. Our speech recognition chip is connected to other products through interface circuits, serial ports or I2C. Therefore, the design of hardware of other products is not needed, the voice recognition chip is directly integrated in the product to be produced, and the voice recognition chip can normally work without being connected with WIFI. This greatly reduces hardware costs. The application field of the voice recognition function is greatly expanded. Such as the above mentioned intelligent desk lamp, small household appliance prompting, health care product, air conditioner companion, intelligent socket, automobile data recorder, electric fan. All products needing to be controlled can be integrated with the intelligent voice recognition function.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: it is to be understood that modifications may be made to the above-described arrangements in the embodiments or equivalents may be substituted for some of the features of the embodiments described above, and such modifications or substitutions may be made without departing from the spirit and scope of the present invention in its aspects.
Claims (9)
1. The multi-applicability voice recognition circuit is characterized by comprising a microphone circuit for collecting voice, a memory circuit for storing a voice file to be played, an interface circuit, a downloading circuit for program burning and debugging, a digital-analog isolation circuit and a voice control circuit, wherein the microphone circuit, the memory circuit, the interface circuit, the downloading circuit and the digital-analog isolation circuit are respectively and electrically connected with the voice control circuit.
2. The voice recognition circuit of claim 1, wherein the digital-to-analog isolation circuit comprises a resistor R74, a digital ground, an analog ground, a digital power VCCD, an analog power VCCA, and an inductor L1, wherein the resistor R74 has one end connected to the analog ground and the other end connected to the digital ground, and the inductor L1 has one end connected to the digital power VCCD and the other end connected to the analog power VCCA.
3. The voice recognition circuit of claim 1, wherein the voice control circuit comprises a voice recognition chip, a resistor R17, a capacitor C12, a capacitor C4, a capacitor C39, a magnetic bead FBA6, a resistor R83, a resistor R73, a capacitor C45, a capacitor C5, a capacitor C13, a capacitor C14, a capacitor C8, a capacitor C41 and a capacitor C6, the voice recognition chip is connected to the microphone circuit, the memory circuit, the interface circuit and the download circuit, the resistor R17 is connected to the 1 st pin of the voice recognition chip and to the power VCCD, the capacitor C12 is connected to the 11 th pin of the voice recognition chip and to the analog ground, the capacitors C4 and C39 are connected to the 10 th pin of the voice recognition chip and to the analog ground, the magnetic bead A6 is connected to the 17 th pin and the 21 st pin of the voice recognition chip and to the power VCCD, one end of each of the capacitor C45 and the capacitor C5 is respectively connected with one end of the magnetic bead FBA6, the other end of each of the capacitor C45 and the capacitor C5 is respectively connected with the digital ground, the 20 th pin of the voice recognition chip is digitally grounded, one end of the resistor R83 is connected with the 1 st pin of the interface circuit, the other end of the resistor R83 is connected with the 18 th pin of the voice recognition chip, one end of the resistor R73 is connected with the 2 nd pin of the interface circuit, the other end of the resistor R is connected with the 20 th pin of the voice recognition chip, one end of the capacitor C14 is connected with the power supply VCCD, the other end of the capacitor C13 is grounded in an analog mode, the other end of the capacitor C13 is connected with the power supply VCC-3V3, one end of the capacitor C8 is connected with the power supply VCCA, the other end of the capacitor C8 is connected with the 41 th pin of the voice, the other end is connected with the 41 th pin of the voice recognition chip.
4. The voice recognition circuit of claim 1, wherein the output terminal of the microphone circuit is connected to the 3 rd and 4 th pins of the interface circuit, respectively, the microphone circuit comprises a resistor R43, a capacitor C9, a capacitor C46, a resistor R45, a capacitor C10, a resistor R44, a capacitor C47, a capacitor C48, a capacitor C43 and a capacitor C44, one end of the resistor R43 is connected to the 3 rd pin of the interface circuit, the other end is connected to the resistor R45, one ends of the capacitors C9 and C46 are connected to the common terminal of the resistor R43 and the resistor R45, the other ends are respectively connected to the digital ground, one ends of the capacitors C9 and C46 and the capacitor C10 are connected to the 42 th pin of the voice recognition chip, the other ends are respectively connected to the digital ground, the capacitor C10 is connected to the resistor R45, one end of the capacitor C43 is connected to the 3 rd pin of the interface circuit, and the other end is connected to the 43 th pin of the voice recognition chip, one end of the capacitor C48 is connected with the 42 th pin of the voice recognition chip, the other end is digitally grounded, one end of the resistor R44 is connected with the 4 th pin of the interface circuit, the other end is connected with the 44 th pin of the voice recognition chip, one ends of the resistor R44 and the capacitor C47 are respectively connected with the 4 th pin of the interface circuit, and the other ends are respectively digitally grounded.
5. The voice recognition circuit of claim 1, wherein the memory circuit comprises a memory IC and a capacitor C42, the 5 th pin and the 6 th pin of the memory IC are respectively connected with the 33 th pin and the 34 th pin of the voice recognition chip, the common terminal of the 3 rd pin, the 7 th pin and the 8 th pin of the memory IC is connected with one terminal of a capacitor C42, the other terminal of the capacitor C42 is connected to analog ground, and the 3 rd pin of the memory IC is connected to an analog power supply.
6. The voice recognition circuit of claim 1, wherein the interface circuit comprises an interface, a resistor R84, a resistor R82, a resistor R19, and a transistor Q24, wherein one end of the resistor R84 is connected to the 6 th pin of the interface, and the other end is connected to the VCCD, the collector of the transistor Q24 is connected to the 5 th pin of the interface, the emitter of the transistor Q24 is digitally grounded, the base of the transistor Q24 is connected to the resistor R82, one end of the resistor R19 is connected to the base of the transistor Q24, and the other end is analog grounded.
7. The voice recognition circuit of claim 1, further comprising a reset circuit coupled to pin 22 of the voice recognition chip.
8. The voice recognition circuit of claim 1, further comprising an indication circuit, wherein the indication circuit is connected to the 26 rd and 3 rd pins of the voice recognition chip.
9. The voice recognition circuit of claim 3, wherein the voice recognition chip is model number ISD9160-LQFP 48.
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CN201921108871.XU CN210667778U (en) | 2019-07-16 | 2019-07-16 | Multi-applicability voice recognition circuit |
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CN201921108871.XU CN210667778U (en) | 2019-07-16 | 2019-07-16 | Multi-applicability voice recognition circuit |
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