CN210183029U - Battery pack protection chip - Google Patents
Battery pack protection chip Download PDFInfo
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- CN210183029U CN210183029U CN201920890865.8U CN201920890865U CN210183029U CN 210183029 U CN210183029 U CN 210183029U CN 201920890865 U CN201920890865 U CN 201920890865U CN 210183029 U CN210183029 U CN 210183029U
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- 230000004224 protection Effects 0.000 title claims abstract description 99
- 238000001514 detection method Methods 0.000 claims abstract description 89
- 238000007599 discharging Methods 0.000 claims abstract description 18
- 238000004806 packaging method and process Methods 0.000 claims abstract description 6
- 101000697493 Homo sapiens Large proline-rich protein BAG6 Proteins 0.000 claims description 10
- 101001068634 Homo sapiens Protein PRRC2A Proteins 0.000 claims description 10
- 102100028047 Large proline-rich protein BAG6 Human genes 0.000 claims description 10
- 102100033954 Protein PRRC2A Human genes 0.000 claims description 10
- 101000908580 Homo sapiens Spliceosome RNA helicase DDX39B Proteins 0.000 claims description 9
- 102100024690 Spliceosome RNA helicase DDX39B Human genes 0.000 claims description 9
- 102100024016 G patch domain and ankyrin repeat-containing protein 1 Human genes 0.000 claims description 7
- 101000904261 Homo sapiens G patch domain and ankyrin repeat-containing protein 1 Proteins 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 6
- 101000760646 Homo sapiens Phosphatidylserine lipase ABHD16A Proteins 0.000 claims description 4
- 102100024634 Phosphatidylserine lipase ABHD16A Human genes 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 230000001960 triggered effect Effects 0.000 description 3
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 2
- 229910052744 lithium Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000000825 ultraviolet detection Methods 0.000 description 1
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Abstract
The utility model provides a battery package protection chip, including packaging shell and a plurality of pins of arranging in packaging shell both sides and connecting chip inner circuit. The battery pack protection chip comprises: the voltage detection module is used for leading out a battery pin and is configured for detecting the voltage of the battery pack; the battery pack protection chip is led out of a pin ISEN from the current detection module and is configured to receive and detect current flowing between the pin ISEN and a pin VSS; the temperature detection module is used for leading out a pin TREF and is configured to receive/output a preset temperature value; and the control module is configured to receive the voltage signal, the current signal and the temperature signal and generate a corresponding control signal to control the charging/discharging of the battery pack according to the received signals. Therefore, the charging/discharging of the battery pack can be effectively protected, the safety and the service life of the battery pack are improved, the functions of the pins of the chip are redefined, and the sequence of the pins is arranged, so that the pin layout of the chip is more reasonable.
Description
Technical Field
The utility model relates to a battery package protection chip especially relates to a battery package protection chip of many strings of battery package charging/discharging in-process.
Background
Lithium batteries are increasingly widely used in our lives, and the service life of the batteries affects the service life of electronic products.
The utility model discloses a chip is the battery package protection chip of high integration, low-power consumption, is three strings, four strings and five strings lithium polymer battery package respectively and provides charge/discharge protection, can be arranged in the protection of battery package among domestic appliance, electric tool or electric automobile, or the battery package in other applications. The life span and charge/discharge efficiency of the battery pack become weaker and weaker as the life span of the battery increases, and thus the effective protection of the charge/discharge of the battery pack can improve the safety and life span of the battery.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that through excessive pressure module, under-voltage module, the discharge current among the battery package protection chip overdischarge detection, the excess temperature that charges detects and the temperature that undercurrent that charges detects and the excess temperature that discharges detects and realize that the battery package charges/discharge protection, can effectual realization efficient battery protection. Meanwhile, the battery pack protection chip provides Cell-Tap-Open (Cell Tap Open circuit, abbreviated as CTO) detection and Temperature-Sensor-Open (Temperature Sensor, abbreviated as TSO) detection, and when any protection is triggered, the battery pack protection chip disconnects the charging and discharging switches to ensure system safety. The battery pack protection chip comprises three comparators for three levels of overcurrent protection, wherein each level comprises a suitable protection delay timer to avoid fast triggering.
The utility model provides a battery package protection chip, be in including packaging shell and range packaging shell both sides are connected a plurality of pins of chip internal circuit, include: the voltage detection module is led out of a battery pin, is connected with a battery in the battery pack and is configured to detect the voltage of the battery pack; the battery pack protection chip leads out a pin ISEN from the current detection module, is configured to receive current between the pin ISEN and a pin VSS, and detects the current between the pin ISEN and the pin VSS; a temperature detection module, said temperature detection module extracting a pin TREF configured to receive/output a preset temperature value; and the control module is connected with the voltage detection module, the current detection module and the temperature detection module, is configured to receive the voltage signal, the current signal and the temperature signal, and generates a corresponding control signal to control the charging and discharging of the battery pack according to the received signals.
Drawings
Fig. 1 is a block diagram showing the structure of each module of the battery pack protection chip of the present invention;
fig. 2 is a schematic pin diagram of a battery pack protection chip according to an embodiment of the present invention;
fig. 3 is a schematic pin diagram of a battery pack protection chip according to an embodiment of the present invention;
fig. 4 is a schematic pin diagram of another battery pack protection chip according to an embodiment of the present invention.
Detailed Description
In order to make the technical problem, technical solution and advantageous effects to be solved by the present invention more clearly understood, the following description is given in conjunction with the accompanying drawings and embodiments to illustrate the present invention in further detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Fig. 1 is a block diagram of functional modules inside a protection chip of a multi-string battery pack. The battery pack protection chip shown in fig. 1 includes three power modes in total: full power mode, sleep mode, and power down mode. Specifically, the full power mode includes the following features: when a non-safety event occurs, the battery pack protection chip can sequentially detect the conditions of the battery pack such as overvoltage (OV for short), undervoltage (UV for short), over-temperature discharge (DOT for short), over-temperature charge (COT for short), under-temperature charge (CUT for short), overcurrent (OC for short), temperature detection disconnection (TSO for short) and open circuit of a battery unit tap (CTO for short). In the full power mode, if the tap of the battery unit is open, the battery pack protection chip simultaneously disconnects the charging switch and the discharging switch, and stops all safety event detection until the tap open condition of the battery unit is removed from detection. When the battery pack is disconnected in temperature detection, the battery pack protection chip simultaneously disconnects the charging switch and the discharging switch and stops all safety event detection until the disconnection in temperature detection is relieved. When the discharge switch is turned off, the battery pack protection chip stops overcurrent detection.
Meanwhile, the battery pack protection chip also comprises a sleep mode, and when the battery pack is under-voltage, the battery pack protection chip is opened and the electric switch is switched on to enter the sleep mode. In the sleep mode, the battery pack protection chip periodically performs overvoltage detection and exits from the sleep mode state detection, wherein the detection period is twice that in the full power mode. The charge under-temperature, charge over-temperature, and temperature detection off are performed periodically for twice the period of detection as in the full power mode. When the temperature detection is disconnected, the battery pack protection chip simultaneously disconnects the charging and discharging switches and stops all safety event detection until the disconnection condition of the temperature detection is relieved. In the sleep mode, overcurrent, discharge over-temperature, and cell tap open circuit conditions are not detected. The battery pack protection chip comprises a shutdown mode, and in the shutdown mode, the battery pack protection chip switches on the charging switch and the discharging switch.
Fig. 1 is a block diagram of internal functions of a battery pack protection chip, which includes a voltage detection module 102, a current detection module 104, a temperature detection module 106, and a control module 108. Specifically, the voltage detection module 102 leads out a battery pin, wherein the voltage detection module 102 is connected with a battery in the battery pack and configured to detect the voltage of the battery pack. The pack protection chip is led out of the current detection module 104 by a pin ISEN, configured to receive a current between the pin ISEN and a pin VSS, and detect a current between the pin ISEN and the pin VSS. The temperature detection module 106 derives a pin TREF configured to receive/output a temperature preset value. The control module 108 is connected to the voltage detection module 102, the current detection module 104, and the temperature detection module 106, and configured to receive the voltage signal, the current signal, and the temperature signal, and generate corresponding control signals to control charging and discharging of the battery pack according to the received signals.
Further, the battery pack protection chip further includes a temperature sensor disconnection detection module 110, a timer 112, a CFET (Field-Effect Transistor for charge control) driver module 114, a load disconnection detection module 116, a DFET (Field-Effect Transistor for discharge control) driver module 118, and a LDO (Low Dropout Regulator) bias 120. As shown in fig. 1, the voltage detection module 102 is used for detecting the voltage condition of the battery in the battery pack, and is connected to the battery in the battery pack, and the battery pack protection chip leads out the battery pin from the voltage detection module 102. Taking a battery pack consisting of three strings of batteries as an example, a first battery, a second battery and a third battery are named respectively, wherein a battery pin BAT3 is connected with a positive terminal of a battery 3 (such as the third battery) in the battery pack, a battery pin BAT2 is connected with a positive terminal of the second battery and a negative terminal of the third battery in the battery pack, and a battery pin BAT1 is connected with a positive terminal of the first battery and a negative terminal of the second battery in the battery pack. Specifically, the Voltage detection module 102 includes an OV detection unit (Over-Voltage detection unit), a UV detection unit (Under-Voltage detection unit), and a battery cell tap open circuit unit, and is configured to detect the Voltage and the connection state of the battery cells in the battery pack. In one embodiment, when an over-voltage condition occurs in the battery pack, the voltage detection module 102 generates an over-voltage signal and sends the over-voltage signal to the control module 108, the control module 108 triggers the over-voltage protection, and the charging/discharging control unit 1085 turns off the charging switch, as shown in fig. 1, instructing the CFET driver module 114 to turn off the charging switch. When the voltage in the battery pack is in an undervoltage state, i.e., the battery pack has undervoltage protection, also referred to as over-discharge protection of the battery pack, the voltage detection module 102 generates an undervoltage signal and sends the undervoltage signal to the control module 108, and triggers the undervoltage protection, and the charge/discharge control unit 1085 in the control module 108 instructs the DFET driver module 118 to turn off the discharge switch and enter the sleep mode.
Further included in the voltage detection module 102 is a cell tap open function unit configured to trigger the cell tap open protection when any one of the charge switch or the discharge switch is turned on and the voltage of any one of the batteries in the battery pack is lower than a first preset voltage, and to release the cell tap open protection state when the voltages of all the batteries in the battery pack are higher than the first preset voltage and the battery pack is in a charging state or a load off state.
As shown in fig. 1, the battery pack protection chip further includes a current detection module 104 configured to detect a current state of the battery pack, specifically, an overcurrent state detection of the battery pack. As shown in fig. 1, the Current detection module 104 includes an OC1(Over-Current, first-stage overcurrent) detection unit, an OC2(Over-Current, second-stage overcurrent) detection unit, and an SC (Short-Circuit, also referred to as third-stage overcurrent) detection unit, and specifically, the OC1 detection unit is configured to activate first-stage overcurrent discharge protection when a voltage between the pin ISEN and the pin VSS in fig. 1 is higher than a first preset discharge voltage within a first preset time interval; when the voltage between the pin ISEN and the pin VSS in fig. 1 is higher than a second preset discharging voltage within a second preset time interval, the second stage of overcurrent discharging protection is activated, wherein the value of the second preset voltage is twice as large as the value of the first preset voltage. The SC detection unit is configured for a short-circuit protection function, also referred to as a third level overcurrent discharge protection, which is activated when the voltage between pin ISEN and pin VSS in fig. 1 is higher than a third predetermined discharge voltage within a third predetermined time interval, also referred to as a third level overcurrent discharge protection, wherein the third predetermined discharge voltage is equal to five times the first predetermined discharge voltage. In any event, the battery pack protective core segments open the electrical switch whenever the three protections are activated.
Further, the battery pack protection chip further includes a Temperature detection module 106, as shown in fig. 1, the Temperature detection module 106 is connected to the control module 108, and includes a DOT (Discharge Over-Current Over-Temperature) detection unit, a COT (Charge Over-Current Over-Temperature) detection unit, and a CUT (Charge-Under-Temperature) detection unit. When the battery pack protection chip triggers discharge over-temperature protection, the battery pack protection chip simultaneously disconnects the charging switch and the discharging switch, and when the charge over-temperature protection is triggered, the battery pack protection chip switches on the charging switch; when the charging under-temperature protection function is triggered, the battery pack protection core segment switches on the charging switch.
As shown in fig. 1, the battery pack protection chip 100 further includes a control module 108, which includes an external temperature detection unit 1081, a delay control unit 1083, a charging/discharging control unit 1085, a battery disconnection detection control unit 1087, and a battery selection control unit 1089. Wherein the control module 108 is coupled to the timer 112, the CFET driver module 114, the load disconnect detection module 116, and the DFET driver module 118. The utility model discloses a battery package protection chip includes the aforesaid each functional module to draw forth the pin from each functional module.
As shown in fig. 2, a three-string battery pack protection chip Z1 includes a package case 1 and fourteen pins arranged on two sides of the package case 1 and connected to the internal circuit of the chip. Pin VCC is a power supply terminal, pin VDDA is a 5V power supply terminal, and is used to supply power to the interior of the battery pack protection chip, where pin VCC and pin VDDA are both connected to LDO bias module 120 in the battery pack protection chip. The battery pin BAT3, the battery pin BAT2, and the battery pin BAT1 are connected to the voltage detection module 102 inside the package case 1. Specifically, the pin BAT3 is connected to the positive terminal of the battery 3 in the package, the pin BAT2 is connected to the positive terminal of the battery 2 and the negative terminal of the battery 3, and the pin BAT1 is connected to the positive terminal of the battery 1 and the negative terminal of the battery 2, respectively representing the voltage values at the positive terminals of the battery 3, the battery 2 and the battery 1 in the package. Pin VSS is the ground terminal of the chip. Pin ISEN is connected to a current detection module 104 inside the package 1. Pins TREF and TS are connected to temperature sensing module 106 inside package 1, wherein pins TS are further connected to temperature sensor disconnection sensing module 110 inside package 1. Pin DSG is connected to DFET driver module 118 inside package 1. Pin VM is connected to load disconnection detection module 116 inside package 1 and pin CHG is connected to CFET driver module 114 inside package 1. Pin SDX and pin SCX are connected to control module 108 inside package 1. Pin SDX and pin SCX are used to configure parameters such as, but not limited to, configuration voltage protection thresholds, current protection thresholds, temperature protection thresholds, etc. during chip manufacturing.
The pin VSS, the battery pins BAT3-BAT1, the pin VSS, the pin ISEN and the pin TREF are arranged on the left side of the chip and are sequentially arranged from top to bottom, and the pin TS, the pin DSG, the pin VM, the pin CHG, the pin SDX, the pin SCX and the pin VDDA are arranged on the right side of the chip and are sequentially arranged from bottom to top.
As shown in fig. 3, a four-string battery pack protection chip Z2 includes a package case 2 and sixteen pins arranged on two sides of the package case 2 and connected to the internal circuit of the chip. Pin VCC is a power supply terminal, pin VDDA is a 5V power supply terminal, and is used to supply power to the interior of the battery pack protection chip, where pin VCC and pin VDDA are both connected to LDO bias module 120 in the battery pack protection chip. The battery pin BAT4, the two battery pins BAT3, the battery pin BAT2 and the battery pin BAT1 are connected to the voltage detection module 102 inside the package case 2. Specifically, the pin BAT4 is connected to the positive terminal of the battery 4 in the battery pack, two battery pins BAT3 are connected to the positive terminal of the battery 3 and the negative terminal of the battery 2 after being short-circuited, the pin BAT2 is connected to the positive terminal of the battery 2 and the negative terminal of the battery 1, and the pin BAT1 is connected to the positive terminal of the battery 1, and respectively represents the voltage values at the positive terminals of the battery 4, the battery 3, the battery 2 and the battery 1 in the battery pack. Pin VSS is the ground terminal of the chip. Pin ISEN is connected to a current detection module 104 inside the package 2. Pins TREF and TS are connected to temperature sensing module 106 inside package 2, wherein pins TS are also connected to temperature sensor disconnection sensing module 110 inside package 2. Pin DSG is connected to DFET driver module 118 inside package 2. Pin VM is connected to a load disconnection detection module 116 inside package 2 and pin CHG is connected to a CFET driver module 114 inside package 2. Pin SDX and pin SCX are connected to control module 108 inside package 2.
The pin VCC, the battery pin BAT4-BAT1, the pin VSS and the pin ISEN are arranged on the left side of the chip and are sequentially arranged from top to bottom, and the pin TREF, the pin TS, the pin DSG, the pin VM, the pin CHG, the pin SDX, the pin SCX and the pin VDDA are arranged on the right side of the chip and are sequentially arranged from bottom to top.
As shown in fig. 4, a five-string battery pack protection chip Z3 includes a package case 3 and sixteen pins arranged on two sides of the package case 3 and connected to the internal circuit of the chip. Pin VCC is a power supply terminal, pin VDDA is a 5V power supply terminal, and is used to supply power to the interior of the battery pack protection chip, where pin VCC and pin VDDA are both connected to LDO bias module 120 in the battery pack protection chip. The battery pin BAT5, the battery pin BAT4, the battery pin BAT3, the battery pin BAT2, and the battery pin BAT1 are connected to the voltage detection module 102 inside the package case 2. Specifically, pin BAT5 is connected to the positive terminal of battery 5 in the pack, pin BAT4 is connected to the positive terminal of battery 4 in the pack and the negative terminal of battery 3, pin BAT3 is connected to the positive terminal of battery 3 and the negative terminal of battery 2, pin BAT2 is connected to the positive terminal of battery 2 and the negative terminal of battery 1, and pin BAT1 is connected to the positive terminal of battery 1, and respectively indicates the voltage values at the positive terminals of battery 5, battery 4, battery 3, battery 2, and battery 1 in the pack. Pin VSS is the ground terminal of the chip. Pin ISEN is connected to a current detection module 104 inside the package 3. Pins TREF and TS are connected to temperature sensing module 106 inside package housing 3, wherein pins TS are also connected to temperature sensor disconnection sensing module 110 inside package housing 3. Pin DSG is connected to DFET driver module 118 inside package 3. Pin VM is connected to a load disconnection detection module 116 inside package 3 and pin CHG is connected to a CFET driver module 114 inside package 3. Pin SDX and pin SCX are connected to control module 108 inside package 3.
The pin VCC, the battery pin BAT5-BAT1, the pin VSS and the pin ISEN are arranged on the left side of the chip and are sequentially arranged from top to bottom, and the pin TREF, the pin TS, the pin DSG, the pin VM, the pin CHG, the pin SDX, the pin SCX and the pin VDDA are arranged on the right side of the chip and are sequentially arranged from bottom to top.
As shown in table 1 below, the description of the pins referred to in fig. 1, fig. 2, fig. 3 and fig. 4 includes pin names, pin types and pin function descriptions. Through the specific description of each pin, the purpose and the function of each pin in the battery pack protection chip can be determined.
TABLE 1
| Pin name | Pin type | Description of the invention |
| VCC | Power | Power supply terminal |
| BAT5 | I | Connecting the positive terminal of the |
| BAT4 | I | Connecting the positive terminal of the |
| BAT3 | I | Connecting the positive terminal of the |
| BAT2 | I | Connecting an electrical connectionThe positive terminal of the |
| BAT1 | I | Connecting the positive terminal of the |
| VSS | Power | Grounding terminal |
| ISEN | I | Port for detecting current between ISEN and VSS |
| TREF | I/O | Temperature detection reference input terminal |
| TS | I/O | Temperature detection input terminal |
| DSG | O | Discharging field effect transistor driving port |
| VM | I | Load disconnection detection |
| CHG | O | Charging field effect transistor drive port |
| SDX | Used in IC manufacture | |
| SCX | Used in IC manufacture | |
| VDDA | Power | 5V power end for supplying power inside chip |
Advantageously, the utility model provides a battery package protection chip includes the protection chip who is applicable to three strings, four strings and five strings of battery packages, including but not limited to, to battery package charge protection, discharge protection, excess temperature protection, overcurrent protection, overvoltage protection and short-circuit protection etc.. Through the utility model discloses a battery package protection chip, security, reliability that can effectual improvement battery package and the life who has improved the battery package.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (9)
1. A battery pack protection chip comprises a packaging shell and a plurality of pins which are arranged on two sides of the packaging shell and connected with an internal circuit of the chip, and is characterized by comprising:
the voltage detection module (102), the voltage detection module (102) is led out of a battery pin, wherein the voltage detection module (102) is connected with a battery in the battery pack and is configured to detect the voltage of the battery pack;
a current detection module (104), wherein the battery pack protection chip leads out a pin ISEN from the current detection module (104), is configured to receive a current between the pin ISEN and a pin VSS, and detects the current between the pin ISEN and the pin VSS;
a temperature detection module (106), the temperature detection module (106) having an outgoing pin TREF configured to receive/output a preset temperature value; and
the control module (108) is connected with the voltage detection module (102), the current detection module (104) and the temperature detection module (106), and is configured to receive the voltage signal, the current signal and the temperature signal and generate corresponding control signals to control charging and discharging of the battery pack according to the received signals.
2. The battery pack protection chip according to claim 1, further comprising: the device comprises a CFET driver module (114) and a pin CHG which is led out of the CFET driver module and is used as a driving port of a charging field effect transistor, a load disconnection detection module (116) and a pin VM which is led out of the CFET driver module and is used as a load disconnection detection port, and a DFET driver module (118) and a pin DSG which is led out of the DFET driver module and is used as a driving port of a discharging field effect transistor.
3. The battery pack protection chip of claim 1, further comprising an LDO bias module (120) and pins VCC and VDDA thereof extracted as power supply terminals of the chip.
4. The battery pack protection chip of claim 1, further comprising a pin VSS connected to a common ground of the system.
5. The battery pack protection chip of claim 1, wherein when the battery pack is a three-cell battery pack, fourteen pins are provided at two sides of the package casing of the battery pack protection chip, and the pins are connected with the internal circuit of the chip, and the pins are arranged in the following manner: the pin VCC, the battery pin BAT3-BAT1, the pin VSS, the pin ISEN and the pin TREF are sequentially arranged on the left side of the chip from top to bottom, and the pin TS, the pin DSG, the pin VM, the pin CHG, the pin SDX, the pin SCX and the pin VDDA are sequentially arranged on the right side of the chip from bottom to top.
6. The battery pack protection chip according to claim 1, wherein when the battery pack is a battery pack of four or five batteries, sixteen pins are provided on two sides of the package casing of the battery pack protection chip for connecting with the internal circuit of the chip, and are arranged in such a manner that the pin VCC, the battery pin, the pin VSS and the pin ISEN are sequentially arranged from top to bottom on the left side of the chip, and the pin TREF, the pin TS, the pin DSG, the pin VM, the pin CHG, the pin SDX, the pin SCX and the pin VDDA are sequentially arranged from bottom to top on the right side of the chip.
7. The battery pack protection chip of claim 6, wherein when the battery pack is a four-battery pack, the battery pins are pin BAT4, two pins BAT3, pin BAT2, and pin BAT 1.
8. The battery pack protection chip of claim 6, wherein when the battery pack is a five-cell battery pack, the battery pins are pin BAT5, pin BAT4, pin BAT3, pin BAT2, and pin BAT1 in that order.
9. The battery pack protection chip according to claim 1, further comprising: and the pin SCX and the pin SDX are led out from the control module (108) and are used for configuring parameters during chip manufacturing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920890865.8U CN210183029U (en) | 2019-06-13 | 2019-06-13 | Battery pack protection chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920890865.8U CN210183029U (en) | 2019-06-13 | 2019-06-13 | Battery pack protection chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210183029U true CN210183029U (en) | 2020-03-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920890865.8U Active CN210183029U (en) | 2019-06-13 | 2019-06-13 | Battery pack protection chip |
Country Status (1)
| Country | Link |
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| CN (1) | CN210183029U (en) |
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- 2019-06-13 CN CN201920890865.8U patent/CN210183029U/en active Active
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