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CN209895459U - Early warning device for test site during high-voltage test - Google Patents

Early warning device for test site during high-voltage test Download PDF

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CN209895459U
CN209895459U CN201822074699.2U CN201822074699U CN209895459U CN 209895459 U CN209895459 U CN 209895459U CN 201822074699 U CN201822074699 U CN 201822074699U CN 209895459 U CN209895459 U CN 209895459U
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chip
module
capacitor
pins
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张建雷
周斌
李帅
许奥
李奎
李刚
张亚洲
邓军
章烈旺
周密
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Bengbu Power Supply Co of State Grid Anhui Electric Power Co Ltd
Fengyang Power Supply Co of State Grid Anhui Electric Power Co Ltd
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Abstract

本实用新型公开了一种高压试验时试验场地预警装置,包括锡焊在电路板上的芯片模块、触发模块、串行通讯模块、USB模块、语音模块和闪存串口模块,所述芯片模块中的YX6100芯片U1串联电容C1的引脚1和引脚10接在语音模块中CS8622E芯片U2引脚8上,YX6100芯片U1引脚VDD端并联电容C16和4.3V电压的并联接口上,电容C16的另一端接地。本高压试验时试验场地预警装置,工作时可以时时探测高压试验中靠近高压试验区域的人员,接收到系统板的触发信号时能够及时的发出在安装之后,能够发出语音警示,避免不必要的翻越围栏现象,大大减少了现场监护人员的工作量,避免了试验人员与非试验人员人身安全事故,节约了赔偿成本,大大提升安全效益,提升了经济效益。

The utility model discloses an early warning device for a test site during a high-voltage test, which comprises a chip module, a trigger module, a serial communication module, a USB module, a voice module and a flash memory serial port module soldered on a circuit board. The pin 1 and pin 10 of the capacitor C1 of the YX6100 chip U1 are connected to the U2 pin 8 of the CS8622E chip in the voice module. The VDD terminal of the U1 pin of the YX6100 chip is connected in parallel with the parallel interface of the capacitor C16 and the 4.3V voltage. The other side of the capacitor C16 One end is grounded. This high-voltage test site early warning device can detect people who are close to the high-voltage test area during the high-voltage test at any time. When it receives the trigger signal of the system board, it can be sent out in time. After installation, it can send out a voice warning to avoid unnecessary overruns. The fence phenomenon greatly reduces the workload of on-site guardians, avoids personal safety accidents for testers and non-testers, saves compensation costs, greatly improves safety benefits, and improves economic benefits.

Description

一种高压试验时试验场地预警装置A test site early warning device during high voltage test

技术领域technical field

本实用新型涉及电气安全技术领域,具体为一种高压试验时试验场地预警装置。The utility model relates to the technical field of electrical safety, in particular to an early warning device for a test site during a high-voltage test.

背景技术Background technique

电气试验是变电设备状态监测的重要手段,试验数据为变电设备状态评价的重要依据。电气试验项目中,经常会涉及到高压电,如交流耐压试验、直流耐压试验、介质损耗试验、绝缘电阻测试等很多试验仪器都会输出高电压,试验过程中一旦疏忽就可能危及自身及他人的生命安全。Electrical test is an important means of monitoring the state of substation equipment, and the test data is an important basis for evaluating the state of substation equipment. In electrical test projects, high voltage is often involved, such as AC withstand voltage test, DC withstand voltage test, dielectric loss test, insulation resistance test and many other test instruments will output high voltage. safety of others.

大型试验现场环境较为复杂,存在不可控因素较多,作业人员及监护人长时间作业后,试验开始、结束及改接线时安全警惕性会降低,容易配合不当,导致人员误入试验区域,单纯依靠高压试验围栏安全防控能力较弱,其主要依靠围栏带隔离及“止步,高压危险!”警示语警示牌,禁止无关人员入内。对于较大的试验现场或时间较长、工作较复杂的试验环境,专责监护人的视野有限,尤其是夜间,环境复杂,监护难度极大,还需要增加监护人员,也无法全面及时的提醒。传统安全围栏是电气试验的必备安全器材,但在长期使用中,显露出制止力度小、需配置多人监护等诸多弊端,主要体现在使用方法非常机械,只能被动的“围”、人为的“栏”,人员的主观配合显得至关重要,需牵扯大量精力。各分散的试验现场通常设有试验监护人,多项工作开展时,人员拆分后难以保证充足的专责监护人。The environment of the large-scale test site is relatively complex, and there are many uncontrollable factors. After the operators and guardians work for a long time, the safety vigilance of the test start, end and wiring changes will be reduced, and it is easy to cooperate improperly, resulting in personnel entering the test area by mistake, relying solely on The safety prevention and control ability of the high-voltage test fence is relatively weak, and it mainly relies on the isolation of the fence and the warning sign "Stop, high-voltage danger!", prohibiting irrelevant personnel from entering. For a larger test site or a test environment with a long time and complicated work, the dedicated guardian has a limited field of vision, especially at night, when the environment is complex and the monitoring is extremely difficult. Traditional safety fences are essential safety equipment for electrical tests, but in long-term use, there are many drawbacks such as low restraint force and the need to configure multiple people to monitor. The "column" of the personnel is very important and requires a lot of energy. Each scattered test site usually has test guardians. When multiple tasks are carried out, it is difficult to ensure sufficient dedicated guardians after the personnel are divided.

高压试验通常在变电站内或实验车间开展,现场地相对平整,满足设置围栏的要求,且围栏倒塌后试验人员应及时恢复现有的安全措施是用网状围栏将试验设备围住,达到阻止非试验人员误入试验区域的目的。The high-voltage test is usually carried out in the substation or in the experimental workshop. The site is relatively flat and meets the requirements of setting up a fence. After the fence collapses, the test personnel should restore the existing safety measures in time. The purpose of the test personnel entering the test area by mistake.

因此,在高压试验过程中有一个实时提醒、警示的安全措施避免事故的发生是很有必要的。Therefore, it is necessary to have a real-time reminder and warning safety measures to avoid accidents during the high-voltage test.

实用新型内容Utility model content

本实用新型的目的在于提供一种高压试验时试验场地预警装置,具有播放语音,降低人员误入高压试验区域的风险的优点,解决了现有技术中的问题。The purpose of the utility model is to provide an early warning device for a test site during a high-voltage test, which has the advantages of playing voice, reducing the risk of personnel entering the high-voltage test area by mistake, and solving the problems in the prior art.

为实现上述目的,本实用新型提供如下技术方案:一种高压试验时试验场地预警装置,包括锡焊在电路板上的芯片模块、触发模块、串行通讯模块、USB模块、语音模块和闪存串口模块,所述芯片模块中的YX6100芯片U1串联电容C1的引脚1和引脚10接在语音模块中CS8622E芯片U2引脚8上,YX6100芯片U1引脚VDD端并联电容C16和4.3V电压的并联接口上,电容C16的另一端接地,YX6100芯片U1引脚13、14、15、16、17、18和19与触发模块相接,YX6100芯片U1引脚3接在电容C17和4.3V电压的并联接口上,电容C17的另一端接地,YX6100芯片U1引脚23串联电容C18接地,YX6100芯片U1引脚6和7与串行通讯模块相接,YX6100芯片U1引脚20和21与USB模块4相接,YX6100芯片U1引脚9、10和11与闪存串口模块相接。In order to achieve the above purpose, the utility model provides the following technical solutions: a test site early warning device during a high-voltage test, comprising a chip module, a trigger module, a serial communication module, a USB module, a voice module and a flash memory serial port soldered on a circuit board Module, the pin 1 and pin 10 of the YX6100 chip U1 series capacitor C1 in the chip module are connected to the CS8622E chip U2 pin 8 in the voice module, and the VDD terminal of the YX6100 chip U1 pin is connected in parallel with the capacitor C16 and the 4.3V voltage. On the parallel interface, the other end of the capacitor C16 is grounded, the pins 13, 14, 15, 16, 17, 18 and 19 of the YX6100 chip U1 are connected to the trigger module, and the U1 pin 3 of the YX6100 chip is connected to the capacitor C17 and the 4.3V voltage. On the parallel interface, the other end of the capacitor C17 is grounded, the YX6100 chip U1 pin 23 is connected to the series capacitor C18 to ground, the YX6100 chip U1 pins 6 and 7 are connected to the serial communication module, the YX6100 chip U1 pins 20 and 21 are connected to the USB module 4 Connected, YX6100 chip U1 pins 9, 10 and 11 are connected to the flash serial port module.

优选的,所述触发模块中的HEAD8接口CN2上引脚8串联触发引脚J1接地,HEAD8接口CN2上端角7、6、5、4、3和2分别与YX6100芯片U1引脚14、15、16、17、18和19相对应连接。Preferably, the upper pin 8 of the HEAD8 interface CN2 in the trigger module is connected in series with the trigger pin J1 to ground, and the upper end corners 7, 6, 5, 4, 3 and 2 of the HEAD8 interface CN2 are respectively connected with the pins 14, 15, 15, 15 of the YX6100 chip U1. 16, 17, 18 and 19 correspond to connections.

优选的,所述串行通讯模块中的HEAD6接口CN1上端角2和3与X6100芯片U1引脚6和7相对应连接,HEAD6接口CN1上端角4串联电阻R31接3.3V电压,HEAD6接口CN1上端角6接地。Preferably, the upper corners 2 and 3 of the HEAD6 interface CN1 in the serial communication module are correspondingly connected with pins 6 and 7 of the X6100 chip U1, the upper corner 4 of the HEAD6 interface CN1 is connected in series with a resistor R31 of 3.3V voltage, and the upper end of the HEAD6 interface CN1 Corner 6 is grounded.

优选的,所述USB模块4中的USB Micro的J2端角2和3与X6100芯片U1引脚20和21相对应连接,USB Micro的J2端角4和5并联接地。Preferably, the J2 end corners 2 and 3 of the USB Micro in the USB module 4 are correspondingly connected to the X6100 chip U1 pins 20 and 21, and the J2 end corners 4 and 5 of the USB Micro are grounded in parallel.

优选的,所述语音模块中CS8622E芯片U2引脚1接电阻R22和三极管Q1集电极的并联接口,电阻R22的另一端接电阻R21、电容C6和引脚9的并联接口,电阻R21另一端接电容C10和引脚4的并联接口,三极管Q1的基极串联电阻R17接在YX6100芯片U1引脚10上,三极管Q1的发射极接引脚2、并联电容C9的引脚6和3、串联电容C13的引脚7以及电位器RP1的并联接口,CS8622E芯片U2引脚16串联电容C8接在引脚13和15上,引脚13和15上还串联FB1接在一端并联电容C11的喇叭SPK1上,CS8622E芯片U2引脚10串联电容C14接在引脚11和12上,引脚11和12上还串联FB2接在一端并联电容C12的喇叭SPK1上。Preferably, pin 1 of CS8622E chip U2 in the voice module is connected to the parallel interface of resistor R22 and the collector of transistor Q1, the other end of resistor R22 is connected to the parallel interface of resistor R21, capacitor C6 and pin 9, and the other end of resistor R21 is connected to the parallel interface of resistor R21, capacitor C6 and pin 9. The parallel interface of capacitor C10 and pin 4, the base series resistor R17 of transistor Q1 is connected to pin 10 of YX6100 chip U1, the emitter of transistor Q1 is connected to pin 2, the parallel capacitor C9 pins 6 and 3, the series capacitor Pin 7 of C13 and the parallel interface of potentiometer RP1, CS8622E chip U2 pin 16 series capacitor C8 is connected to pins 13 and 15, and pins 13 and 15 are also connected in series with FB1 to the speaker SPK1 of the parallel capacitor C11 at one end , CS8622E chip U2 pin 10 series capacitor C14 is connected to pins 11 and 12, pins 11 and 12 are also connected in series with FB2 connected to one end of the speaker SPK1 with capacitor C12 in parallel.

优选的,所述闪存串口模块中SPI FLASH芯片U5的引脚1和YX6100芯片U1引脚9相接,SPI FLASH芯片U5的引脚2串联电阻R23和YX6100芯片U1引脚11相接,SPI FLASH芯片U5的引脚7和8与电容C20相接,SPI FLASH芯片U5的引脚6和YX6100芯片U1引脚12相接,SPIFLASH芯片U5的引脚5与YX6100芯片U1引脚11相接。Preferably, in the flash serial port module, the pin 1 of the SPI FLASH chip U5 is connected with the pin 9 of the YX6100 chip U1, the pin 2 of the SPI FLASH chip U5 is connected in series with the resistor R23 and the pin 11 of the YX6100 chip U1, and the SPI FLASH chip U1 is connected with the pin 11. Pins 7 and 8 of chip U5 are connected to capacitor C20, pin 6 of SPI FLASH chip U5 is connected to pin 12 of U1 of YX6100 chip, and pin 5 of SPIFLASH chip U5 is connected to pin 11 of U1 of YX6100 chip.

与现有技术相比,本实用新型的有益效果如下:Compared with the prior art, the beneficial effects of the present utility model are as follows:

本高压试验时试验场地预警装置,工作时可以时时探测高压试验中靠近高压试验区域的人员,接收到系统板的触发信号时能够及时的发出在安装之后,能够发出语音警示,避免不必要的翻越围栏现象,大大减少了现场监护人员的工作量,该装置能有效保障人身、设备和电网安全,避免了试验人员与非试验人员人身安全事故,节约了赔偿成本,大大提升安全效益,提升了经济效益。This high-voltage test site early warning device can detect people who are close to the high-voltage test area during the high-voltage test at any time. When it receives the trigger signal of the system board, it can be sent out in time. After installation, it can send out a voice warning to avoid unnecessary overruns. The fence phenomenon greatly reduces the workload of on-site guardians. The device can effectively protect the safety of people, equipment and power grids, avoid personal safety accidents for testers and non-testers, save compensation costs, greatly improve safety benefits, and improve economical benefit.

附图说明Description of drawings

图1为本实用新型的整体结构图;Fig. 1 is the overall structure diagram of the utility model;

图2为本实用新型的芯片模块电路图;Fig. 2 is the chip module circuit diagram of the utility model;

图3为本实用新型的触发模块电路图;3 is a circuit diagram of a trigger module of the present invention;

图4为本实用新型的串行通讯模块电路图;4 is a circuit diagram of a serial communication module of the present invention;

图5为本实用新型的USB模块电路图;Fig. 5 is the USB module circuit diagram of the utility model;

图6为本实用新型的语音模块电路图;Fig. 6 is the speech module circuit diagram of the utility model;

图7为本实用新型的闪存串口模块电路图。FIG. 7 is a circuit diagram of a flash memory serial port module of the present invention.

图中:1、芯片模块;2、触发模块;3、串行通讯模块;4、USB模块;5、语音模块;6、闪存串口模块。In the figure: 1. Chip module; 2. Trigger module; 3. Serial communication module; 4. USB module; 5. Voice module; 6. Flash serial port module.

具体实施方式Detailed ways

下面将结合本实用新型实施例中的附图,对本实用新型实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本实用新型一部分实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本实用新型保护的范围。The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the implementations. example. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

请参阅图1-2,一种高压试验时试验场地预警装置,包括锡焊在电路板上的芯片模块1、触发模块2、串行通讯模块3、USB模块4、语音模块5和闪存串口模块6,芯片模块1中的YX6100芯片U1串联电容C1的引脚1和引脚10接在语音模块5中CS8622E芯片U2引脚8上,YX6100芯片U1引脚VDD端并联电容C16和4.3V电压的并联接口上,电容C16的另一端接地,YX6100芯片U1引脚13、14、15、16、17、18和19与触发模块2相接,YX6100芯片U1引脚3接在电容C17和4.3V电压的并联接口上,电容C17的另一端接地,YX6100芯片U1引脚23串联电容C18接地,YX6100芯片U1引脚6和7与串行通讯模块3相接,YX6100芯片U1引脚20和21与USB模块4相接,YX6100芯片U1引脚9、10和11与闪存串口模块6相接。Please refer to Figure 1-2, an early warning device for a test site during a high voltage test, including a chip module 1 soldered on a circuit board, a trigger module 2, a serial communication module 3, a USB module 4, a voice module 5 and a flash serial port module 6. The pins 1 and 10 of the YX6100 chip U1 in the chip module 1 are connected in series with the capacitor C1 to pin 8 of the CS8622E chip U2 in the voice module 5, and the VDD terminal of the U1 pin of the YX6100 chip is connected in parallel with the capacitor C16 and the 4.3V voltage. On the parallel interface, the other end of the capacitor C16 is grounded, the pins 13, 14, 15, 16, 17, 18 and 19 of the YX6100 chip U1 are connected to the trigger module 2, and the U1 pin 3 of the YX6100 chip is connected to the capacitor C17 and 4.3V voltage On the parallel interface, the other end of the capacitor C17 is grounded, the U1 pin 23 of the YX6100 chip is connected in series with the capacitor C18, the YX6100 chip U1 pins 6 and 7 are connected to the serial communication module 3, the YX6100 chip U1 pins 20 and 21 are connected to the USB Module 4 is connected, and pins 9, 10 and 11 of U1 of the YX6100 chip are connected to the flash serial port module 6.

KEY1和KEY2做为端口触发管脚,CS和DO作为串行输出与芯片选择引脚,读取闪存串口模块6中flash内容;DACL为功放接口,使其输出连续变化的音频模块。KEY1 and KEY2 are used as port trigger pins, CS and DO are used as serial output and chip selection pins to read the flash content in the serial port module 6 of the flash memory; DACL is the power amplifier interface, which makes it output a continuously changing audio module.

请参阅图3,触发模块2中的HEAD8接口CN2上引脚8串联触发引脚J1接地,HEAD8接口CN2上端角7、6、5、4、3和2分别与YX6100芯片U1引脚14、15、16、17、18和19相对应连接,Please refer to Figure 3. In trigger module 2, pin 8 of the HEAD8 interface CN2 is connected in series with the trigger pin J1, and the upper corners 7, 6, 5, 4, 3 and 2 of the HEAD8 interface CN2 are connected to pins 14 and 15 of U1 of the YX6100 chip, respectively. , 16, 17, 18 and 19 are connected correspondingly,

触发模块2采用的是IO按键的方式,这样做的好处是充分利用了MCU越来越来越多的GPIO。设计繁琐但不简单,默认配置多个按键的功能分配,可以在任何恶劣的场合随意的控制,甚至也可以作为与MCU的通信接口,按键分配4种不同类型的功能,根据两个电阻的对地选择,一对一触发播放,可打断一对一触发播放,电平保持可循环;一对一触发播放,不可打断;标准的播放功能,如上下曲、播放暂停等。The trigger module 2 adopts the way of IO button, the advantage of this is to make full use of more and more GPIO of MCU. The design is cumbersome but not simple. The function assignment of multiple buttons is configured by default, which can be controlled at will in any harsh occasion, and can even be used as a communication interface with the MCU. The buttons are assigned 4 different types of functions. One-to-one trigger playback, one-to-one trigger playback can be interrupted, and the level can be maintained in a loop; one-to-one trigger playback cannot be interrupted; standard playback functions, such as up and down songs, playback pause, etc.

请参阅图4,串行通讯模块3中的HEAD6接口CN1上端角2和3与X6100芯片U1引脚6和7相对应连接,HEAD6接口CN1上端角4串联电阻R31接3.3V电压,HEAD6接口CN1上端角6接地。Please refer to Figure 4, the upper corners 2 and 3 of the HEAD6 interface CN1 in the serial communication module 3 are correspondingly connected to the pins 6 and 7 of the X6100 chip U1, the HEAD6 interface CN1 upper corner 4 series resistor R31 is connected to 3.3V voltage, HEAD6 interface CN1 The upper end corner 6 is grounded.

同时可以在此基础上扩展更加强大的RS485进行组网功能,串口的通信波特率可自行设置,如果我们指定播放SPIFLASH,就需要发送:7E FF 06 09 00 00 04 FE EE EF数据长度为6 ,这6 个字节分别是[FF 06 09 00 00 04] 。不计算起始、结束、和校验,然后对得到的结果进行累加。At the same time, the more powerful RS485 can be expanded on this basis for networking. The communication baud rate of the serial port can be set by itself. If we specify to play SPIFLASH, we need to send: 7E FF 06 09 00 00 04 FE EE EF data length is 6 , these 6 bytes are [FF 06 09 00 00 04] respectively. Start, end, and checksums are not calculated, and the resulting results are accumulated.

请参阅图5,USB模块4中的USB Micro的J2端角2和3与X6100芯片U1引脚20和21相对应连接,USB Micro的J2端角4和5并联接地。Please refer to Figure 5, the J2 end corners 2 and 3 of the USB Micro in the USB module 4 are connected to the X6100 chip U1 pins 20 and 21 correspondingly, and the J2 end corners 4 and 5 of the USB Micro are connected to ground in parallel.

USB模块4可以使用MicroUSB线直接更新语音,方便、灵活。无需安装任何软件,U盘模式,直接更新,无需要专用下载器对音质无任何压缩和损坏,保证更高的音质体验;支持WIN98,WINXP,WIN7,WIN8多种操作系统,语音内容需要采用MP3格式,如果不是需要做转换;采样率的要求 8KHz,11.025KHz,12KHz,16KHz,22.05KHz,24KHz,32KHz,44.1KHz,48KHz,插上MicroUSB 线,打开可移动磁盘更换所需音频文件。The USB module 4 can use the MicroUSB cable to directly update the voice, which is convenient and flexible. No need to install any software, U disk mode, direct update, no need for special downloader, no compression and damage to sound quality, to ensure a higher sound quality experience; support WIN98, WINXP, WIN7, WIN8 multiple operating systems, the voice content needs to use MP3 Format, if not need to be converted; the sampling rate requires 8KHz, 11.025KHz, 12KHz, 16KHz, 22.05KHz, 24KHz, 32KHz, 44.1KHz, 48KHz, plug in the MicroUSB cable, open the removable disk and replace the required audio files.

请参阅图6,语音模块5中CS8622E芯片U2引脚1接电阻R22和三极管Q1集电极的并联接口,电阻R22的另一端接电阻R21、电容C6和引脚9的并联接口,电阻R21另一端接电容C10和引脚4的并联接口,三极管Q1的基极串联电阻R17接在YX6100芯片U1引脚10上,三极管Q1的发射极接引脚2、并联电容C9的引脚6和3、串联电容C13的引脚7以及电位器RP1的并联接口,CS8622E芯片U2引脚16串联电容C8接在引脚13和15上,引脚13和15上还串联FB1接在一端并联电容C11的喇叭SPK1上,CS8622E芯片U2引脚10串联电容C14接在引脚11和12上,引脚11和12上还串联FB2接在一端并联电容C12的喇叭SPK1上。Please refer to Figure 6. In the voice module 5, the CS8622E chip U2 pin 1 is connected to the parallel interface of the resistor R22 and the collector of the transistor Q1, the other end of the resistor R22 is connected to the parallel interface of the resistor R21, the capacitor C6 and the pin 9, and the other end of the resistor R21 Connect the parallel interface of capacitor C10 and pin 4, the base series resistor R17 of transistor Q1 is connected to pin 10 of U1 of YX6100 chip, the emitter of transistor Q1 is connected to pin 2, and the parallel capacitor C9 pins 6 and 3, connected in series Pin 7 of capacitor C13 and the parallel interface of potentiometer RP1, CS8622E chip U2 pin 16 series capacitor C8 is connected to pins 13 and 15, and pins 13 and 15 are also connected in series with FB1 connected to one end of the speaker SPK1 of parallel capacitor C11 On the top, the CS8622E chip U2 pin 10 series capacitor C14 is connected to pins 11 and 12, and pins 11 and 12 are also connected in series with FB2 to the speaker SPK1 with a parallel capacitor C12 at one end.

RP1是电位器,DAC电压信号通过RP1分压得到一定的电压,再串接电容C15接入反相输入端,得出的误差值经后级的放大器进一步放大,得到输出信号VCC与锯齿波进行比较,若VCC高于锯齿波,输出高电平;反之,输出低电平。RP1 is a potentiometer. The DAC voltage signal is divided by RP1 to obtain a certain voltage, and then the capacitor C15 is connected in series to the inverting input terminal. The obtained error value is further amplified by the amplifier of the latter stage, and the output signal VCC is obtained. Compare, if VCC is higher than the sawtooth wave, output high level; otherwise, output low level.

请参阅图7,闪存串口模块6中SPI FLASH芯片U5的引脚1和YX6100芯片U1引脚9相接,SPI FLASH芯片U5的引脚2串联电阻R23和YX6100芯片U1引脚11相接,SPI FLASH芯片U5的引脚7和8与电容C20相接,SPI FLASH芯片U5的引脚6和YX6100芯片U1引脚12相接,SPIFLASH芯片U5的引脚5与YX6100芯片U1引脚11相接。Please refer to Figure 7. In the flash serial port module 6, the pin 1 of the SPI FLASH chip U5 is connected to the pin 9 of the YX6100 chip U1. The pin 2 of the SPI FLASH chip U5 is connected in series with the resistor R23 and the pin 11 of the YX6100 chip U1. The SPI The pins 7 and 8 of the FLASH chip U5 are connected to the capacitor C20, the pin 6 of the SPI FLASH chip U5 is connected to the pin 12 of the YX6100 chip U1, and the pin 5 of the SPIFLASH chip U5 is connected to the U1 pin 11 of the YX6100 chip.

YX6100芯片U1是一个提供串口的语音芯片,以优盘作为存储介质,可以方便、灵活的将语音烧写到闪存串口模块6FLASH中。 The YX6100 chip U1 is a voice chip that provides a serial port. Using a USB flash drive as a storage medium, the voice can be programmed into the flash serial port module 6FLASH conveniently and flexibly.

综上所述:本高压试验时试验场地预警装置,工作时可以时时探测高压试验中靠近高压试验区域的人员,接收到系统板的触发信号时能够及时的发出在安装之后,能够发出语音警示,避免不必要的翻越围栏现象,大大减少了现场监护人员的工作量,该装置能有效保障人身、设备和电网安全,避免了试验人员与非试验人员人身安全事故,节约了赔偿成本,大大提升安全效益,提升了经济效益。To sum up: this high-voltage test site early warning device can detect people near the high-voltage test area in the high-voltage test at any time during the high-voltage test. When receiving the trigger signal of the system board, it can be sent out in time. After installation, it can send out a voice warning. Avoid unnecessary jumping over the fence and greatly reduce the workload of on-site guardians. The device can effectively protect the safety of people, equipment and power grids, avoid personal safety accidents for testers and non-testers, save compensation costs, and greatly improve safety. Benefit, improve economic efficiency.

安全效益显而易见,安全性在原来的基础上得到了很大的提高。装置携带方便,在高压试验中安全保障方面发挥了重要的作用,为企业创造了无形的社会效益。The security benefits are obvious, and the security has been greatly improved on the original basis. The device is easy to carry, plays an important role in the safety guarantee in the high-voltage test, and creates intangible social benefits for the enterprise.

需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus.

尽管已经示出和描述了本实用新型的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本实用新型的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本实用新型的范围由所附权利要求及其等同物限定。Although the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes and modifications can be made to these embodiments without departing from the principles and spirit of the present invention , alternatives and modifications, the scope of the present invention is defined by the appended claims and their equivalents.

Claims (6)

1. The utility model provides a test site early warning device during high-voltage test, includes chip module (1), trigger module (2), serial communication module (3), USB module (4), voice module (5) and flash memory serial port module (6) of soldering on the circuit board, its characterized in that: pin 1 and pin 10 of a YX6100 chip U1 series capacitor C1 in the chip module (1) are connected to pin 8 of a CS8622E chip U2 in the voice module (5), pin VDD of a YX6100 chip U1 is connected to a parallel connection port of capacitors C16 and 4.3V, the other end of the capacitor C16 is grounded, pins 13, 14, 15, 16, 17, 18, and 19 of a YX6100 chip U1 are connected to the trigger module (2), pin 3 of a YX6100 chip U1 is connected to a parallel connection port of capacitors C17 and 4.3V, the other end of the capacitor C17 is grounded, pin 23 of a YX6100 chip U1 is connected to pin C18 in series, pins 6 and 7 of a YX6100 chip U1 are connected to the serial communication module (3), pins 20 and 21 of a YX6100 chip U1 are connected to the USB module (4), and pins 899, 10 and pin 8911 of a flash memory module (serial connection port).
2. The early warning device for the test site during the high-voltage test according to claim 1, wherein: a pin 8 on a HEAD8 interface CN2 in the trigger module (2) is connected with a trigger pin J1 in series and grounded, and upper corners 7, 6, 5, 4, 3 and 2 on a HEAD8 interface CN2 are correspondingly connected with pins 14, 15, 16, 17, 18 and 19 of a U1 of a YX6100 chip respectively.
3. The early warning device for the test site during the high-voltage test according to claim 1, wherein: the upper end corners 2 and 3 of a HEAD6 interface CN1 in the serial communication module (3) are correspondingly connected with pins 6 and 7 of a U1 of an X6100 chip, the upper end corner 4 of a HEAD6 interface CN1 is connected with 3.3V voltage by a series resistor R31, and the upper end corner 6 of a HEAD6 interface CN1 is grounded.
4. The early warning device for the test site during the high-voltage test according to claim 1, wherein: the J2 terminal angles 2 and 3 of the USB Micro in the USB module (4) are correspondingly connected with the U1 pins 20 and 21 of the X6100 chip, and the J2 terminal angles 4 and 5 of the USB Micro are grounded in parallel.
5. The early warning device for the test site during the high-voltage test according to claim 1, wherein: in the voice module (5), pin 1 of a chip U2 of CS8622E is connected with parallel ports of a resistor R22 and a collector of a transistor Q1, the other end of the resistor R22 is connected with parallel ports of a resistor R21, a capacitor C6 and a pin 9, the other end of the resistor R21 is connected with parallel ports of a capacitor C10 and a pin 4, a base series resistor R17 of a transistor Q1 is connected with pin 10 of a chip U1 of YX6100, an emitter of the transistor Q1 is connected with pin 2, pins 6 and 3 of a parallel capacitor C9, pin 7 of a series capacitor C13 and a parallel port of a potentiometer RP1, pin 16 of a chip U1 of CS8622 1 is connected with pins C1, pins 13 and 15 are further connected with a series FB1 in series with pin SPK1 of a parallel capacitor C1, and pin 11 and pin 12 of the chip U8622 1 are further connected with a terminal SPK1 in series with a loudspeaker SPK1 in parallel connection.
6. The early warning device for the test site during the high-voltage test according to claim 1, wherein: pin 1 of SPI FLASH chip U5 meets with YX6100 chip U1 pin 9 in FLASH serial port module (6), pin 2 series resistance R23 of SPI FLASH chip U5 meets with YX6100 chip U1 pin 11, pin 7 and 8 of SPI FLASH chip U5 meet with electric capacity C20, pin 6 of SPI FLASH chip U5 meets with YX6100 chip U1 pin 12, pin 5 of SPI FLASH chip U5 meets with YX6100 chip U1 pin 11.
CN201822074699.2U 2018-12-11 2018-12-11 Early warning device for test site during high-voltage test Expired - Fee Related CN209895459U (en)

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