CN209592083U - Display panel and display device - Google Patents
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- CN209592083U CN209592083U CN201920621909.7U CN201920621909U CN209592083U CN 209592083 U CN209592083 U CN 209592083U CN 201920621909 U CN201920621909 U CN 201920621909U CN 209592083 U CN209592083 U CN 209592083U
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- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
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Abstract
本实用新型涉及半导体技术领域,公开了一种显示面板及显示装置,显示面板包括:驱动背板;多个阵列电极,阵列电极设置于驱动背板上且与驱动背板电连接;多个发光芯片,每个发光芯片设置于每个阵列电极上方且与每个阵列电极对应电连接;连接电极,连接电极设置于驱动背板上且与驱动背板电连接;绝缘填充层,绝缘填充层填充于与连接电极相邻的位于驱动背板边缘的阵列电极和连接电极之间,绝缘填充层的厚度自位于驱动背板边缘的阵列电极向连接电极方向递减;公共电极,公共电极覆盖于发光芯片表面、绝缘填充层表面以及连接电极表面,公共电极与发光芯片以及连接电极电连接,降低了显示面板的制备成本、以及电信号的损耗。
The utility model relates to the technical field of semiconductors and discloses a display panel and a display device. The display panel comprises: a driving backplane; a plurality of array electrodes arranged on the driving backplane and electrically connected to the driving backplane; Chip, each light-emitting chip is arranged above each array electrode and electrically connected to each array electrode; connecting electrodes, connecting electrodes are arranged on the driving backplane and electrically connected with the driving backplane; insulating filling layer, insulating filling layer filling Between the array electrode on the edge of the driving backplane adjacent to the connecting electrode and the connecting electrode, the thickness of the insulating filling layer decreases from the array electrode on the edge of the driving backplane to the direction of the connecting electrode; the common electrode covers the light-emitting chip The surface, the surface of the insulating filling layer and the surface of the connecting electrode, the common electrode is electrically connected with the light-emitting chip and the connecting electrode, which reduces the manufacturing cost of the display panel and the loss of electrical signals.
Description
技术领域technical field
本实用新型涉及半导体技术领域,特别涉及显示面板及显示装置。The utility model relates to the technical field of semiconductors, in particular to a display panel and a display device.
背景技术Background technique
随着发光二极管LED芯片工艺技术的日益进步,使得以LED作为像素的LED显示技术成为可能。目前微发光二极管Micro-LED显示面板的开发多基于倒装LED芯片,其位于芯片同侧的P/N电极在与驱动面板焊接时,对焊接精度、避免短路等方面有着较高的要求和难度,并且其较大的芯片尺寸也限制了其在高分辨率显示屏体开发中的应用。P/N电极位于异侧的垂直LED芯片因其具备更小的芯片尺寸和更低的对位精度要求,在高分辨率Micro-LED显示面板的开发中有着更大的优势和应用前景。With the increasing progress of light-emitting diode (LED) chip process technology, it is possible to use LED as a pixel LED display technology. At present, the development of Micro-LED display panels is mostly based on flip-chip LED chips. When the P/N electrodes on the same side of the chip are soldered to the driver panel, there are high requirements and difficulties in terms of welding accuracy and avoiding short circuits. , and its large chip size also limits its application in the development of high-resolution display screens. Vertical LED chips with P/N electrodes on different sides have greater advantages and application prospects in the development of high-resolution Micro-LED display panels due to their smaller chip size and lower alignment accuracy requirements.
发明人发现现有技术中至少存在如下问题:目前基于垂直芯片的Micro-LED显示面板中公共电极和驱动背板的连接电极之间通常通过单独制备的导电连接部连接,制备工艺成本较高。The inventors have found that there are at least the following problems in the prior art: the common electrode and the connection electrode of the driving backplane in the current vertical chip-based Micro-LED display panel are usually connected through a separately prepared conductive connection part, and the manufacturing process cost is relatively high.
实用新型内容Utility model content
本实用新型的目的在于提供一种显示面板及显示装置,降低了显示面板的制备成本。The purpose of the utility model is to provide a display panel and a display device, which reduces the manufacturing cost of the display panel.
为解决上述技术问题,本实用新型的实施方式提供了一种显示面板,包括:驱动背板;多个阵列电极,阵列电极设置于驱动背板上且与驱动背板电连接;多个发光芯片,每个发光芯片设置于每个阵列电极上方且与每个阵列电极对应电连接;连接电极,连接电极设置于驱动背板上且与驱动背板电连接,连接电极设置于多个阵列电极外围;绝缘填充层,绝缘填充层填充于与连接电极相邻的位于驱动背板边缘的阵列电极和连接电极之间,绝缘填充层的厚度自位于驱动背板边缘的阵列电极向连接电极方向递减;公共电极,公共电极覆盖于发光芯片表面、绝缘填充层表面以及连接电极表面,公共电极与发光芯片以及连接电极电连接。In order to solve the above technical problems, the embodiment of the present utility model provides a display panel, including: a driving backplane; a plurality of array electrodes, the array electrodes are arranged on the driving backplane and electrically connected with the driving backplane; a plurality of light-emitting chips , each light-emitting chip is arranged above each array electrode and is electrically connected to each array electrode; connecting electrodes, the connecting electrodes are arranged on the driving backplane and electrically connected to the driving backplane, and the connecting electrodes are arranged on the periphery of multiple array electrodes The insulating filling layer is filled between the array electrodes on the edge of the driving backplane adjacent to the connecting electrodes and the connecting electrodes, and the thickness of the insulating filling layer decreases from the array electrodes on the edge of the driving backplane to the direction of the connecting electrodes; The common electrode covers the surface of the light-emitting chip, the surface of the insulating filling layer and the surface of the connection electrode, and the common electrode is electrically connected with the light-emitting chip and the connection electrode.
本实用新型的实施方式还提供了一种显示装置,包括:上述的显示面板、设置于显示面板上方的薄膜封装层、以及设置于薄膜封装层上方的透光层。The embodiment of the present invention further provides a display device, comprising: the above-mentioned display panel, a thin film encapsulation layer disposed above the display panel, and a light-transmitting layer disposed above the thin film encapsulation layer.
本实用新型实施方式相对于现有技术而言,提供了一种显示面板,包括:驱动背板;多个阵列电极,阵列电极设置于驱动背板上且与驱动背板电连接;多个发光芯片,每个发光芯片设置于每个阵列电极上方且与每个阵列电极对应电连接;连接电极,连接电极设置于驱动背板上且与驱动背板电连接,连接电极设置于多个阵列电极外围;绝缘填充层,绝缘填充层填充于与连接电极相邻的位于驱动背板边缘的阵列电极和连接电极之间,绝缘填充层的厚度自位于驱动背板边缘的阵列电极向连接电极方向递减;公共电极,公共电极覆盖于发光芯片表面、绝缘填充层表面以及连接电极表面,公共电极与发光芯片以及连接电极电连接。通过在驱动背板的连接电极和与连接电极相邻的位于驱动背板边缘的阵列电极之间,形成高度自位于驱动背板边缘的阵列电极向连接电极方向递减的绝缘填充层,厚度递减的绝缘填充层作为发光芯片与连接电极之间的高度差之间的过渡,支撑公共电极让公共电极能够覆盖发光芯片表面和连接电极表面,避免由于高度差造成的公共电极难以覆盖这两个表面的问题,实现公共电极与发光芯片、以及连接电极的电连接,从而无需在连接电极上形成单独的导电连接部,降低了显示面板的制备成本,并减小了电信号的损耗。Compared with the prior art, the embodiment of the present utility model provides a display panel, including: a driving backplane; a plurality of array electrodes, the array electrodes are arranged on the driving backplane and electrically connected to the driving backplane; Chip, each light-emitting chip is arranged above each array electrode and is electrically connected to each array electrode; connecting electrodes, the connecting electrodes are arranged on the driving backplane and electrically connected to the driving backplane, and the connecting electrodes are arranged on multiple array electrodes Periphery; insulating filling layer, the insulating filling layer is filled between the array electrodes on the edge of the driving backplane adjacent to the connecting electrodes and the connecting electrodes, and the thickness of the insulating filling layer decreases from the array electrodes on the edge of the driving backplane to the direction of the connecting electrodes ; The common electrode covers the surface of the light-emitting chip, the surface of the insulating filling layer and the surface of the connecting electrode, and the common electrode is electrically connected to the light-emitting chip and the connecting electrode. By forming an insulating filling layer whose height decreases from the array electrode located at the edge of the drive backplane to the direction of the connection electrode between the connection electrode of the drive backplane and the array electrode adjacent to the connection electrode and located at the edge of the drive backplane, the thickness of the layer decreases gradually. The insulating filling layer acts as a transition between the height difference between the light-emitting chip and the connecting electrode, supports the common electrode so that the common electrode can cover the surface of the light-emitting chip and the surface of the connecting electrode, and avoids the common electrode being difficult to cover the two surfaces due to the height difference The problem is to realize the electrical connection between the common electrode, the light-emitting chip, and the connection electrodes, so that no separate conductive connection parts need to be formed on the connection electrodes, which reduces the manufacturing cost of the display panel and reduces the loss of electrical signals.
另外,绝缘填充层的厚度呈阶梯状递减。该方案中绝缘填充层的厚度呈阶梯状递减,在制备绝缘填充层时可以逐阶填充,提高了绝缘填充层的制备过程的便利性。In addition, the thickness of the insulating filling layer decreases stepwise. In this solution, the thickness of the insulating filling layer decreases stepwise, and the insulating filling layer can be filled step by step when preparing the insulating filling layer, which improves the convenience of the preparation process of the insulating filling layer.
另外,绝缘填充层的最低端与连接电极的上表面持平;或绝缘填充层的最低端低于连接电极的上表面。该方案中绝缘填充层与连接电极的上表面持平持平,不存在高度差,提高了覆盖绝缘填充层最低端与连接电极的上表面连接处公共电极制备的便利性。In addition, the lowest end of the insulating filling layer is level with the upper surface of the connecting electrode; or the lowest end of the insulating filling layer is lower than the upper surface of the connecting electrode. In this solution, the insulating filling layer is level with the upper surface of the connecting electrode, and there is no height difference, which improves the convenience of preparing the common electrode covering the connection between the lowest end of the insulating filling layer and the upper surface of the connecting electrode.
另外,还包括:包围多个阵列电极的堤坝,连接电极位于堤坝外围,公共电极覆盖堤坝。该方案中在阵列电极外围设置堤坝,避免连接电极被绝缘材料覆盖而增加显示面板的制备时长和制备成本;且堤坝限制了间隙绝缘层和绝缘填充层的外围面积,尤其对于在制备间隙绝缘层过程中为液体的绝缘材料来说,还可阻挡液体绝缘材料的漫延。In addition, it also includes: a dam surrounding a plurality of array electrodes, the connecting electrodes are located on the periphery of the dam, and the common electrode covers the dam. In this scheme, dams are arranged on the periphery of the array electrodes to prevent the connecting electrodes from being covered by insulating materials and increase the preparation time and cost of the display panel; and the dams limit the peripheral area of the gap insulating layer and the insulating filling layer, especially for the gap insulating layer For insulating materials that are liquid during the process, it can also block the spread of liquid insulating materials.
另外,绝缘填充层的最低端与堤坝的上表面持平;或绝缘填充层的最低端低于堤坝的上表面。In addition, the lowest end of the insulating filling layer is level with the upper surface of the dam; or the lowest end of the insulating filling layer is lower than the upper surface of the dam.
另外,连接电极呈围栏状,包围堤坝。In addition, the connection electrodes are in the shape of a fence surrounding the embankment.
另外,呈阶梯状递减的绝缘填充层每一阶梯层的厚度相同。该方案中呈阶梯状递减的绝缘填充层每一阶梯层的厚度相同,统一了每一阶梯层的制备方式,从而为绝缘填充层的制备提供便利。In addition, the thickness of each stepped layer of the stepwise decreasing insulating filling layer is the same. In this solution, the thickness of each stepped layer of the stepwise decreasing insulating filling layer is the same, which unifies the preparation method of each stepping layer, thereby providing convenience for the preparation of the insulating filling layer.
另外,发光芯片包括:设置于阵列电极上方的P型半导体层、设置于P型半导体层上方的发光层以及设置于发光层上方的N型半导体层。In addition, the light-emitting chip includes: a P-type semiconductor layer disposed above the array electrode, a light-emitting layer disposed above the P-type semiconductor layer, and an N-type semiconductor layer disposed above the light-emitting layer.
另外,阵列电极与发光芯片之间设置有电连接层。该方案中在阵列电极与发光芯片之间设置有电连接层,以便整体转移的Micro-LED阵列的发光芯片与驱动背板上的阵列电极对应连接。In addition, an electrical connection layer is provided between the array electrode and the light-emitting chip. In this solution, an electrical connection layer is provided between the array electrodes and the light-emitting chips, so that the light-emitting chips of the integrated Micro-LED array are connected correspondingly to the array electrodes on the driving backplane.
附图说明Description of drawings
图1是根据本实用新型第一实施方式的显示面板的结构示意图;FIG. 1 is a schematic structural view of a display panel according to a first embodiment of the present invention;
图2是根据本实用新型第二实施方式的显示面板的结构示意图;2 is a schematic structural view of a display panel according to a second embodiment of the present invention;
图3是根据本实用新型第三实施方式的显示装置的结构示意图。FIG. 3 is a schematic structural diagram of a display device according to a third embodiment of the present invention.
具体实施方式Detailed ways
为使本实用新型的目的、技术方案和优点更加清楚,下面将结合附图对本实用新型的各实施方式进行详细的阐述。然而,本领域的普通技术人员可以理解,在本实用新型各实施方式中,为了使读者更好地理解本申请而提出了许多技术细节。但是,即使没有这些技术细节和基于以下各实施方式的种种变化和修改,也可以实现本申请各权利要求所要求保护的技术方案。In order to make the purpose, technical solutions and advantages of the present utility model clearer, various implementation modes of the present utility model will be described in detail below in conjunction with the accompanying drawings. However, those of ordinary skill in the art can understand that in each implementation manner of the present utility model, many technical details are proposed in order to enable readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following implementation modes, the technical solution claimed in each claim of the present application can be realized.
本实用新型的第一实施方式涉及一种显示面板,如图1所示,包括:驱动背板1;多个阵列电极11,阵列电极11设置于驱动背板1上且与驱动背板1电连接;多个发光芯片2,每个发光芯片2设置于每个阵列电极11上方且与每个阵列电极11对应电连接;连接电极12,连接电极12设置于驱动背板1上且与驱动背板1电连接,连接电极12设置于多个阵列电极11外围;绝缘填充层31,绝缘填充层31填充于与连接电极12相邻的位于驱动背板边缘的阵列电极110和连接电极12之间,绝缘填充层31的厚度自位于驱动背板边缘的阵列电极110向连接电极12方向递减;公共电极4,公共电极4覆盖于发光芯片2表面、绝缘填充层31表面以及连接电极12表面,公共电极4与发光芯片2以及连接电极12电连接。The first embodiment of the present utility model relates to a display panel, as shown in FIG. 1 , including: a driving backplane 1; a plurality of array electrodes 11, the array electrodes 11 are arranged on the driving backplane 1 and electrically Connection; a plurality of light-emitting chips 2, each light-emitting chip 2 is arranged above each array electrode 11 and is electrically connected with each array electrode 11; connecting electrodes 12, connecting electrodes 12 are arranged on the driving backplane 1 and connected to the driving backplane The board 1 is electrically connected, and the connecting electrodes 12 are arranged on the periphery of a plurality of array electrodes 11; the insulating filling layer 31, and the insulating filling layer 31 is filled between the array electrodes 110 and the connecting electrodes 12 adjacent to the connecting electrodes 12 and located at the edge of the driving backplane , the thickness of the insulating filling layer 31 gradually decreases from the array electrode 110 at the edge of the driving backplane to the direction of the connecting electrode 12; the common electrode 4, the common electrode 4 covers the surface of the light-emitting chip 2, the surface of the insulating filling layer 31 and the surface of the connecting electrode 12, the common The electrode 4 is electrically connected to the light emitting chip 2 and the connection electrode 12 .
具体地说,驱动背板1上设有多个阵列电极11,每个阵列电极11与发光芯片2电连接,每个阵列电极11上方对应电连接一发光芯片2,驱动背板1上还设置有与驱动背板1电连接的一连接电极12,连接电极12设置于多个阵列电极11外围,连接电极12连接驱动背板1和公共电极4;公共电极4覆盖于发光芯片2表面、以及连接电极12表面,并与发光芯片2以及连接电极12电连接。驱动背板1通过连接电极12为公共电极4供电,通过不同的阵列电极11为与该阵列电极11对应的发光芯片2提供导通信号,从而点亮与该阵列电极11电连接的发光芯片2。值得说明的是,本实施方式中驱动背板1可采取主动方式或被动方式驱动发光芯片2发光。Specifically, a plurality of array electrodes 11 are provided on the driving backplane 1, and each array electrode 11 is electrically connected to a light-emitting chip 2, and a corresponding light-emitting chip 2 is electrically connected above each array electrode 11. There is a connection electrode 12 electrically connected to the drive backplane 1, the connection electrode 12 is arranged on the periphery of a plurality of array electrodes 11, the connection electrode 12 is connected to the drive backplane 1 and the common electrode 4; the common electrode 4 covers the surface of the light-emitting chip 2, and The surface of the connection electrode 12 is electrically connected to the light-emitting chip 2 and the connection electrode 12 . Drive the backplane 1 to supply power to the common electrode 4 through the connecting electrodes 12, and provide conduction signals to the light-emitting chips 2 corresponding to the array electrodes 11 through different array electrodes 11, thereby lighting up the light-emitting chips 2 electrically connected to the array electrodes 11 . It is worth noting that in this embodiment, the driving backplane 1 can drive the light-emitting chip 2 to emit light in an active or passive manner.
需要说明的是,一般来说,连接电极12与阵列电极11厚度相同,可在驱动背板1上同时制备连接电极12和阵列电极11。由于在阵列电极11上形成有发光芯片2,因此,形成的发光芯片2的厚度导致发光芯片2表面以及连接电极12表面之间存在高度差,从而导致公共电极4难以覆盖发光芯片2表面以及连接电极12表面。现有技术中通常在连接电极12和发光芯片2之间形成导电连接部,以减小连接电极12与发光芯片2之间的高度差,但此种结构制备成本较高。It should be noted that, generally speaking, the connection electrodes 12 and the array electrodes 11 have the same thickness, and the connection electrodes 12 and the array electrodes 11 can be prepared on the driving backplane 1 at the same time. Since the light-emitting chip 2 is formed on the array electrode 11, the thickness of the formed light-emitting chip 2 leads to a height difference between the surface of the light-emitting chip 2 and the surface of the connecting electrode 12, which makes it difficult for the common electrode 4 to cover the surface of the light-emitting chip 2 and connect the electrodes. electrode 12 surface. In the prior art, a conductive connection portion is usually formed between the connection electrode 12 and the light-emitting chip 2 to reduce the height difference between the connection electrode 12 and the light-emitting chip 2 , but the manufacturing cost of this structure is relatively high.
本实施方式中在驱动背板1的连接电极12和与连接电极12相邻的位于驱动背板边缘的阵列电极110之间,形成高度自位于驱动背板边缘的阵列电极110向连接电极12方向递减的绝缘填充层31,厚度递减的绝缘填充层31作为发光芯片2与连接电极12之间的高度差之间的过渡,支撑公共电极4让公共电极4能够覆盖发光芯片2表面和连接电极12表面,避免由于高度差造成的公共电极4难以覆盖这两个表面的问题,实现了公共电极4与发光芯片2、以及连接电极12的电连接,从而无需在连接电极12上形成单独的导电连接部,降低了显示面板的制备成本。In this embodiment, between the connecting electrodes 12 of the driving backplane 1 and the array electrodes 110 adjacent to the connecting electrodes 12 and located at the edge of the driving backplane, a height from the array electrode 110 at the edge of the driving backplane to the direction of the connecting electrodes 12 is formed. Decreasing insulating filling layer 31, the insulating filling layer 31 with decreasing thickness acts as a transition between the height difference between the light-emitting chip 2 and the connection electrode 12, supports the common electrode 4 so that the common electrode 4 can cover the surface of the light-emitting chip 2 and the connection electrode 12 surface, to avoid the problem that the common electrode 4 is difficult to cover the two surfaces due to the height difference, and realize the electrical connection between the common electrode 4 and the light-emitting chip 2 and the connection electrode 12, so that there is no need to form a separate conductive connection on the connection electrode 12 part, reducing the manufacturing cost of the display panel.
值得说明的是,公共电极4的厚度为0.01-5微米,其材质为导电透明材料,可以为氧化铟锡(ITO)材料、金属合金材料(例如:Ag/Mg)、金属纳米线(例如:Ag纳米线)、金属网格、石墨烯等。制备方式可以包括:物理气相沉积PVD、湿法制膜、真空蒸镀等。It is worth noting that the thickness of the common electrode 4 is 0.01-5 microns, and its material is a conductive transparent material, which can be indium tin oxide (ITO) material, metal alloy material (for example: Ag/Mg), metal nanowire (for example: Ag nanowires), metal grids, graphene, etc. Preparation methods may include: physical vapor deposition PVD, wet film formation, vacuum evaporation, etc.
另外,在本实施方式中,绝缘填充层31的最低端可低于或高于连接电极12的上表面预设距离,从而避免绝缘填充层31最低端与连接电极12的上表面之间高度差过大,不利于覆盖绝缘填充层31最低端与连接电极12的上表面连接处的公共电极4的制备。较佳的,绝缘填充层31的最低端与连接电极12的上表面持平,从而提高了覆盖绝缘填充层31最低端与连接电极12的上表面连接处公共电极4制备的便利性。此处,所说的预设距离可以为-3~3微米。In addition, in this embodiment, the lowest end of the insulating filling layer 31 can be lower or higher than the upper surface of the connecting electrode 12 by a preset distance, so as to avoid the height difference between the lowest end of the insulating filling layer 31 and the upper surface of the connecting electrode 12 If it is too large, it is not conducive to the preparation of the common electrode 4 covering the connection between the lowest end of the insulating filling layer 31 and the upper surface of the connecting electrode 12 . Preferably, the lowest end of the insulating filling layer 31 is flush with the upper surface of the connecting electrode 12 , thereby improving the convenience of preparing the common electrode 4 covering the connection between the lowest end of the insulating filling layer 31 and the upper surface of the connecting electrode 12 . Here, the preset distance may be -3-3 microns.
需要说明的是,在制备绝缘填充层31时,可以同时在各阵列电极11之间同时填充绝缘材料形成间隙绝缘层32,从而能够支撑公共电极4,保证公共电极4不易断裂,从而避免了公共电极4断裂后与阵列电极11连接发生短路。较佳的,填充于各阵列电极11之间的间隙绝缘层32的上表面低于发光芯片2上表面、或与发光芯片2上表面齐平,避免发光芯片2上表面被绝缘材料覆盖,而增加显示面板的制备时长和制备成本。It should be noted that, when preparing the insulating filling layer 31, an insulating material can be filled between each array electrode 11 to form a gap insulating layer 32 at the same time, so as to support the common electrode 4 and ensure that the common electrode 4 is not easy to break, thereby avoiding the common electrode 4. After the electrode 4 is broken, it is connected to the array electrode 11 and short-circuited. Preferably, the upper surface of the gap insulating layer 32 filled between each array electrode 11 is lower than the upper surface of the light-emitting chip 2, or is flush with the upper surface of the light-emitting chip 2, so as to prevent the upper surface of the light-emitting chip 2 from being covered by insulating materials, and The manufacturing time and manufacturing cost of the display panel are increased.
另外,在本实施方式中,绝缘填充层31的高度可呈阶梯状递减,绝缘填充层31的厚度呈阶梯状递减,在制备绝缘填充层31时可以逐阶填充,提高了绝缘填充层31的制备过程的便利性。优选地,呈阶梯状递减的绝缘填充层31每一阶梯层的厚度相同,统一了每一阶梯层的制备方式,从而为绝缘填充层31的制备提供便利。当然,在实际应用中,各个阶梯层的厚度可以并不相同,可根据实际需求制备厚度不同的各个阶梯层。In addition, in this embodiment, the height of the insulating filling layer 31 can be reduced stepwise, and the thickness of the insulating filling layer 31 can be gradually decreasing in a stepwise manner. When the insulating filling layer 31 is prepared, it can be filled step by step, which improves the strength of the insulating filling layer 31. Ease of preparation. Preferably, the thickness of each stepped layer of the stepwise decreasing insulating filling layer 31 is the same, which unifies the preparation method of each stepping layer, thereby facilitating the preparation of the insulating filling layer 31 . Of course, in practical applications, the thickness of each stepped layer may be different, and each stepped layer with different thickness may be prepared according to actual requirements.
可实现地,连接电极12的形状可与阵列电极11的形状相同,连接电极12也可呈长条状设置于阵列电极11的一侧;连接电极12也可呈围栏状,包围阵列电极11设置。相对于其他两种形状,将连接电极12设置为围栏状时,公共电极4与连接电极12的连接面积较大,电阻较小。Achievably, the shape of the connection electrode 12 can be the same as that of the array electrode 11, and the connection electrode 12 can also be arranged on one side of the array electrode 11 in a strip shape; . Compared with the other two shapes, when the connection electrode 12 is arranged in a fence shape, the connection area between the common electrode 4 and the connection electrode 12 is larger and the resistance is smaller.
另外,发光芯片2包括:设置在阵列电极11上的P型半导体层21、设置于P型半导体层21上方的发光层22、以及设置于发光层22上方的N型半导体层23。其中,P型半导体层21可以为掺杂正二价如Mg、Zn等的三五族化合物(如GaN或GaAs等),N型半导体层23可以为掺杂第四族如Si等的三五族化合物(如GaN或GaAs等),发光层22的材料可以为第三族B、Al、Ga、In等和第五族N、P、As、Te等元素组成的半导体材料。In addition, the light-emitting chip 2 includes: a P-type semiconductor layer 21 disposed on the array electrode 11 , a light-emitting layer 22 disposed above the P-type semiconductor layer 21 , and an N-type semiconductor layer 23 disposed above the light-emitting layer 22 . Wherein, the P-type semiconductor layer 21 can be a group III-V compound (such as GaN or GaAs, etc.) doped with a positive divalent such as Mg, Zn, etc., and the N-type semiconductor layer 23 can be a group III-V group doped with a fourth group such as Si. compound (such as GaN or GaAs, etc.), the material of the light-emitting layer 22 can be a semiconductor material composed of elements such as Group III B, Al, Ga, In, etc. and Group V N, P, As, Te, etc.
此处仅为举例说明,在实际制作中,可以根据实际需求选择掺杂其他材料的P型半导体层21和N型半导体层23。This is only for illustration. In actual production, the P-type semiconductor layer 21 and the N-type semiconductor layer 23 doped with other materials can be selected according to actual needs.
值得说明的是,基于垂直芯片的Micro-LED显示面板中,在阵列电极11与发光芯片2之间可设置有电连接层,以便整体转移的Micro-LED阵列的发光芯片2与驱动背板1上的阵列电极11对应连接。Micro-LED阵列通常为激光剥离蓝宝石衬底后的薄膜LED芯片,电连接层可使用In/In、In/Au、Sn/Au、Sn/Cu等金属。It is worth noting that, in the Micro-LED display panel based on vertical chips, an electrical connection layer can be provided between the array electrodes 11 and the light-emitting chips 2, so that the light-emitting chips 2 and the driving backplane 1 of the Micro-LED array transferred as a whole The array electrodes 11 above are connected correspondingly. Micro-LED arrays are usually thin-film LED chips after laser lift off the sapphire substrate, and metals such as In/In, In/Au, Sn/Au, Sn/Cu can be used for the electrical connection layer.
与现有技术相比,本实施方式中提供了一种显示面板,在驱动背板1的连接电极12和与连接电极12相邻的位于驱动背板边缘的阵列电极110之间,形成高度自位于驱动背板边缘的阵列电极110向连接电极12方向递减的绝缘填充层31,厚度递减的绝缘填充层31作为发光芯片2与连接电极12之间的高度差之间的过渡,支撑公共电极4让公共电极4能够覆盖发光芯片2表面和连接电极12表面,避免由于高度差造成的公共电极4难以覆盖这两个表面的问题,实现了公共电极4与发光芯片2、以及连接电极12的电连接,从而无需在连接电极12上形成单独的导电连接部,降低了显示面板的制备成本。Compared with the prior art, this embodiment provides a display panel in which a highly self-contained structure is formed between the connecting electrode 12 of the driving backplane 1 and the array electrode 110 adjacent to the connecting electrode 12 and located at the edge of the driving backplane. The array electrode 110 located on the edge of the driving backplane is gradually decreasing in the direction of the connecting electrode 12. The insulating filling layer 31 is used as a transition between the height difference between the light-emitting chip 2 and the connecting electrode 12, and supports the common electrode 4. Allowing the common electrode 4 to cover the surface of the light-emitting chip 2 and the surface of the connecting electrode 12 avoids the problem that the common electrode 4 is difficult to cover the two surfaces due to the height difference, and realizes the electrical connection between the common electrode 4 and the light-emitting chip 2 and the connecting electrode 12. connection, so that there is no need to form a separate conductive connection part on the connection electrode 12, which reduces the manufacturing cost of the display panel.
本实用新型的第二实施方式涉及一种显示面板。如图2所示,第二实施方式与第一实施方式大致相同,主要区别之处在于:还包括:包围多个阵列电极11的堤坝5,连接电极12位于堤坝5外围,公共电极4覆盖堤坝5。The second embodiment of the present invention relates to a display panel. As shown in FIG. 2 , the second embodiment is substantially the same as the first embodiment, the main difference is that it also includes: a bank 5 surrounding a plurality of array electrodes 11, the connecting electrodes 12 are located on the periphery of the bank 5, and the common electrode 4 covers the bank 5.
可实现地,连接电极12也可设置于堤坝5内侧,在形成间隙绝缘层32和绝缘填充层31时,需要利用掩膜版避免连接电极12材料覆盖;或者在形成间隙绝缘层32和绝缘填充层31后,需要刻蚀掉覆盖连接电极12的绝缘材料,增加了显示面板的制备时长和制备成本。而本实施方式中在阵列电极11外围设置堤坝5,避免连接电极12被绝缘材料覆盖而增加显示面板的制备时长和制备成本;且堤坝5限制了间隙绝缘层32和绝缘填充层31的外围面积,尤其对于在制备间隙绝缘层32过程中为液体的绝缘材料来说,还可阻挡液体绝缘材料的漫延。Achievably, the connection electrode 12 can also be arranged inside the dam 5. When forming the gap insulation layer 32 and the insulation filling layer 31, it is necessary to use a mask to avoid the material covering of the connection electrode 12; or when forming the gap insulation layer 32 and the insulation filling layer After layer 31, the insulating material covering the connecting electrodes 12 needs to be etched away, which increases the manufacturing time and cost of the display panel. However, in this embodiment, dams 5 are arranged on the periphery of the array electrodes 11 to prevent the connecting electrodes 12 from being covered by insulating materials and increase the manufacturing time and cost of the display panel; and the dams 5 limit the peripheral areas of the gap insulating layer 32 and the insulating filling layer 31 , especially for the insulating material that is liquid during the process of preparing the gap insulating layer 32, it can also prevent the spreading of the liquid insulating material.
值得说明的是,间隙绝缘层32和绝缘填充层31的绝缘材料相同,方便同时形成间隙绝缘层32和绝缘填充层31,绝缘材料使用干刻蚀型或光敏型可图形化材料。较佳的,绝缘材料可为光敏型可图形化材料,在制备间隙绝缘层32和绝缘填充层31的过程中可具备一定的流动性,之后通过工艺固化,有利于形成高度递减的绝缘填充层31。例如:绝缘材料可以为紫外光敏剂与聚甲基丙烯酸甲酯的混合物。It is worth noting that the insulation material of the gap insulating layer 32 and the insulating filling layer 31 is the same, which is convenient for forming the gap insulating layer 32 and the insulating filling layer 31 at the same time. The insulating material is a dry etching or photosensitive patternable material. Preferably, the insulating material can be a photosensitive patternable material, which can have a certain degree of fluidity during the preparation of the gap insulating layer 32 and the insulating filling layer 31, and then be cured by a process, which is conducive to the formation of a decreasingly height insulating filling layer 31. For example: the insulating material may be a mixture of UV sensitizer and polymethyl methacrylate.
在堤坝5内制备阵列电极11之间的间隙绝缘层32、以及位于驱动背板边缘的阵列电极110和连接电极12之间的绝缘填充层31时,较优的,绝缘填充层31和间隙绝缘层32由喷墨打印工艺制备。在堤坝内区域,避开发光芯片2位置,通过阵列排布的打印喷嘴喷出填充层材料,喷出后,驱动背板1静置一段时间使墨水流平,流平后经过紫外光处理,墨水完成固化过程。较佳的,固化后的间隙绝缘层32高度低于发光芯片2上表面、或与发光芯片2上表面齐平,避免发光芯片2上表面被绝缘材料覆盖,而增加显示面板的制备时长和制备成本。When preparing the gap insulating layer 32 between the array electrodes 11 and the insulating filling layer 31 between the array electrode 110 and the connecting electrode 12 at the edge of the driving backplane in the dam 5, preferably, the insulating filling layer 31 and the gap insulating Layer 32 is produced by an inkjet printing process. In the area inside the dam, avoid the position of the light-emitting chip 2, and spray the filling layer material through the printing nozzles arranged in an array. After spraying, the backplane 1 is driven to stand for a period of time to make the ink level. After leveling, it is treated with ultraviolet light. The ink completes the curing process. Preferably, the height of the cured gap insulating layer 32 is lower than the upper surface of the light-emitting chip 2, or flush with the upper surface of the light-emitting chip 2, so as to prevent the upper surface of the light-emitting chip 2 from being covered by insulating materials, thereby increasing the preparation time and length of the display panel. cost.
绝缘填充层31的最低端可低于或高于堤坝5的上表面预设距离,从而避免绝缘填充层31最低端与堤坝5的上表面之间高度差过大,不利于覆盖绝缘填充层31最低端与堤坝5的上表面连接处的公共电极4的制备。较佳的,绝缘填充层31的最低端与连接堤坝5的上表面持平,从而提高了覆盖绝缘填充层31最低端与连接电极12的上表面连接处公共电极4制备的便利性。此处,所说的预设距离可以为-3~3微米。The lowest end of the insulating filling layer 31 can be lower than or higher than the upper surface of the embankment 5 by a predetermined distance, thereby avoiding an excessive height difference between the lowest end of the insulating filling layer 31 and the upper surface of the embankment 5, which is not conducive to covering the insulating filling layer 31 Preparation of the common electrode 4 at the junction of the lowest end and the upper surface of the embankment 5 . Preferably, the lowest end of the insulating filling layer 31 is flush with the upper surface of the connection bank 5 , thereby improving the convenience of preparing the common electrode 4 covering the connection between the lowest end of the insulating filling layer 31 and the upper surface of the connecting electrode 12 . Here, the preset distance may be -3-3 microns.
本实施方式中堤坝材料可以选择常用的光刻胶,先在驱动面板表面涂覆一层光刻胶,通过曝光显影工艺制备出需要的堤坝区图形。堤坝区的厚度可以为1微米至10微米,由于连接电极12的厚度一般较小,堤坝5的厚度与连接电极12的厚度相差较大,也可在堤坝5和连接电极12之间填充绝缘材料,以支撑堤坝5和连接电极12之间的公共电极4不易断裂。In this embodiment, the material of the embankment can be selected from commonly used photoresist. First, a layer of photoresist is coated on the surface of the driving panel, and the required pattern of the embankment area is prepared through an exposure and development process. The thickness of the dam area can be 1 micron to 10 microns, because the thickness of the connecting electrode 12 is generally small, the thickness of the dam 5 and the thickness of the connecting electrode 12 are quite different, and an insulating material can also be filled between the dam 5 and the connecting electrode 12 , so as to support the common electrode 4 between the embankment 5 and the connecting electrode 12 so as not to break easily.
可实现地,位于堤坝5外围的连接电极12的形状可与阵列电极11的形状相同,连接电极12也可呈长条状设置于堤坝5外围的一侧;连接电极12也可呈围栏状,包围堤坝5设置。相对于其他两种形状,将连接电极12设置为围栏状时,包围堤坝5,公共电极4与连接电极12的接触面积较大,公共电极4与连接电极12在传输电信号时阻性较小。Achievably, the shape of the connection electrode 12 located at the periphery of the dam 5 can be the same as the shape of the array electrode 11, and the connection electrode 12 can also be arranged on one side of the periphery of the dam 5 in a strip shape; the connection electrode 12 can also be in the shape of a fence, Surrounding dikes 5 are set. Compared with the other two shapes, when the connecting electrode 12 is arranged in a fence shape, surrounding the dam 5, the contact area between the common electrode 4 and the connecting electrode 12 is larger, and the resistance between the common electrode 4 and the connecting electrode 12 is smaller when transmitting electrical signals .
本实施方式提供了一种显示面板,在阵列电极11外围设置堤坝5,避免连接电极12被绝缘材料覆盖而增加显示面板的制备时长和制备成本;且堤坝5限制了间隙绝缘层32和绝缘填充层31的外围面积,尤其对于在制备间隙绝缘层32过程中为液体的绝缘材料来说,还可阻挡液体绝缘材料的漫延。This embodiment provides a display panel, in which dams 5 are arranged around the array electrodes 11 to prevent the connecting electrodes 12 from being covered by insulating materials and increase the manufacturing time and cost of the display panel; and the dams 5 limit the gap insulating layer 32 and insulating filling The peripheral area of the layer 31, especially for insulating materials that are liquid during the preparation of the gap insulating layer 32, also acts as a barrier to the spreading of the liquid insulating material.
本实用新型的第三实施方式涉及一种显示装置,如图3所示,包括:如上述任意一实施方式的显示面板31、设置于显示面板31上方的薄膜封装层32、以及设置于薄膜封装层32上方的透光层35。可选地,还可在薄膜封装层32上方设置触摸屏33、并在设置于触摸屏33上方的偏光片34。The third embodiment of the present utility model relates to a display device, as shown in FIG. 3 , comprising: a display panel 31 according to any one of the above-mentioned embodiments, a thin film encapsulation layer 32 disposed above the display panel 31 , and a film encapsulation layer 32 disposed on the film encapsulation layer. Light-transmitting layer 35 above layer 32 . Optionally, a touch screen 33 and a polarizer 34 disposed above the touch screen 33 may also be provided on the thin film encapsulation layer 32 .
本领域的普通技术人员可以理解,上述各实施方式是实现本实用新型的具体实施例,而在实际应用中,可以在形式上和细节上对其作各种改变,而不偏离本实用新型的精神和范围。Those of ordinary skill in the art can understand that the above-mentioned embodiments are specific examples for realizing the utility model, and in practical applications, various changes can be made to it in form and details without departing from the utility model spirit and scope.
Claims (10)
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CN113348411A (en) * | 2020-01-03 | 2021-09-03 | 京东方科技集团股份有限公司 | Array substrate, preparation method thereof and backlight module |
WO2024244742A1 (en) * | 2023-05-26 | 2024-12-05 | 京东方科技集团股份有限公司 | Light-emitting substrate and manufacturing method therefor, and display apparatus |
WO2024260193A1 (en) * | 2023-06-20 | 2024-12-26 | 京东方科技集团股份有限公司 | Light-emitting substrate |
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US7880182B2 (en) * | 2002-07-15 | 2011-02-01 | Epistar Corporation | Light-emitting element array |
JP4386008B2 (en) * | 2004-11-11 | 2009-12-16 | セイコーエプソン株式会社 | Mounting board and electronic equipment |
CN109314164B (en) * | 2016-05-25 | 2022-04-15 | 朱振甫 | Semiconductor continuous array layer |
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CN113348411A (en) * | 2020-01-03 | 2021-09-03 | 京东方科技集团股份有限公司 | Array substrate, preparation method thereof and backlight module |
WO2024244742A1 (en) * | 2023-05-26 | 2024-12-05 | 京东方科技集团股份有限公司 | Light-emitting substrate and manufacturing method therefor, and display apparatus |
WO2024260193A1 (en) * | 2023-06-20 | 2024-12-26 | 京东方科技集团股份有限公司 | Light-emitting substrate |
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