CN207399229U

CN207399229U - A kind of POE electric power systems

Info

Publication number: CN207399229U
Application number: CN201721210246.7U
Authority: CN
Inventors: 揭飞; 叶强
Original assignee: Zhejiang Dahua Technology Co Ltd
Current assignee: Zhejiang Dahua Technology Co Ltd
Priority date: 2017-09-19
Filing date: 2017-09-19
Publication date: 2018-05-22
Anticipated expiration: 2027-09-19

Abstract

The utility model discloses a kind of POE electric power systems, the POE electric power systems include equipment power supply, further include：Upper electrical switch, power supply end equipment PSE, MCU control module, control switch；For the first end of the equipment power supply for being connected with receiving end equipment PD, second end connects the upper electrical switch, and the upper electrical switch is connected with the PSE, and the PSE is used to be connected with the PD；The MCU control module connects the PSE, and is connected with the first end of the equipment power supply, and the MCU control module is also respectively connected with the upper electrical switch and the control switch；The control switch ground connection, and the PSE is connected, the control switch is additionally operable to be connected with the PD；When the MCU control module detects no PD accesses, the MCU control module controls the upper electrical switch to disconnect, and controls control switch conduction.In the utility model, the loss of POE electric power systems is reduced.

Description

POE power supply system

Technical Field

The utility model relates to a power supply technical field especially relates to a POE power supply system.

Background

With the rapid development of network monitoring in recent years, technical support provided by manufacturers tends to be generalized and systematized more and more, and a POE (Power Over Ethernet) Power supply scheme capable of providing direct current for monitoring equipment is widely applied.

In the prior art, a POE Power supply scheme is generally shown in a schematic structural diagram of Power supply Equipment in fig. 1, an Equipment Power supply mainly supplies Power to each control module, each control module includes a PSE (Power Sourcing Equipment) Power supply control module and an Equipment control module, and the Power supply is used for supplying Power to POE. The power supply control module receiving equipment control module's enable signal makes power supply be in operating condition, and power supply passes through PSE + and PSE-and exports the transformer, and the transformer carries out the coupling back to power supply, transmits for the powered device through twisted pair cable, realizes the POE power supply, receiving equipment control module's the enable signal that goes, and power supply is in non-operating condition, can't realize the POE power supply.

The working process that this power supply scheme's POE was electrified is shown in fig. 2, and equipment control module control device power and power supply control module's route to open power supply through control signal, equipment control module sends the port enable instruction and gives power supply control module, and power supply control module carries out the POE power supply according to the port enable instruction configuration port that receives and starts, messenger power supply. The working process that the POE of this power supply scheme was electrified is shown in fig. 3, and equipment control module sends to enable the instruction and gives power supply control module, and power supply control module goes to enable the instruction configuration port according to the port that receives and closes, makes power supply cut off the POE power supply, and equipment control module closes power supply through control signal, breaks off the route of equipment power and power supply control module.

Or as shown in another POE power supply scheme provided in fig. 4, a PD chip in a PD (Powered Device) can learn whether the PSE switch is normal from the PSE chip in the PSE switch, if so, the PSE chip can provide a DC/DC signal in a system power supply, the system power supply is in signal connection with the PD chip through the DC/DC signal, and the power consumption of the PD Device is determined, so that the system power supply is used as a power supply to supply power to the POE power supply according to the power consumption of the PD Device, and the POE power supply supplies the PD Device with the required power.

In a first POE power supply scheme provided in the prior art, a switch is used to directly control the on and off of an equipment power supply and a power supply, and under the condition of no load of a system, a path between an equipment control module and a power supply control module is disconnected, and communication lines between the power supply control module and the power supply control module still have high loss; in the second POE power supply scheme, when the system is idle, the PSE switch is always in an operating state, and the loss of the communication line between the DC/DC signal and the PD chip is not reduced, so that high consumption still exists.

SUMMERY OF THE UTILITY MODEL

The utility model provides a POE power supply system for solve among the prior art POE power supply system the higher problem of loss.

In order to solve the problem, the embodiment of the utility model discloses POE power supply system, including the equipment power, POE power supply system still includes: the system comprises a power-on switch, a power supply end device PSE, a micro control unit MCU control module and a control switch;

the first end of the device power supply is used for being connected with a power receiving end device (PD), the second end of the device power supply is connected with the power-on switch, the power-on switch is connected with the PSE, and the PSE is used for being connected with the PD;

the MCU control module is connected with the PSE and the first end of the equipment power supply, and is also respectively connected with the power-on switch and the control switch; the control switch is grounded and connected with the PSE, and the control switch is also used for being connected with the PD;

and the MCU control module controls the power-on switch to be switched off and controls the control switch to be switched on when no PD access is detected according to the information stored in the PSE.

Further, in the POE power supply system, when the MCU control module detects that the PD is connected, the MCU control module controls the control switch to be turned off and controls the power-on switch to be turned on.

Further, when the MCU control module detects that the PSE is abnormal according to information stored in the PSE, the MCU control module controls the power-on switch to be switched off and controls the control switch to be switched on.

Further, the MCU control module comprises an MCU, a first resistor and a first diode; wherein,

one end of the first resistor is connected with a first end of the equipment power supply, the other end of the first resistor is connected with the anode of the first diode, and the cathode of the first diode is used for being connected with the PD;

the MCU is connected with the anode of the first diode and the second series connection point of the first resistor.

Further, when the MCU detects that no PD is accessed, the MCU controls the control switch to be switched off, enters a dormant state, wakes up according to a set time interval, and controls the control switch to be switched on after waking up.

Further, the power-up switch includes: the circuit comprises a second resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first triode, a first MOS (metal oxide semiconductor) tube, a second triode and a third triode; wherein,

the second end of the equipment power supply is connected with the source electrode of the first MOS tube, the grid electrode of the first MOS tube is connected with the fourth resistor, the end, which is not connected with the grid electrode of the first MOS tube, of the fourth resistor is connected with the collector electrode of the first triode, the base electrode of the first triode is connected with the MCU, the emitting electrode of the first triode is grounded, and the second resistor is connected in parallel with the source electrode and the grid electrode of the first MOS tube;

the drain electrode of the first MOS tube is connected with the emitter electrode of the second triode, the collector electrode of the second triode is connected with the PSE, the base electrode of the second triode is connected with the sixth resistor, one end, which is not connected with the base electrode of the second triode, of the sixth resistor is connected with the collector electrode of the third triode, the base electrode of the third triode is connected with the MCU, the emitter electrode of the third triode is grounded, the fifth resistor is connected in parallel with the two ends of the emitter electrode and the base electrode of the second triode, and the third series connection point of the drain electrode of the first MOS tube and the emitter electrode of the second triode is connected with the fourth series connection point of the cathode electrode of the first diode and the PD;

when the MCU detects that no PD is accessed, the MCU controls the first triode and the third triode to be disconnected; and when the MCU detects that the PD is accessed, the MCU controls the conduction of the first triode and the third triode.

Further, the power-up switch further comprises: a second capacitor;

the second capacitor is connected in parallel with the second resistor.

Further, the power-up switch further comprises: a first capacitor and a third resistor;

the first capacitor is connected with the third resistor in series, one end of the first capacitor, which is not connected with the third resistor, is connected with the drain electrode of the first MOS tube, and one end of the third resistor, which is not connected with the first capacitor, is connected with the gate electrode of the first MOS tube.

Further, the control switch includes: an OR gate and a second MOS tube; wherein,

the input end of the OR gate is respectively connected with the PSE and the MCU, and the output end of the OR gate is connected with the grid electrode of the second MOS tube; the PSE inputs a low-level signal to the OR gate;

the grid electrode of the second MOS tube is connected with the output end of the OR gate, the source electrode of the second MOS tube is grounded, and the drain electrode of the second MOS tube is used for being connected with the PD;

when the MCU detects that no PD is accessed, a high level signal is input to the OR gate; and when the MCU detects that a PD is accessed, a low-level signal is input to the OR gate.

Further, the drain of the second MOS transistor is connected to a third serial point of the PSE and PD.

The embodiment of the utility model provides a POE power supply system, POE power supply system includes the equipment power, still includes: the system comprises a power-on switch, a power supply end device PSE, a micro control unit MCU control module and a control switch; the first end of the device power supply is used for being connected with a power receiving end device (PD), the second end of the device power supply is connected with the power-on switch, the power-on switch is connected with the PSE, and the PSE is used for being connected with the PD; the MCU control module is connected with the PSE and the first end of the equipment power supply, and is also respectively connected with the power-on switch and the control switch; the control switch is grounded and connected with the PSE, and the control switch is also used for being connected with the PD; and when the MCU control module detects that no PD is accessed according to the information stored in the PSE, the MCU control module controls the power-on switch to be switched off and controls the control switch to be switched on. The embodiment of the utility model provides an in, when MCU control module detects empty load, control go up the switch disconnection, control switch switches on, forms the closed circuit of equipment power, MCU control module, control switch and ground, because under empty load's the condition, go up the switch disconnection between power and the PSE, PSE does not have the loss to POE power supply system's loss only is MCU control module's consumption, thereby has reduced the loss among the POE power supply system effectively.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a power supply device of a POE power supply scheme provided in the prior art;

fig. 2 is a working process of POE power up of a POE power supply scheme provided in the prior art;

fig. 3 illustrates a POE powering-down operation of a POE power supply scheme provided in the prior art;

fig. 4 is another POE power scheme provided in the prior art;

fig. 5 is a schematic structural diagram of a POE power supply system provided in embodiment 1 of the present invention;

fig. 6 is a schematic structural diagram of a POE power supply system provided in embodiment 3 of the present invention;

fig. 7 is a schematic structural diagram of a POE power supply system provided in embodiment 4 of the present invention;

fig. 8 is a schematic structural diagram of a POE power supply system provided in embodiment 5 of the present invention;

fig. 9 is a schematic structural diagram of a POE power supply system provided in embodiment 6 of the present invention;

fig. 10 is a schematic structural diagram of another POE power supply system according to embodiment 6 of the present invention;

fig. 11 is a schematic structural diagram of the POE power supply system provided by embodiment 7 of the present invention.

Detailed Description

In order to reduce POE power supply system's loss, the utility model provides a POE power supply system.

In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Example 1:

fig. 5 is a schematic structural diagram of a POE power supply system provided in an embodiment of the present invention, where the POE power supply system includes a device power supply 51, an upper power switch 52, a PSE53, an MCU (MicroController Unit) control module 54, and a control switch 55;

the device power supply 51 has a first terminal for connecting to the PD, a second terminal for connecting to the power-on switch 52, the power-on switch 52 is connected to the PSE53, a first series connection point of the power-on switch 52 and the PSE53 is for connecting to the PD, and the PSE53 is for connecting to the PD;

the MCU control module 54 is connected to the PSE53 and connected to a first end of the device power supply 51, and the MCU control module 54 is further connected to the power-on switch 52 and the control switch 55 respectively; the control switch 55 is connected to ground and the PSE53, the control switch 55 is also used for connection with the PD;

when the MCU control module 54 detects that no PD is accessed according to the information stored in the PSE53, the MCU control module 54 controls the power-on switch 52 to be turned off and controls the control switch 55 to be turned on.

When the MCU control module 54 detects that the PD is not accessed in fig. 5, the MCU control module 54 controls the power-on switch 52 to be turned off, so as to open the circuit between the device power supply 51 and the PSE53, and the control switch 55 is turned on, so as to form a loop consisting of the device power supply 51, the MCU control module 54, the control switch 55 and the ground in the POE system, so that the POE system does not cause loss when idling, and the loss in the POE power supply system is only the power consumption of the MCU control module 54.

The embodiment of the utility model provides an in, device power 51 is when the PD DOEs not insert, and the voltage that provides is 5V, and only MCU control module 54 in the whole POE system produces the consumption, and the consumption current is within 0.7mA, has strictly satisfied the DOE-VI of product or ERP-V's standby/no-load power consumption standard.

The MCU control module 54 may perform real-time detection or detection at set time intervals when detecting whether the PD is accessed, and if the MCU control module 54 detects at set first time intervals, the MCU control module 54 enters a sleep state when detecting that the PD is not accessed at a certain time, wakes up itself at set second time intervals, and performs detection again. The first time interval and the second time interval may be the same or may be different.

Specifically, the PSE53 may determine whether a PD is connected to the power system after power up and store information in its status register whether a PD is connected to the power system. The MCU control module 54 may read the information stored in the status register of the PSE53, and when the PD is removed, the information stored in the status register of the PSE53 indicates that the PD has no access, and the MCU control module 54 determines that there is no PD access according to the information stored in the status register of the PSE 53.

The MCU control module 54 determines whether the PD is accessed, and then performs corresponding control according to the determination result, which is easier to debug and maintain than an analog circuit, and has good ductility.

In the present embodiment, the device power supply 51 is grounded.

The embodiment of the utility model provides an in, when MCU control module detects empty load, control go up the switch disconnection, control switch switches on, forms the closed circuit of equipment power, MCU control module, control switch and ground, because under empty load's the condition, go up the switch disconnection between power and the PSE, PSE does not have the loss to POE power supply system's loss only is MCU control module's consumption, thereby has reduced the loss among the POE power supply system effectively.

Example 2:

on the basis of the above embodiment, in order to supply power to the power receiving end device, when the MCU control module 54 detects that a PD is accessed, the MCU control module 54 controls the control switch 55 to be turned off, and controls the power-on switch 52 to be turned on.

Fig. 6 is a schematic structural diagram of a POE power supply system provided in an embodiment of the present invention, where the MCU control module 54 includes an MCU541, a first resistor R1, and a first diode D1; wherein,

the first resistor R1 has one end connected to the first end of the device power supply 51 and the other end connected to the anode of the first diode D1, the cathode of the first diode D1 being used for connecting with the PD;

the MCU541 is connected to an anode of the first diode D1 and a second series point of the first resistor R1.

The power receiving end device PD can be a small-power receiving device such as a telephone and a small-sized switch, and can also be a large-power receiving device such as a personal computer and a high-definition video monitoring system.

When the MCU control module 54 recognizes that there is no PD access, the MCU control module 54 controls the power-on switch 52 to be turned off and controls the control switch 55 to be turned on, so that the device power, R1, MCU, control switch and ground will form a loop; if the PD is connected, a loop is formed among the device power supply 51, the R1, the D1, the PD, the control switch 55 and the ground. Since the device power supply outputs a constant voltage before supplying no power to the PD, the divided voltage value of R1 may be different depending on whether or not the PD is connected. Therefore, when no PD access exists, the first partial pressure value of R1 may be saved in the MCU, and the MCU detects whether a difference value corresponding to the second partial pressure value of R1 and the saved first partial pressure value satisfies a preset difference value range, if so, it is determined that no PD access exists, and if not, it is determined that the PD access exists, where the preset difference value range may be saved in the MCU in advance, and a specific preset difference value range may be determined by a person skilled in the art according to an empirical value or an experimental value, for example, the preset difference value range may be that the difference value is not less than-5 and the difference value is not greater than 5, that is, the difference value is between-5 and 5.

Because when the PD is not used, the device power supply 51, the R1, the MCU541, the control switch 55 and the ground form a loop, if the PD is connected, the device power supply 51, the R1, the D1, the PD, the control switch 55 and the ground also form a loop, and the R1 and the PD divide the 5V detection voltage provided by the device power supply, if the MCU541 detects the second divided voltage value of the R1, and the difference value corresponding to the first divided voltage value of the R1 stored by the MCU541 when the PD is not used does not satisfy the preset difference range, it is considered that the PD is connected, the MCU541 controls the control switch 55 to be disconnected, controls the power-on switch 52 to be connected, and provides POE power to the PD through the PSE 53. A path is formed between the device power supply 51 and the PSE53, and a closed loop of the device power supply 51, the power-on switch 52, the PD, the control switch 55, and the device power supply 51 is formed in the POE system, so that the device power supply 51 supplies POE power to the PD through the PSE 53.

In the embodiment of the present invention, when the PD is connected to the device power supply 51, the provided power supply voltage is 48V.

In order to reach accurate power supply, in the embodiment of the present invention, after the device power supply 51 supplies power to the PD through POE, the PD 53 can negotiate with the PD, and the PD returns an effective load to the PSE53, i.e. the power required by the PD itself, and the PSE53 provides corresponding current and voltage for the PD.

In order to further improve the safety of the POE power supply system, when the MCU control module 54 detects that there is an abnormality in the PSE53 according to the information stored in the PSE53, the MCU control module 54 controls the power-on switch 52 to be turned off and controls the control switch 55 to be turned on.

Specifically, MCU541 obtains the information saved in the status register of PSE53, and if the information obtained shows that PSE53 is abnormal and can not supply power for PD normally, MCU541 controls power-on switch 52 to be disconnected, and control switch 55 is switched on, so as to improve the safety of the POE power supply system and avoid the damage of the POE power supply system.

The embodiment of the utility model provides an in, when MCU detects the PD and inserts, control go up the electric switch and switch on, control the control switch disconnection forms the equipment power, goes up the closed loop of electric switch, PSE, power receiving end equipment and equipment power to make the equipment power carry out the POE power supply for power receiving end equipment through PSE.

Example 3:

in order to further reduce the consumption in the POE power supply system, on the basis of each of the above embodiments, in the embodiment of the present invention, when the MCU541 detects that there is no PD to access, it controls the control switch 55 to be disconnected, and itself enters into the sleep state, and wakes up according to the set time interval, and controls after waking up the control switch 55 to be turned on.

Although the power consumption of the MCU541 is small, in order to further reduce the power consumption, when the MCU541 detects that no PD is connected, the MCU541 itself may also enter a sleep state, before the sleep state, the MCU541 controls the control switch 55 to be turned off, and the MCU541 in the sleep state may wake up itself at a set time interval, after waking up, the control switch 55 is controlled to be turned on, and whether a PD is connected is determined by detecting a voltage division value of R1, and if no PD is connected, the control switch 55 is controlled to be turned off, and then itself enters the sleep state.

The embodiment of the utility model provides an in, MCU detects when not having the PD to insert, and control switch breaks off, and self gets into the dormant state, has further reduced the consumption among the POE power supply system.

Example 4:

on the basis of above-mentioned each embodiment, in order to make MCU judge accurately whether there is the powered device to insert the utility model discloses in the embodiment, figure 7 does the utility model discloses a POE power supply system's that provides structural schematic diagram, go up electric switch 52 and include: the circuit comprises a second resistor R2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first triode Q1, a first MOS transistor M1, a second triode Q2 and a third triode Q3; wherein,

the device power supply 51 is connected with the source of the first MOS transistor M1, the gate of the first MOS transistor M1 is connected with the fourth resistor R4, the end of the fourth resistor R4 not connected with the gate of the first MOS transistor M1 is connected with the collector of the first transistor Q1, the base of the first transistor Q1 is connected with the MCU541, the emitter of the first transistor Q1 is grounded, and the second resistor R2 is connected in parallel across the source and the gate of the first MOS transistor M1;

the drain of the first MOS transistor M1 is connected to the emitter of the second transistor Q2, the collector of the second transistor Q2 is connected to the PSE53, the base of the second transistor Q2 is connected to the sixth resistor R6, the end of the sixth resistor R6 not connected to the base of the second transistor Q2 is connected to the collector of the third transistor Q3, the base of the third transistor Q3 is connected to the MCU541, the emitter of the third transistor Q3 is grounded, the fifth resistor R5 is connected in parallel to both ends of the emitter and the base of the second transistor Q2, and the third series connection point of the drain of the first MOS transistor M1 and the emitter of the second transistor Q2 is connected to the fourth series connection point of the cathode of the first diode D1 and the PD;

when the MCU541 detects that no PD is accessed, the MCU541 controls the first transistor Q1 and the third transistor Q3 to be turned off; when the MCU541 detects a PD, the MCU541 controls the first transistor Q1 and the third transistor Q3 to be turned on.

The PSE53 is connected with a device power supply through M1 and Q2 two-pole switches, because in the POE power supply process, the normal working voltage range of a PSE53 chip is 32V-60V, but when no PD is accessed, 5V detection voltage supplies power to a PSE53 chip through D1, at this time, a PSE53 consumes certain current due to internal logic, which is particularly obvious in the low-temperature condition, on one hand, the no-load power consumption of the system can be increased, on the other hand, after the PSE53 forms a power supply loop, the PSE also consumes current under the low-voltage condition, the voltage of a monitoring point of a load, namely the voltage dividing value of R1, can be reduced to be very low and then slowly increased, the voltage of the monitoring point in the process can be different from the first voltage dividing value, so that the MCU541 judges that the PD is accessed by mistake, and the whole POE power supply system starts to. This time can last tens of seconds under low temperature environment for POE power supply system can last tens of seconds's power supply, has increased the loss, because break Q2 earlier before the disconnection M1 can guarantee that the condition that the monitoring point voltage can not appear falling earlier then rising, has avoided MCU 541's erroneous judgement.

When the PD is unplugged, the MCU541 reads the information stored in the status register of the PSE53, and if the information stored in the status register indicates that no PD is plugged in, the MCU541 controls the Q3 to be disconnected, so that the emitter-base voltage of Q2 is zero, the base current of Q2 is zero, and thus Q2 is cut off and disconnected, so that the device power supply 51 and the PSE53 are disconnected, and the PSE53 is powered off; then, the Q1 is controlled to be turned off, so that the gate-source of the M1 is lowered to a cut-off voltage, the M1 is completely turned off, the power supply 48V is turned off, a power supply loop of the PSE53 is disconnected, and the MCU541 controls the control switch 55 to be turned on to judge whether a PD is connected.

When detecting that a PD is accessed, the MCU541 controls Q3 to turn on, so that the base current of Q2 reaches a saturated conduction state, and the device power supply 51 is conducted with the PSE 53; then, the Q1 is controlled to be started, the grid electrode-source electrode of the M1 is enabled to reach a saturated conduction condition, the M1 is controlled to be conducted, a power supply loop of the PSE53 is formed, meanwhile, the MCU541 reads information stored in a state register of the PSE53, if the MCU541 judges that the PSE53 is normal through the read information in the state register of the PSE53, an instruction is sent, and the PSE53 is controlled to start to supply power to the PD equipment.

The embodiment of the utility model provides an in, when MCU detects empty load, control go up the disconnection of electric switch, control switch switches on, and the route is disconnected between equipment power and the PSE, and there is not the loss in PSE to POE power supply system's loss only is MCU's consumption, thereby has reduced the loss in the POE power supply system effectively.

Example 5:

on the basis of each of the above embodiments, in order to make first MOS transistor more stable when switching on, fig. 8 is the embodiment of the present invention provides a POE power supply system's schematic structure diagram, go up electric switch 52 and still include: a second capacitance C2;

the second capacitor C2 is connected in parallel with the second resistor R2.

The utility model discloses in the example when M1 switches on, carry out the partial pressure through second electric capacity C2 for M1 is more stable when switching on.

Because the embodiment of the utility model provides an in carry out the partial pressure through second electric capacity to first MOS pipe, make first MOS pipe more stable when switching on.

Example 6:

on the basis of each above-mentioned embodiment, in order to make first MOS transistor more stable when switching on, fig. 9 is the embodiment of the utility model provides a POE power supply system's schematic structure diagram, go up electric switch 53 and still include: a first capacitor C1 and a third resistor R3;

the first capacitor C1 is connected in series with the third resistor R3, one end of the first capacitor C1, which is not connected with the third resistor R3, is connected with the drain of the first MOS transistor M1, and one end of the third resistor R3, which is not connected with the first capacitor C1, is connected with the gate of the first MOS transistor M1.

The embodiment of the utility model provides an in add first electric capacity C1 and third resistance R3 and carry out the partial pressure, C1 and R3 can control the time that M1 opened, let M1 slowly switch on to it is more stable when switching on to make first MOS pipe M1.

Of course, in order to further ensure that the first MOS transistor is more stable when turned on, as shown in the structural schematic diagram of another POE system provided in fig. 10, the power-on switch includes both the first capacitor C1 and the third resistor R3, and also includes the second capacitor C2.

Certainly, for the PSE chips used by the different types of PSE53, Q2, R5, R6, and Q3 are optional, and it is also believed that a person skilled in the art determines whether the power-on switch 52 needs to include Q2, R5, R6, and Q3 according to the functions implemented by the PSE53 and the PSE chips used by the PSE chip, which is not described in detail in the embodiment of the present invention.

Because the embodiment of the utility model provides an in carry out the partial pressure through first electric capacity and third resistance to first MOS pipe, make first MOS pipe more stable when switching on.

Example 7:

on the basis of the foregoing embodiments, fig. 11 is a schematic structural diagram of the POE power supply system provided in the embodiment of the present invention, where the control switch 55 includes: an OR gate OR and a second MOS transistor M2; wherein,

the input end of the OR gate OR is respectively connected with the PSE53 and the MCU541, and the output end of the OR gate OR is connected with the gate of the second MOS transistor M2;

the gate of the second MOS transistor M2 is connected to the output terminal of the OR gate OR, the source of the second MOS transistor M2 is grounded, and the drain of the second MOS transistor M2 is used for being connected to the PD;

when the MCU541 detects that no PD is accessed, a high level signal is input to the OR gate OR, and the PSE53 inputs a low level signal to the OR gate; when the MCU541 detects a PD access, a low signal is input to the OR gate OR, and a high signal is input to the OR gate by the PSE 53.

When the MCU541 detects no PD access, a high signal is input to the OR gate OR, and a low signal is input to the PSE gate OR, so the OR gate OR finally outputs a high signal to turn on M2, thereby completing the loop formed by the device power supply, R1, MCU, OR gates OR, M2 and ground.

If the MCU541 can enter a sleep state, after the MCU541 wakes up from the sleep state according to a set time interval, a high level signal is input to the OR gate OR, and then the PSE53 inputs a low level signal to the OR gate OR, so the OR gate OR finally outputs a high level signal to turn on the M2, the device power 51, the R1, the MCU541, the M2 and the ground form a loop, if the MCU541 detects that a difference between the second voltage division value of the R1 and the first voltage division value stored in the MCU541 and corresponding to the non-accessed PD does not meet a preset difference range, it determines that there is a PD accessed, and controls the MCU to enter a normal operation state; if the MCU541 detects that the difference value corresponding to the second voltage division value of the R1 and the first voltage division value stored in the MCU541 when the PD is not accessed satisfies the preset difference range, it is determined that no PD is accessed, and a low level signal is input to the OR gate OR, at this time, the PSE53 inputs a low level signal to the OR gate OR, because the OR gate OR finally outputs a low level signal to disconnect M2, the MCU541 controls itself to continue to enter the sleep state.

When the MCU541 judges that there is a PD access, a low level signal is input to the OR gate OR, the PSE53 inputs a high level signal to the OR gate OR, and the PSE53 is converted into a conversion time period corresponding to the PD power supply, the PSE53 inputs a low level signal to the OR gate OR, the OR gate OR finally outputs a low level signal to turn off the M2, the MCU541 controls the Q3 to be turned on, so that the Q2 is turned on, and the MCU541 controls the Q1 to be turned on, so that the M1 is turned on, so that the device power supply 51 and the PSE53 are turned on, and when the PSE53 inputs a high level signal to the OR gate OR, the device power supply 51 is converted into the PD power supply, so as to form a charging loop of the device power supply 51, M1, PD.

The drain of the second MOS transistor M2 is connected to the third series connection point of the PSE53 and PD.

The embodiment of the utility model provides an in, when MCU detects empty load, control go up the switch disconnection, to a high level signal of OR gate input, control switch switches on, and the route breaks off between equipment power and the PSE, and there is not the loss in PSE to POE power supply system's loss only is MCU's consumption, thereby has reduced the loss in the POE power supply system effectively.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. The utility model provides an active ethernet POE power supply system, includes the equipment power, its characterized in that, POE power supply system still includes: the system comprises a power-on switch, a power supply end device PSE, a micro control unit MCU control module and a control switch;

the first end of the device power supply is used for being connected with a power receiving end device (PD), the second end of the device power supply is connected with the power-on switch, the power-on switch is connected with the PSE, a first serial connection point of the power-on switch and the PSE is used for being connected with the PD, and the PSE is used for being connected with the PD;

2. The POE power supply system of claim 1, wherein when the MCU control module detects a PD access in the POE power supply system, the MCU control module controls the control switch to be turned off and controls the power-on switch to be turned on.

3. The POE power supply system of claim 2, wherein the MCU control module controls the power-on switch to be turned off and controls the control switch to be turned on when detecting that the PSE is abnormal according to information stored in the PSE.

4. The POE power supply system of any of claims 1-3, wherein the MCU control module comprises an MCU, a first resistor, and a first diode; wherein,

5. The POE power supply system of claim 4, wherein the MCU controls the control switch to be turned off when detecting that no PD is connected, enters a sleep state, wakes up at a set time interval, and controls the control switch to be turned on after waking up.

6. The POE power supply system of claim 4, wherein the power-up switch comprises: the circuit comprises a second resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first triode, a first MOS (metal oxide semiconductor) tube, a second triode and a third triode; wherein,

7. The POE power supply system of claim 6, wherein said power-up switch further comprises: a second capacitor;

the second capacitor is connected in parallel with the second resistor.

8. The POE power supply system of claim 6, wherein said power-up switch further comprises: a first capacitor and a third resistor;

9. The POE power supply system of claim 4, wherein the control switch comprises: an OR gate and a second MOS tube; wherein,

the input end of the OR gate is respectively connected with the PSE and the MCU, and the output end of the OR gate is connected with the grid electrode of the second MOS tube;

when the MCU detects that no PD is accessed, a high-level signal is input to the OR gate, and the PSE inputs a low-level signal to the OR gate; when the MCU detects that a PD is accessed, a low level signal is input to the OR gate, and the PSE inputs a high level signal to the OR gate.

10. The POE power supply system of claim 9, wherein the drain of the second MOS transistor is connected to a third series connection point of the PSE and PD.