CN207382188U - The delay of DC-DC chips output voltage is slow to rise circuit - Google Patents
The delay of DC-DC chips output voltage is slow to rise circuit Download PDFInfo
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- CN207382188U CN207382188U CN201721560937.XU CN201721560937U CN207382188U CN 207382188 U CN207382188 U CN 207382188U CN 201721560937 U CN201721560937 U CN 201721560937U CN 207382188 U CN207382188 U CN 207382188U
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Abstract
It is delayed to delay the utility model discloses a kind of DC DC chips output voltage and rises circuit, including delay circuit, DC DC chips and its peripheral circuit, the delay circuit includes resistance R2 R4, capacitance C6, diode D1, wherein resistance R2 connects with resistance R3 and is followed by between power output end Vout and ground, capacitance C6 and resistance R4 series connection is followed by between power output end Vout and ground and resistance R4 one end is grounded, the cathode that resistance R2 is connected diode D1 with the connecting node of resistance R3 connects the feedback voltage detection input pin FB of DC DC chips simultaneously, the connecting node of the anode connection capacitance C6 and resistance R4 of diode D1.The utility model forms delay circuit using the one-way conduction characteristic and RC circuits of diode, the feedback voltage of DC DC chips is made to detect the voltage of input pin FB whithin a period of time in high voltage, so as to delay the rise time of output voltage, soft-start time is added.
Description
Technical field
The utility model belongs to voltage control circuit field, and in particular to a kind of DC-DC chips output voltage delay is slow to rise
Circuit.
Background technology
In normal design, chip can all have the requirement of electrifying timing sequence, and be the requirement for doing maximum to power-on time, and
Because of its particularity, it is necessary to which the rise time slows down, the present common power supply DC-DC chips in market are substantially all not RTL839x chips
There is the rise time that can reach requirement, so just needing peripheral circuit to realize the rise time of hold-off voltage.
Utility model content
It is simple that the utility model technical issues that need to address are to provide a kind of circuit structure, suitable for having Voltage Feedback
The delay of input terminal DC-DC chips output voltage is slow to rise circuit.
To solve the above problems, technical solution adopted in the utility model is：
A kind of DC-DC chips output voltage delay is slow to rise circuit, including delay circuit, DC-DC chips and its peripheral circuit,
The delay circuit includes resistance R2-R4, capacitance C6, diode D1, wherein resistance R2 connect with resistance R3 be followed by it is defeated in power supply
Between outlet Vout and ground, capacitance C6 and resistance R4 series connection are followed by between power output end Vout and ground and resistance R4 one end
Ground connection, resistance R2 be connected with the connecting node of resistance R3 diode D1 cathode connect simultaneously DC-DC chips feedback voltage examine
Survey input pin FB, the connecting node of the anode connection capacitance C6 and resistance R4 of diode D1；When chip powers on, capacitance is utilized
The rc-delay circuit and diode D1 of C6 and resistance R4 compositions make the feedback voltage detection input pin FB of DC-DC chips exist
Low voltage is exported in high voltage, DC-DC chips in certain time, delays the rise time of DC-DC chip output voltages.
Further, the DC-DC chips and its peripheral circuit include DC-DC chips U1, resistance R1, capacitance C1-C5, electricity
Feel L1, wherein, resistance R1 and capacitance C2 are connected in series and are followed by between power supply VCC and ground, the connection section of resistance R1 and capacitance C2
The Enable Pin EN, the power input IN connection power supply VCC of DC-DC chips U1, DC-DC chips U1 of point connection DC-DC chips U1
Switching node output pin SW by the high-end mosfet driver booster power pin BST of capacitance C3 connections, while through inductance
L1 connections power output end Vout, capacitance C4 and capacitance C5 parallel connections are followed by between power output end Vout and ground, DC-DC cores
The FB pins of piece U1 are feedback voltage detection input.
Further, the DC-DC chips U1 is the chip of SOT23-6 encapsulation.
It is using advantageous effect caused by above-mentioned technical proposal：The utility model is special using the one-way conduction of diode
Property and RC circuits composition delay circuit, the feedback voltage of DC-DC chips is made to detect the voltage of input pin FB in a period of time
It is interior to be in high voltage, so as to delay the rise time of output voltage, add soft-start time.
Description of the drawings
Fig. 1 is the utility model circuit diagram.
Specific embodiment
Utility model is described in further detail below in conjunction with the accompanying drawings：
As shown in Figure 1, a utility model includes delay circuit, DC-DC chips and its peripheral circuit, the DC-DC cores
Piece and its peripheral circuit include DC-DC chips U1, resistance R1, capacitance C1-C5, inductance L1, wherein, resistance R1 and capacitance C2 goes here and there
Connection connection is followed by between power supply VCC and ground, and resistance R1 is connected the Enable Pin of DC-DC chips U1 with the connecting node of capacitance C2
The switching node output pin SW of power input IN connection power supply VCC, the DC-DC chips U1 of EN, DC-DC chip U1 pass through
The high-end mosfet driver booster power pin BST of capacitance C3 connections, while through inductance L1 connection power output end Vout, capacitance
C4 and capacitance C5 parallel connections are followed by between power output end Vout and ground, and the FB pins of DC-DC chips U1 detect for feedback voltage
Input terminal；The delay circuit is connected with resistance R3 and is followed by including resistance R2-R4, capacitance C6, diode D1, wherein resistance R2
Between power output end Vout and ground, capacitance C6 and resistance R4 series connection be followed by between power output end Vout and ground and electricity
R4 one end ground connection is hindered, the cathode that resistance R2 is connected diode D1 with the connecting node of resistance R3 connects the anti-of DC-DC chips simultaneously
Feedthrough voltage detects input pin FB, the connecting node of the anode connection capacitance C6 and resistance R4 of diode D1；When chip powers on,
The feedback voltage for making DC-DC chips using the capacitance C6 and resistance R4 rc-delay circuits formed and diode D1 detects input
For pin FB within a certain period of time in high voltage, DC-DC chips output low voltage delays DC-DC chip output voltages
Rise time.
To reduce circuit board volume, the DC-DC chips U1 uses the chip of SOT23-6 encapsulation.
Operation principle：
By taking Fig. 1 as an example：Wherein resistance R2, R3 forms bleeder circuit, capacitance C6 and resistance R4 composition rc-delay circuits, when
Chip U1 powered on moment (i.e. VCC power-up), Vout voltage 0V, the voltage of capacitance C6 is also 0V at this time；After the power is turned on, chip U1 is opened
Begin to start, chip U1 output voltages are begun to ramp up, since the voltage of capacitance C6 charges to realize by resistance R4, so electric
Appearance C6 voltage risings are slower, and the voltage of such capacitance C6 and resistance R4 connecting nodes is greater than resistance R2 and resistance R3 connecting nodes
Voltage, diode D1 forward conductions at this time, the voltage of the FB pins of chip U1 is not Vout*R3/ (R2+R3), but
(Vout-VC6)-Vd1, this voltage are greater than Vout*R3/'s (R2+R3) within a certain period of time.Since chip U1 is by detecing
The voltage of FB pins is surveyed to adjust output voltage, so the output voltage that chip U1 is mistakenly considered oneself is higher, is just delayed
The rising of output voltage, so as to adding soft-start time.
With the process that capacitance C6 charges, (Vout-Vc6)-Vd1 gradually can be less than Vout*R3/ (R2+R3), and at this moment two
Pole pipe D1 reversely ends, and the voltage of FB pins is exactly Vout*R3/ (R2+R3), and chip U1 completes to start at this time, chip U1 voltages
Output meets normal work needs.
Claims (3)
1. a kind of DC-DC chips output voltage delay is slow to rise circuit, it is characterised in that：Including delay circuit, DC-DC chips and its
Peripheral circuit, the delay circuit are connected with resistance R3 and are followed by including resistance R2-R4, capacitance C6, diode D1, wherein resistance R2
Between power output end Vout and ground, capacitance C6 and resistance R4 series connection be followed by between power output end Vout and ground and electricity
R4 one end ground connection is hindered, the cathode that resistance R2 is connected diode D1 with the connecting node of resistance R3 connects the anti-of DC-DC chips simultaneously
Feedthrough voltage detects input pin FB, the connecting node of the anode connection capacitance C6 and resistance R4 of diode D1；When chip powers on,
The feedback voltage for making DC-DC chips using the capacitance C6 and resistance R4 rc-delay circuits formed and diode D1 detects input
For pin FB within a certain period of time in high voltage, DC-DC chips output low voltage delays DC-DC chip output voltages
Rise time.
2. DC-DC chips output voltage delay according to claim 1 is slow to rise circuit, it is characterised in that the DC-DC cores
Piece and its peripheral circuit include DC-DC chips U1, resistance R1, capacitance C1-C5, inductance L1, wherein, resistance R1 connects with capacitance C2
Connection is followed by between power supply VCC and ground, and resistance R1 is connected the Enable Pin EN of DC-DC chips U1 with the connecting node of capacitance C2,
The switching node output pin SW of power input IN connection power supply VCC, the DC-DC chips U1 of DC-DC chips U1 passes through capacitance
The high-end mosfet driver booster power pin BST of C3 connections, at the same through inductance L1 connections power output end Vout, capacitance C4 and
Capacitance C5 parallel connections are followed by between power output end Vout and ground, and the FB pins of DC-DC chips U1 are feedback voltage detection input
End.
3. DC-DC chips output voltage delay according to claim 1 or 2 is slow to rise circuit, it is characterised in that the DC-DC
Chip U1 is the chip of SOT23-6 encapsulation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721560937.XU CN207382188U (en) | 2017-11-21 | 2017-11-21 | The delay of DC-DC chips output voltage is slow to rise circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721560937.XU CN207382188U (en) | 2017-11-21 | 2017-11-21 | The delay of DC-DC chips output voltage is slow to rise circuit |
Publications (1)
| Publication Number | Publication Date |
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| CN207382188U true CN207382188U (en) | 2018-05-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201721560937.XU Active CN207382188U (en) | 2017-11-21 | 2017-11-21 | The delay of DC-DC chips output voltage is slow to rise circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110635678A (en) * | 2018-06-25 | 2019-12-31 | 青岛海信电器股份有限公司 | DC-DC variable voltage output circuit and terminal device |
| CN112306134A (en) * | 2020-10-21 | 2021-02-02 | 青岛海信日立空调系统有限公司 | Air conditioner base plate power supply protection circuit and air conditioner |
| US11930455B2 (en) | 2019-05-16 | 2024-03-12 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Method for controlling network connection, terminal and non-transitory storage medium |
-
2017
- 2017-11-21 CN CN201721560937.XU patent/CN207382188U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110635678A (en) * | 2018-06-25 | 2019-12-31 | 青岛海信电器股份有限公司 | DC-DC variable voltage output circuit and terminal device |
| US11930455B2 (en) | 2019-05-16 | 2024-03-12 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Method for controlling network connection, terminal and non-transitory storage medium |
| US12167338B2 (en) | 2019-05-16 | 2024-12-10 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Measurement reporting method, electronic device, and storage medium |
| CN112306134A (en) * | 2020-10-21 | 2021-02-02 | 青岛海信日立空调系统有限公司 | Air conditioner base plate power supply protection circuit and air conditioner |
| CN112306134B (en) * | 2020-10-21 | 2024-03-22 | 青岛海信日立空调系统有限公司 | Air conditioner substrate power supply protection circuit and air conditioner |
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