CN207097810U - Packaging device and its substrate structure - Google Patents

Abstract

The utility model provides a carrier structure. The carrier structure includes a substrate and a plurality of connection pads. The substrate has a lower surface and a plurality of first openings. The first openings are respectively located on the lower surface of a peripheral edge of the substrate. The connection pads are respectively arranged in the first openings of the substrate. Each connection pad has a recessed portion formed on one side of the connection pad close to the peripheral edge of the substrate. In addition, the utility model also provides a packaging device having the above-mentioned carrier structure.

Description

Packaging device and its substrate structure

technical field

The utility model relates to a packaging device, in particular to a packaging device and a carrier plate structure applied to flip-chip packaging.

Background technique

In the current packaging devices, such as Flip chip-Chip scale package (FC-CSP), the front side of the chip is turned over, and the bumps are directly connected to the carrier substrate, and then packaged to form a packaging device. The carrier substrate is called a flip-chip substrate, and is used as a buffer interface for electrical connection and signal transmission between the chip and the circuit board.

The packaging device is electrically connected to the circuit board through the carrier substrate and assembled, and the packaging device is also electrically connected to the circuit board through solder balls. Generally speaking, the height between the packaged device and the circuit board is about 20 microns to 30 microns after being connected by solder balls. In other words, the distance between the packaging device and the circuit board is actually quite narrow.

In order to ensure the quality of the product, after the packaged device and the circuit board are assembled, many inspections are required before the assembled product can be shipped out of the factory. Usually, for the inspection of the soldering status of the packaging device and the circuit board, the detection method can be to use a CCD camera, or use the inspector to visually observe whether the solder connection between the packaging device and the circuit board is complete, that is, to inspect the package. Check the soldering condition between the device and the circuit board, and confirm whether the soldering condition is complete.

However, after the packaging device and the circuit board are assembled, due to the obstruction of the solder mask of the packaging device itself, and the very narrow distance between the packaging device and the circuit board, in fact, it is difficult for CCD cameras or inspectors to observe visually. The connection status between the packaging device and the circuit board makes it even more difficult to judge whether the current soldering situation is complete. Therefore, the assembled products often have poor electrical function tests and are scrapped due to abnormal quality. In this way, the quality of the products will be reduced and the cost will be increased.

Therefore, there is an urgent need to propose a new packaging device and its carrier structure, which can easily observe the connection status between the packaging device and the circuit board of the product after the product is assembled, so as to reduce the defective rate and improve product quality.

Utility model content

In view of this, an object of the present invention is to provide a packaging device and its carrier structure, which can easily observe the solder connection status of the product after assembly, so as to ensure product quality.

To achieve the above purpose, the utility model provides a carrier structure, which includes a substrate and a plurality of connection pads. The substrate has a lower surface and a plurality of first openings. The first openings are respectively located on the lower surface of the peripheral edge of the substrate. The connection pads are respectively disposed in the first openings of the substrate. Each connection pad has a recess formed on a side of the connection pad close to the periphery of the substrate.

According to an embodiment of the present invention, the concave portion of each connection pad is exposed outside the peripheral edge of the substrate.

According to an embodiment of the present invention, a vertical distance from an inner top surface of the concave portion of the connection pads to the lower surface of the substrate is 30% to 80% of the thickness of the substrate.

According to an embodiment of the present invention, the substrate further includes a first patterned dielectric layer and a second patterned dielectric layer. The first patterned dielectric layer has the first openings and at least one second opening. The second patterned dielectric layer is disposed on the first patterned dielectric layer and has at least one third opening.

According to an embodiment of the present invention, the carrier structure further includes at least one conductive column and a patterned conductive layer. The conductive column is disposed in the second opening of the first patterned dielectric layer. The patterned conductive layer is disposed in the third opening of the second patterned dielectric layer, and disposed on part of the first patterned dielectric layer, the conductive pillars and the connection pads.

In addition, to achieve the above purpose, the present invention provides a packaging device, which includes a substrate, a plurality of connection pads, at least one chip, and a packaging material. The substrate has an upper surface, a lower surface and a plurality of first openings. The upper surface is set opposite to the lower surface. Each first opening is respectively located on the lower surface of a peripheral edge of the substrate. Each connection pad is respectively disposed in each first opening of the substrate. Each connection pad has a recess formed on a side of each connection pad close to the peripheral edge of the substrate. The chip is disposed on the upper surface of the substrate. The encapsulation material is arranged on the upper surface of the substrate and the chip.

According to an embodiment of the present invention, the concave portion of each connection pad is exposed outside the periphery of the substrate.

According to an embodiment of the present invention, a vertical distance from an inner top surface of the concave portion of the connection pads to the lower surface of the substrate is 30% to 80% of the thickness of the substrate.

According to an embodiment of the present invention, the substrate further includes a first patterned dielectric layer and a second patterned dielectric layer. The first patterned dielectric layer has the first openings and at least one second opening. The second patterned dielectric layer is disposed on the first patterned dielectric layer and has at least one third opening.

According to an embodiment of the present invention, the packaging device further includes at least one conductive column and a patterned conductive layer. The conductive column is disposed in the second opening of the first patterned dielectric layer. The patterned conductive layer is disposed in the third opening of the second patterned dielectric layer, and disposed on part of the first patterned dielectric layer, the conductive pillars and the connection pads.

Based on the above, a packaging device and its carrier structure of the present invention is to use a concave part on the connection pad close to the periphery of the substrate, so that after the reflow process, the solder climbing condition of the connection pad can be clearly observed , to correctly judge the connection quality, and then improve the product qualification rate and quality.

Description of drawings

FIG. 1 shows a schematic diagram of a packaging device according to an embodiment of the present invention;

Fig. 2 depicts a schematic cross-sectional view of the packaging device of Fig. 1 along the line segment A-A';

FIG. 3A shows a schematic view of the structure of a semi-finished carrier board structure set on an additional circuit board and provided with an insulating layer according to an embodiment of the present invention;

FIG. 3B is a schematic structural view of the carrier structure semi-finished product in which recesses are formed on the connection pads in FIG. 3A;

FIG. 3C is a schematic diagram of the structure of the carrier board according to an embodiment of the present invention; and

FIG. 4 is a schematic structural diagram of a packaging device disposed on a circuit board according to an embodiment of the present invention.

Explanation of reference signs

100 carrier structure

110 Substrate

111 upper surface

112 lower surface

1101 First patterned dielectric layer

1102 second patterned dielectric layer

120, 410 connection pad

120c concave

130 conductive column

140 patterned conductive layer

200 Semi-finished Carrier Structures

210 Additional Circuit Board

220 barrier layer

300 Packaged Devices

310 chips

320 Packaging material

400 circuit board

50 conductive block

h first height

H second height

OP1 first opening

OP2 second opening

OP3 Third opening.

Detailed ways

Various embodiments of the present invention will be described in detail below, and the accompanying drawings are used as examples. In addition to these detailed descriptions, the utility model can also be widely implemented in other embodiments, and any easy replacement, modification, and equivalent changes of any of the embodiments are included in the scope of the utility model, and are described in the following The scope of patent protection shall prevail. In the description of the specification, many specific details are provided in order to enable readers to have a more complete understanding of the utility model; however, the utility model may still be implemented under the premise of omitting some or all of these specific details. Also, well-known steps or components have not been described in detail in order to avoid unnecessarily limiting the invention. The same or similar components will be denoted by the same or similar symbols in the drawings. It should be noted that the drawings are for illustrative purposes only, and do not represent the actual size or quantity of components, unless otherwise specified.

FIG. 1 is a schematic diagram of a packaging device 300 according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of the packaging device 300 in FIG. 1 along the line segment A-A'. Referring to FIG. 1 and FIG. 2 , the packaging device 300 includes a carrier structure 100 , a chip 310 and a packaging material 320 . Wherein, the chip 310 is disposed on the carrier structure 100 , and the packaging material 320 is disposed on the carrier structure 100 and the chip 310 to enclose the chip 310 . In this embodiment, the encapsulation material 320 can be selected from polymer resin material or ceramic material, or silicon dioxide powder, alumina powder, boron nitride powder or graphite fiber are added to the resin, which is not limited here.

The carrier structure 100 includes a substrate 110 , a plurality of connection pads 120 , at least one conductive pillar 130 and a patterned conductive layer 140 .

The substrate 110 has an upper surface 111 , a lower surface 112 and a plurality of first openings OP1 . The first openings OP1 are located on the lower surface 112 of a peripheral edge of the substrate 110 . To further illustrate, the substrate 110 further includes a first patterned dielectric layer 1101 and a second patterned dielectric layer 1102 . Wherein, the first patterned dielectric layer 1101 has these first openings OP1 and a plurality of second openings OP2. The second patterned dielectric layer 1102 is disposed on the first patterned dielectric layer 1101 and has a plurality of third openings OP3. In this embodiment, part of the third opening OP3 may form a through hole with part of the first opening OP1, and of course, part of the third opening OP3 may also form a through hole with part of the second opening OP2.

In this embodiment, the material of the first patterned dielectric layer 1101 and the second patterned dielectric layer 1102 may be a high filler content dielectric material, such as a molding compound, It uses epoxy resin (Epoxy) as the main matrix, which accounts for about 8% to 12% of the overall casting compound, and is formed by doping with a filler accounting for about 70% to 90% of the overall proportion. Wherein, the filler may include silicon dioxide and alumina, so as to achieve the effects of increasing mechanical strength, reducing linear thermal expansion coefficient, increasing heat conduction, increasing water resistance and reducing glue overflow.

The connection pads 120 are respectively disposed in the first openings OP1 of the substrate 110 , that is, the connection pads 120 are respectively disposed in the first openings OP1 of the first patterned dielectric layer 1101 of the substrate 110 . Each connection pad 120 has a recess 120 c formed on a side of the connection pad 120 close to the periphery of the substrate 110 and exposed outside the periphery of the substrate 110 . In other words, viewed from the side of the carrier structure 100 , the concave portion 120 c of the connection pad 120 can be observed. In this embodiment, the surface of the concave portion 120c of the connection pad 120 can be flat or arc-shaped according to different processing methods. The processing method can be techniques such as dry etching, wet etching, laser cutting, high-pressure liquid cutting or grinding, but the utility model is not limited thereto.

It is also worth mentioning that a vertical distance from an inner top surface of the concave portion 120c of each connection pad 120 to the lower surface 112 of the substrate 110 is a first height h, and the thickness of the substrate 110 is a second height H. In order to maintain the function of the connection pad 120 as an electrical connection and conduction, and to be able to observe clearly from the side, in this embodiment, the first height h is 30% to 80% of the second height H.

The conductive column 130 is disposed in the second opening OP2 of the first patterned dielectric layer 1101, so as to serve as a reinforcement structure and/or to connect the upper and lower layers of the circuit. Its material can be copper, but the present invention is not limited thereto. .

The patterned conductive layer 140 is disposed in the third opening OP3 of the second patterned dielectric layer 1102, and is disposed on part of the first patterned dielectric layer 1101, the conductive pillars 130 and the connection pads 120 to serve as electrical sexual conduction circuit. As mentioned above, the chip 310 is disposed on the patterned conductive layer 140 of the carrier structure 100 , and the packaging material 320 is disposed on the patterned conductive layer 140 , the second patterned dielectric layer 1102 and the chip 310 . Moreover, the upper surface 111 of the so-called substrate 110 is a plane formed by the second patterned dielectric layer 1102 and the patterned conductive layer 140, while the lower surface 112 of the substrate 110 is formed by the connection pads 120, the first A plane formed by the patterned dielectric layer 1102 and the conductive pillars 130 .

Here, it should be noted that the above-mentioned patterned dielectric layer, patterned conductive layer, conductive pillars and other components can be stacked according to actual design requirements to form a multi-layer carrier structure (not shown in the figure) .

3A to 3B are schematic flow charts showing the manufacturing process of the carrier structure according to an embodiment of the present invention. FIG. 3A is a schematic structural diagram of a semi-finished product of the carrier structure with an insulating layer. FIG. 3B is a schematic structural view of the carrier structure semi-finished product in FIG. 3A with recesses formed on the connection pads. FIG. 3C is a schematic diagram of the structure of the carrier plate. Referring to FIG. 3A to FIG. 3C below, the process of forming the concave portion of the connection pad of the carrier structure will be described. In this embodiment, the wet etching method is taken as an example for illustration.

Referring to FIG. 3A , the carrier structure semi-finished product 200 includes a substrate 110 , a connection pad 120 , a conductive column 130 and a patterned conductive layer 140 . The substrate 110 has an upper surface 111 , a lower surface 112 , a first patterned dielectric layer 1101 , a second patterned dielectric layer 1102 , a first opening OP1 , a second opening OP2 and a third opening OP3 . Here, except that the above-mentioned concave portion 120c is not formed, other components and connections are as above. The upper surface 111 of the substrate 110 is in contact with an additional circuit board 210 , and an insulating layer 220 is disposed on a part of the lower surface of the substrate 110 . Here, the barrier layer 220 exposes a portion of the connection pad 120 .

Referring to FIG. 3B , next, the semi-finished carrier structure 200 is etched from one side of the barrier layer 220 of the semi-finished carrier structure 200 . By controlling the etching time, the concave portion 120 c can be formed on the connection pad 120 not covered by the barrier layer 220 .

Please refer to FIG. 3C again. Then, the additional circuit board 210 and the insulating layer 220 are removed successively or simultaneously to form the carrier structure 100 .

In other embodiments, if the recesses of the connection pads of the carrier structure are formed by techniques such as laser cutting, high-pressure liquid cutting or grinding, it is not necessary to provide an insulating layer, only the substrate needs to be placed on the additional circuit board, and The connection pads are exposed, and then, laser cutting, high-pressure liquid cutting or grinding are used to form recesses on each connection pad, and finally the additional circuit board is removed to form a carrier structure.

FIG. 4 is a schematic structural diagram of a packaging device 300 disposed on a circuit board 400 according to an embodiment of the present invention. Wherein, the packaging device 300 is the same as the packaging device 300 of the foregoing embodiment, so it will not be repeated here.

As shown in FIG. 4 , the connection pads 120 of the packaging device 300 are respectively disposed on the circuit board 400 through a conductive block 50 . To further illustrate, the circuit board 400 also has a plurality of connection pads 410 disposed corresponding to the connection pads 120 of the packaging device 300 . The conductive block 50 is, for example, a solder ball or a bulk solder, which connects the packaging device 300 and the circuit board 400 to each other by soldering or reflowing. Since the concave portion 120 c of the connection pad 120 is exposed outside the periphery of the substrate 110 , the connection condition of the conductive block 50 can be clearly observed from the side of the package device 300 . In addition, since the recess 120 c increases the overall area of the connection pad 120 , it can make the connection between the package device 300 and the circuit board 400 more stable, so as to improve the connection quality.

To sum up, the packaging device and its carrier structure of the present invention form a concave part on the connection pad and expose the concave part to the periphery of the substrate. After mutual connection, the connection between the connection pad and the conductive block can be observed from the side of the packaging device, that is, the solder creeping condition of the connection pad can be clearly observed, so as to correctly judge the connection quality, thereby improving the product qualification rate and quality .

To sum up, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art may make various changes and modifications without departing from the spirit and scope of the present utility model. Therefore, the scope of protection of the present utility model should be defined by the preceding claims.

Claims (10)

1. A carrier structure, characterized in that, comprising: A substrate having a lower surface and a plurality of first openings respectively located on the lower surface of a peripheral edge of the substrate; and A plurality of connection pads are respectively arranged in the first openings of the substrate, and each connection pad has a recess formed on a side of the connection pad close to the peripheral edge of the substrate. 2. The carrier structure according to claim 1, wherein the concave portion of each connection pad is exposed outside the peripheral edge of the substrate. 3. The carrier structure according to claim 1, wherein a vertical distance from an inner top surface of the concave portion of the connection pads to the lower surface of the substrate is 30% to 80% of the thickness of the substrate . 4. The carrier structure according to claim 1, wherein the substrate further comprises: a first patterned dielectric layer having the first openings and at least one second opening; and A second patterned dielectric layer is disposed on the first patterned dielectric layer and has at least one third opening. 5. The carrier structure according to claim 4, further comprising: at least one conductive pillar disposed in the second opening of the first patterned dielectric layer; and A patterned conductive layer is disposed in the third opening of the second patterned dielectric layer, and disposed on part of the first patterned dielectric layer, the conductive column and the connection pads. 6. A packaging device, characterized in that it comprises: A substrate having an upper surface, a lower surface and a plurality of first openings, the first openings are respectively located on the lower surface of a peripheral edge of the substrate, the upper surface is opposite to the lower surface; A plurality of connection pads are respectively arranged in the first openings of the substrate, and each connection pad has a concave portion formed on a side of the connection pad close to the peripheral edge of the substrate; at least one chip disposed on the upper surface of the substrate; and A packaging material is arranged on the upper surface of the substrate and the chip. 7. The packaging device of claim 6, wherein the concave portion of each connection pad is exposed outside the peripheral edge of the substrate. 8 . The packaging device of claim 6 , wherein a vertical distance from an inner top surface of the concave portion of the connection pads to the lower surface of the substrate is 30% to 80% of the thickness of the substrate. 9. The packaging device according to claim 6, wherein the substrate further comprises: a first patterned dielectric layer having the first openings and at least one second opening; and A second patterned dielectric layer is disposed on the first patterned dielectric layer and has at least one third opening. 10. The packaging device according to claim 9, further comprising: at least one conductive pillar disposed in the second opening of the first patterned dielectric layer; and A patterned conductive layer is disposed in the third opening of the second patterned dielectric layer, and disposed on part of the first patterned dielectric layer, the conductive column and the connection pads.