CN207070017U - Broadband is without inductance high linearity output driving buffer - Google Patents

Abstract

A kind of broadband be the utility model is related to without inductance high linearity output driving buffer, it has preferably taken into account the requirement of broadband, high linearity and low quiescent current, and avoids using inductance, has saved chip area.The technical solution adopted in the utility model is：Input signal VINP,VINN drives efferent duct MNPT1 by direct AC coupled,MNPT2 produces output signal VOUT,The dc point of the efferent duct is by " falseness " output stage MNDT1,MNDT2 participates in feedback and obtained,The Differential Input in OP is fed back to pipe MN1,MN2 grid distinguishes reversed feedback signal VFB and reference voltage COM,The bias current IB0 that the current mirror mirror image that the bias current IBP1 of external belt temperature-compensating is made up of MN0 and MNB1 is feedback OP,Feed back OP output NETA,NETB,The MN5 connected by diode,MP5 be connected and respectively with " falseness " output stage MNDT1,MNDT2 grid is connected," falseness " output stage MNDT1 source electrode is connected to feedback signal VFB with " falseness " output stage MNDT2 drain electrode.

Description

Broadband is without inductance high linearity output driving buffer

First, technical field：

Semiconductor CMOS integrated circuit fields are the utility model is related to, more particularly, to a kind of applied to RF/IF systems The broadband that 50 Europe load can be driven without inductance high linearity output driving buffer.

2nd, background technology：

In background technology, existing analog-driven buffer structure is broadly divided into the classes of Class A and Class AB two.If adopt With the preferable Class A structures of the linearity, then quiescent current is larger, and can typically use inductance, takes core using on-chip inductor Piece area and inductance value and Q values are limited, then increase piece external component number using piece external inductance.It is smaller according to quiescent current Class AB structures, then be difficult compromise among the linearity, circuit complexity and broadband.The buffering of Push-Pull structures Device belongs to Class AB structures, is that the relatively broad output used buffers level structure, but basic Push- in Low Medium Frequency field Pull output stage output impedances are unstable, its application in having matching demand system limited, to make output stage output impedance It is stable, the feedback arrangement shown in Fig. 1 can be typically used, but existing feedback operational amplifier (OPAMP) is often connected to signal On path, at this moment the performance of feedback operational amplifier (OPAMP) has directly influenced the performance of whole output stage, if feedback op Amplifier (OPAMP) gain is too low, then closed-loop precision can not ensure, can if feedback operational amplifier (OPAMP) gain is too high The output impedance of Push-Pull output stages is much smaller than 50 Europe, be unfavorable for rear class matching, meanwhile, because of feedback operational amplifier (OPAMP) influence of bandwidth itself and switching rate, this structure also are difficult to realize broadband.

A kind of scheme being closer to the present invention is in document《An efficient CMOS buffer for driving large capacitive loads》(S.L.Wong and C.A.T.Salama,IEEE J.Solid-State Circuits, vol.SC-21, no.3, pp.464-469, Jun.1986) in give and describe.Fig. 2 is the circuit that the document uses Schematic diagram, it can be seen that although using the structure compared with Fig. 1 basic feedback arrangement, only used an operational amplifier (OPAMP) the gate control signal of Push-Pull levels is produced, simplifies circuit structure, but the structure still suffers from Bandwidth-Constrained and line The shortcomings that property degree is not high, and its output impedance can still can be with change in process temperature.In addition, there is the height proposed in some documents Linearity structure is respectively provided with circuit complexity height, and the shortcomings that Bandwidth-Constrained.

3rd, utility model content：

The utility model is in order to solve the weak point in above-mentioned background technology, there is provided a kind of broadband is without inductance high linearity Output driving buffer, it has preferably taken into account the requirement of broadband, high linearity and low quiescent current, and avoids using on piece Inductance, chip area is saved,

To achieve the above object, the technical solution adopted in the utility model is：

A kind of broadband is without inductance high linearity output driving buffer, including output buffer stage circuit, output buffer stage electricity Lu Zhong, input signal VINP, VINN are directly ac-coupled to efferent duct MNPT1, MNPT2 grid by electric capacity C1, C2, output Pipe MNPT1 source electrode is connected with efferent duct MNPT2 drain electrode provides output signal VOUT, and efferent duct MNDT1, MNDT2 are " empty Vacation " output stage, " falseness " output stage are connected with the grid of output stage by dc-couple big resistance RDC1, RDC2, and " falseness " is defeated The grid for going out level and output stage has identical DC offset voltage, and MN0~MN5 and MP1~MP5 are feedback operational amplifier OPAMP, wherein MN1, MN2 be Differential Input to pipe, Differential Input is to the pipe MN1 reversed feedback signal VFB of grid, Differential Input pair Pipe MN2 grid meets reference voltage COM, and Differential Input connects MN0 drain electrode, metal-oxide-semiconductor MN0 and metal-oxide-semiconductor to pipe MN1, MN2 source class MNB1 forms current mirror, by the bias current IB0 that external biasing current IBP1 mirror images are feedback operational amplifier OPAMP, feedback Operational amplifier OPAMP output is NETA, NETB, and feedback operational amplifier OPAMP output NETA, NETB pass through diode MN5, MP5 of connection are connected and the grid with " falseness " output stage MNDT1, MNDT2 is connected respectively, " falseness " output stage MNDT1 Source electrode and " falseness " output stage MNDT2 drain electrode be connected to feedback signal VFB, feedback operational amplifier OPAMP compensation is electric Hold for CC2, CC1.

Above-mentioned efferent duct MNDT1, MNDT2 size are the 1/N of output stage MNPT1, MNPT2 size, and wherein N is multiple.

Described output driving buffer includes biasing circuit, in biasing circuit, the output current after temperature-compensating IBPOUT is connected into current input terminal IBP1, external biasing current IBPIN and base collector ground connection PNP pipe Q1 as bias current Emitter stage be connected, produce the voltage VBE1 of negative temperature coefficient, pass through feedback operational amplifier OPAMP A1, MN0 and R1 form Feedback control loop by negative temperature coefficient voltage conversion be the electric current IPT with negative temperature coefficient, feedback operational amplifier OPAMP A1 positive terminal connection PNP pipe Q1 emitter stage VBE1, negative phase end connect MN0 source electrode, and output connects MN0 grid, MN0's Source electrode passes through the resistance R1 with temperature coefficient and is connected to ground, the load MP1 of MN0 drain electrode connection diode connection drain terminal, bears Carry MP1, MP2 and form current mirror, the drain electrode for loading MP2 connects the drain electrode for the load MN1 that diode connects, MN1 and MN2~MN5 structures Into current mirror, switch TR1~TR3 is that electric current finely tunes position, and the electric current IPT2 after fine setting is defeated by the final mirror image of current mirror MP3, MP4 Go out electric current IBPOUT.Compared with prior art, the utility model has the advantage that as follows with effect：

1st, the utility model requires it to solve common simulation output buffer in broadband, high linearity and low quiescent current Between contradiction, propose a kind of follow-on Push-Pu11 structures, preferably taken into account broadband, high linearity and low quiescent current Requirement, and avoid and chip area saved using on-chip inductor, in addition, by using the biasing with temperature-compensating, can make Its output impedance stabilizes to 50 Europe in wide temperature range, is easy to rear class matched design.

2nd, the utility model is by the improvement for the Push-Pull output buffer structures fed back to conventional belt, and uses " empty Vacation " output stage participates in the technology of feedback, the bandwidth of feedback operational amplifier (OPAMP) is no longer limited output driving buffer Bandwidth, output driving buffer is set to be operated in wider frequency range, while with higher under relatively low quiescent current The linearity.By the biasing generative circuit with temperature-compensating, make the output impedance of output driving buffer in wider temperature In the range of stabilize to 50 Europe, be easy to match.In addition, it is thus also avoided that use inductance.

4th, illustrate：

Fig. 1 is the basic Push-Pull circuit theory diagrams with feedback operational amplifier (OPAMP)；

Fig. 2 is Push-Pull circuit theory diagrams in bibliography；

Fig. 3 is the circuit theory diagrams of the utility model output buffer；

Fig. 4 is the utility model output buffer biasing circuit schematic diagram.

5th, embodiment：

Referring to Fig. 3, Fig. 3 is the circuit theory diagrams of output buffer, and input signal VINP/VINN is directly handed over by C1/C2 Stream is coupled to efferent duct MNPT1/MNPT2 grid, and MNPT1 source electrode is connected with MNPT2 drain electrode provides output signal VOUT. MNDT1/MNDT2 is " falseness " output stage, and the size of the pipe is the 1/N of output stage MNPT1/MNPT2 sizes (N is multiple), " falseness " output stage is connected with the grid of output stage by the big resistance RDC1/RDC2 of dc-couple, so their grid has Identical DC offset voltage.

MN0~MN5 and MP1~MP5 is feedback operational amplifier (OPAMP), and wherein MN1/MN2 is Differential Input to pipe, The source class that MN1 grid reversed feedback signal VFB, MN2 grid meet reference voltage COM, MN1/MN2 connects MN0 drain electrode, MN0 with MNB1 forms current mirror, by the bias current IB0 that external biasing current IBP1 mirror images are feedback operational amplifier (OPAMP).Instead The output for presenting operational amplifier (OPAMP) be NETA/NETB, the MN5/MP5 that they are connected by diode it is connected and respectively with " falseness " output stage MNDT1/MNDT2 grid is connected, and the drain electrode of MNDT1 source electrode and MNDT2 is connected to feedback signal VFB.

Referring to Fig. 4, Fig. 4 is the biasing circuit schematic diagram of output buffer stage, and the IBPOUT in Fig. 4 is defeated after temperature-compensating Go out electric current, the electric current is then connected into the IBP1 in Fig. 3 for bias current.IBPIN is external biasing current, the electric current and base stage current collection Pole ground connection PNP pipe Q1 emitter stage is connected, and produces the voltage VBE1 of negative temperature coefficient, the feedback section being made up of A1, MN0, R1 Divide the electric current that negative temperature coefficient voltage conversion is negative temperature coefficient, then exported through current mirror.

Further detailed description is done to the utility model below in conjunction with the accompanying drawings：

One, output stages part and " falseness " output stage part

As shown in figure 3, input signal VINP/VINN is directly ac-coupled to efferent duct MNPT1/MNPT2's by C1/C2 Grid, MNPT1 source electrode is connected with MNPT2 drain electrode provides output signal VOUT.MNDT1/MNDT2 is " falseness " output stage, The size of the pipe is the 1/N (N is multiple) of output stage MNPT1/MNPT2 sizes, the grid of " falseness " output stage and output stage It is connected by the big resistance RDC1/RDC2 of dc-couple, so their grid has identical DC offset voltage.

Connected different using complementary metal-oxide-semiconductor from general Push-Pull output stages, the present invention uses two NMOS tube MNPT1/ MNPT2, which is connected, does output stage, and input differential signal VINP/VINN is directly ac-coupled to MNPT1/MNPT2 by electric capacity C1/C2 Grid level.By setting suitable dc point, MNPT1/MNPT2 " recommending " can also be made to work.In addition, general Push- Pull output stages are controlled by in-phase signal, that is, the signal for being connected to two metal-oxide-semiconductor grid levels above and below Push-Pull output stages is same Shi Zeng great reduces simultaneously, and output stage of the invention is controlled by inversion signal, i.e. VINP correspond to VINN and reduced when increasing, analogy Differential linearity degree is higher than single-ended general principle, it is known that the linearity of improved structure is higher.

As previously described it is believed that the quiescent current IQPT for flowing through output stage MNPT1/MNPT2 is to flow through " falseness " output stage MNDT1/MNDT2 quiescent current IQDT " duplication ", i.e. IQPT=N*IQDT.When MNDT1/MNDT2 is by feeding back output resistance MNPT1/MNPT2 output impedances are also stablized when anti-stable, due to MNDT1/MNDT2 quiescent current it is smaller (output impedance compared with Greatly), so after feedback operational amplifier (OPAMP) effect with appropriate gain, then " replicated " to output stage MNPT1/ MNPT2, it can cause its output impedance is stable to be unlikely to too small in 50 Europe, solve foregoing feedback operational amplifier (OPAMP) gain, the contradiction between output stage output impedance and feedback control loop precision.

Two, quiescent point feedback fractions

MN0~MN5 and MP1~MP5 is feedback operational amplifier (OPAMP), and wherein MN1/MN2 is Differential Input to pipe, MN1 grid reversed feedback signal VFB, MN2 grid meet reference voltage COM (generally VDD/2, VDD is supply voltage), MN1/ MN2 source class connects MN0 drain electrode, and MN0 and MNB1 forms current mirror, and external biasing current IBP1 mirror images are amplified for feedback op The bias current IB0 of device (OPAMP).MN1/MN2 drain electrode connects the load MP1/MP2 of diode connection drain electrode respectively, MP1/MP2 and MP3/MP4 forms current mirror, and MP3 drain electrode connects the load MN3 of diode connection drain electrode, and MN3 and MN4 is formed Current mirror, MN4 drain electrode are that the output NETB, MP4 of feedback operational amplifier (OPAMP) drain electrode are feedback operational amplifier (OPAMP) MN5/MP5 connected between output NETA, NETA/NETB by diode is connected, and is exported respectively with " falseness " Level MNDT1/MNDT2 grid is connected, and the drain electrode of MNDT1 source electrode and MNDT2 is connected to feedback signal VFB.CC2/CC1 is anti- The compensating electric capacity of operational amplifier (OPAMP) is presented, makes feedback control loop that there is suitable phase margin.

The MN5/MP5 of diode connection functions as a thyrite, by emulation experiment, compared to using other electricity Resistance structure has the more preferable linearity.By feedback effect, VFB D. C. value is clamped as VDD/2, and then final output VOUT Direct current biasing point be also VDD/2.Because feedback operational amplifier (OPAMP) only feeds back to dc point, input signal Not by the feedback operational amplifier (OPAMP), so output signal bandwidth and the bandwidth of feedback operational amplifier (OPAMP) etc. Performance indications relation is little, is mainly determined by output stage and load, thus obtains wider bandwidth.

Offset portions of three, with temperature-compensating

IBPOUT in Fig. 4 is the output current after temperature-compensating, and the electric current is then connected into Fig. 3 for bias current IBP1.IBPIN is external biasing current, and the electric current is connected with base collector ground connection PNP pipe Q1 emitter stage, produces negative temperature The voltage VBE1 of coefficient, by A1, negative temperature coefficient voltage conversion is with negative temperature system by the feedback control loop that MN0, R1 are formed Several electric current IPT, feedback operational amplifier (OPAMP) A1 positive terminal connection VBE1, negative phase end connect MN0 source electrode, output MN0 grid is connected, MN0 source electrode passes through the resistance R1 with certain temperature coefficient and is connected to ground, MN0 drain electrode connection diode The load MP1 of connection drain terminal, MP1/MP2 form current mirror, MP2 drain electrode load MN1, MN1 and MN2 that even diode connects ~MN5 forms current mirror, and switch TR1~TR3 is that electric current finely tunes position, and the electric current IPT2 after fine setting is final by current mirror MP3/MP4 Mirror image is output current IBPOUT.

When temperature raises V_THDuring reduction, the electric current of buffer output branch road can increase, and cause output impedance to reduce, for stabilization Output impedance, therefore the electric current of specified temp coefficient is produced using the foregoing biasing with temperature-compensating, so that buffer exports The electric current of branch road raises with temperature to be reduced, and can compensate V_THDeng change, to make buffer output impedance in wider scope It is interior to keep constant.To compensate the change of process corner, it is necessary to which adding electric current finely tunes position, fine setting digit determines that digit is got over by application More precision are higher.

Content of the present utility model is not limited to cited by embodiment, and those of ordinary skill in the art are new by reading this practicality Type specification and any equivalent conversion taken technical solutions of the utility model, are claim institute of the present utility model Cover.

Claims (3)

1. a kind of broadband is without inductance high linearity output driving buffer, it is characterised in that：Including output buffer stage circuit and partially Circuits；

Including exporting buffer stage circuit, export in buffer stage circuit, input signal VINP, VINN is directly handed over by electric capacity C1, C2 Stream is coupled to efferent duct MNPT1, MNPT2 grid, and efferent duct MNPT1 source electrode is connected offer with efferent duct MNPT2 drain electrode Output signal VOUT, efferent duct MNDT1, MNDT2 are " falseness " output stage, and the grid of " falseness " output stage and output stage passes through straight Stream couples big resistance RDC1, RDC2 and is connected, and the grid of " falseness " output stage and output stage has identical DC offset voltage, MN0~MN5 and MP1~MP5 is feedback operational amplifier OPAMP, and wherein MN1, MN2 are Differential Input to pipe, Differential Input pair The pipe MN1 reversed feedback signal VFB of grid, Differential Input meet reference voltage COM to pipe MN2 grid, Differential Input to pipe MN1, MN2 source class connects MN0 drain electrode, and metal-oxide-semiconductor MN0 and metal-oxide-semiconductor MNB1 forms current mirror, is anti-by external biasing current IBP1 mirror images Present operational amplifier OPAMP bias current IB0, feedback operational amplifier OPAMP output is NETA, NETB, feedback op MN5, MP5 that amplifier OPAMP output NETA, NETB is connected by diode be connected and respectively with " falseness " output stage MNDT1, MNDT2 grid are connected, and the drain electrode of " falseness " output stage MNDT1 source electrode and " falseness " output stage MNDT2 is connected to Feedback signal VFB, feedback operational amplifier OPAMP compensating electric capacity are CC2, CC1.

2. broadband according to claim 1 is without inductance high linearity output driving buffer, it is characterised in that：The output Pipe MNDT1, MNDT2 size are the 1/N of output stage MNPT1, MNPT2 size, and wherein N is multiple.

3. broadband according to claim 1 is without inductance high linearity output driving buffer, it is characterised in that：Described is defeated Going out to drive buffer includes biasing circuit, and in biasing circuit, the output current IBPOUT after temperature-compensating connects as bias current Enter current input terminal IBP1, external biasing current IBPIN is connected with base collector ground connection PNP pipe Q1 emitter stage, produces negative The voltage VBE1 of temperature coefficient, the feedback control loop being made up of feedback operational amplifier OPAMP A1, MN0 and R1 is by negative temperature system Number voltage conversion is the electric current IPT with negative temperature coefficient, feedback operational amplifier OPAMP A1 positive terminal connection PNP pipe Q1 Emitter stage VBE1, negative phase end connects MN0 source electrode, output connection MN0 grid, and MN0 source electrode is passed through with temperature coefficient Resistance R1 is connected to ground, the load MP1 of MN0 drain electrode connection diode connection drain terminal, and load MP1, MP2 form current mirror, The drain electrode for loading MP2 connects the drain electrode for the load MN1 that diode connects, and MN1 and MN2~MN5 forms current mirror, switchs TR1~TR3 Position is finely tuned for electric current, the electric current IPT2 after fine setting is output current IBPOUT by the final mirror image of current mirror MP3, MP4.