CN206894951U

CN206894951U - A kind of control circuit and light fixture

Info

Publication number: CN206894951U
Application number: CN201720610727.0U
Authority: CN
Inventors: 文威
Original assignee: Opple Lighting Co Ltd
Current assignee: Opple Lighting Co Ltd
Priority date: 2017-05-27
Filing date: 2017-05-27
Publication date: 2018-01-16
Anticipated expiration: 2027-05-27

Abstract

The utility model provides a kind of control circuit and light fixture, and the control circuit includes reduction voltage circuit, discharge circuit, dimming interface circuit, clock signal generators and PWM logic circuits, and the sampling unit of collection filter inductance electric current is had additional in reduction voltage circuit.Discharge circuit, the filter inductance electric current of inductive current reference value and sampling unit collection is received, compares the size of filter inductance electric current and inductive current reference value, and export comparative result as the first output signal.Conducting dutycycle of the PWM logic circuits according to control rule control first switch, so that the size of filter inductance electric current is equal to inductive current reference value, and then adjust the size of current for the load for being connected to filter inductance.The control circuit of the utility model embodiment abandons the mode measured indirectly, and the electric current of filter inductance is flowed through by directly gathering so that the collection of filter inductance electric current is more accurate and timely.

Description

Control circuit and lamp

Technical Field

The utility model relates to the field of lighting technology, especially, relate to a control circuit and lamps and lanterns.

Background

At present, in the lighting technology field, the voltage reduction circuit is more and more widely applied to the driving circuit of the LED because the voltage reduction circuit uses a small number of components and devices, has high conversion efficiency, and is suitable for converting high-voltage input into low-voltage output.

However, as the dimming depth increases, the operating frequency of the voltage-reducing circuit also increases, and when the operating frequency is high enough, the delay of the driving signal generated by the control circuit greatly affects the operation of the voltage-reducing circuit, the inductive current is no longer in a critical operating mode, the current peak value and the average value are no longer in linear proportion, and at this time, the output current of the voltage-reducing circuit and the control signal cannot be reduced in proportion, so that the dimming range of the circuit is limited. In addition, as the dimming depth increases, the reverse follow current generated by the voltage reduction circuit also affects the actual average value of the output current, so that certain errors exist in the control of the LED.

SUMMERY OF THE UTILITY MODEL

In view of the above, the present invention has been made to provide a control circuit that overcomes or at least partially solves the above-mentioned problems.

According to an aspect of the present invention, there is provided a control circuit, comprising a voltage-reducing circuit, wherein the voltage-reducing circuit comprises a first switch and a filter inductor connected thereto, and the current magnitude of the filter inductor is controlled by the on-duty ratio of the first switch; wherein,

the control circuit further comprises a sampling unit, an operational amplifier circuit, a dimming interface circuit, a clock signal generator and a PWM logic circuit, wherein:

the sampling unit is connected to the filter inductor and collects current flowing through the filter inductor;

one input end of the operational amplifier circuit is connected with the dimming interface circuit and receives an inductive current reference value converted by the dimming interface circuit from an input control signal, the other input end of the operational amplifier circuit is connected with the sampling unit and receives a filtering inductive current collected by the sampling unit, the filtering inductive current and the inductive current reference value are compared, and a comparison result is output as a first output signal;

after the PWM logic circuit compares the clock signal generator with the first output signal output by the output terminal of the operational amplifier circuit, the PWM logic circuit controls the on-duty ratio of the first switch according to a control rule so that the magnitude of the filter inductor current is equal to the inductor current reference value, thereby adjusting the magnitude of the current of the load connected to the filter inductor;

wherein the first switch is turned on, and the filter inductor current is increased; the first switch is turned off, and the filter inductor current is reduced.

Optionally, if the positive terminal of the operational amplifier circuit is connected to the dimming interface circuit and the negative terminal of the operational amplifier circuit is connected to the sampling unit, the operational amplifier circuit compares the magnitude of the filter inductor current with the magnitude of the inductor current reference value, and outputs a comparison result as a first output signal, including:

if the average value of the filter inductance current collected by the sampling unit is smaller than the inductance current reference value, the first output signal output by the operational amplifier circuit is increased;

and if the average value of the filter inductive current is larger than the inductive current reference value, the first output signal output by the operational amplifier circuit is reduced.

Optionally, the operational amplifier circuit comprises an operational amplifier, the sampling unit comprises a sampling resistor, wherein,

the positive end of the operational amplifier is connected with the dimming interface circuit, the negative end of the operational amplifier is connected with the sampling resistor, and the sampling resistor is connected with the filter inductor in series.

Optionally, the PWM logic circuit controls the on duty ratio of the first switch according to a control rule, including:

and the PWM logic circuit controls the first switch to be switched on when receiving the clock signal, and controls the first switch to be switched off until the received first output signal is lower than the clock signal, so that the on-duty ratio of the first switch is controlled by controlling the on-time of the first switch.

Optionally, the PWM logic circuit includes:

the comparator, an input end connects the carry-out terminal of the said operational amplifier circuit, receive the first output signal that the said operational amplifier circuit outputs, another input end receives the comparison parameter, the said comparator compares the magnitude of said first output signal and said comparison parameter, and regard the comparison result as the second output signal to output;

the input end of the trigger is connected with the output end of the comparator, and the other input end of the trigger is connected with the clock signal generator;

the trigger can control the first switch to be switched off according to the second output signal so as to reduce the filter inductance current, and can control the first switch to be switched on according to a clock signal generated by the clock signal generator so as to increase the filter inductance current.

Optionally, if the negative terminal of the comparator is connected to the output terminal of the operational amplifier circuit, and the positive terminal receives the comparison parameter, the comparator compares the first output signal with the comparison parameter, and outputs the comparison result as a second output signal, including:

if the first output signal is greater than the comparison parameter, the second output signal output by the comparator is at a low level;

and if the first output signal is smaller than the comparison parameter, the second output signal output by the comparator is at a high level.

Optionally, the comparator comprises a comparator, the flip-flop comprises an RS flip-flop, wherein,

the reset end of the RS trigger is connected with the comparator, and the enable end of the RS trigger is connected with the clock signal generator; when the RS trigger receives the clock signal, the RS trigger outputs a set state and controls the first switch to be switched on, and when the received second output signal is at a high level, the RS trigger outputs reset and controls the first switch to be switched off so as to control the switching-on duty ratio of the first switch by controlling the switching-on time of the first switch.

Optionally, the clock signal generator comprises an oscillator.

Optionally, the dimming interface circuit performs isolation, filtering or proportional conversion on the control signal to obtain a corresponding low ripple direct current signal, which is used as the inductor current reference value.

Optionally, the dimming interface circuit comprises:

the voltage division unit is used for converting the control signal into an inductive current reference voltage according to an internal reference signal, wherein the internal reference signal is a stable voltage signal;

and the low-pass filtering unit is connected to the voltage division unit, filters out high-frequency components of the inductive current reference voltage, and feeds back the filtered inductive current reference voltage serving as the inductive current reference value to the input end of the operational amplifier circuit.

Optionally, if the collected filter inductor current is used as the comparison parameter, the filter inductor current is obtained by sampling the filter inductor current

The voltage division unit comprises a coupler;

the PWM signal is used as a control signal to control the on-off of the coupler, if the coupler is on, the inductive current reference voltage is zero, and if the coupler is off, the inductive current reference voltage is the voltage of the internal reference signal;

and controlling the on or off of the coupler by adjusting the PWM signal so as to adjust the magnitude of the reference voltage of the inductive current and further adjust the magnitude of the reference value of the inductive current.

Optionally, the coupler is an optical coupler.

Optionally, the control circuit further comprises:

and the output driving circuit is respectively connected with the output end of the PWM logic circuit and the first switch and drives the first switch to be switched on or switched off according to the output signal of the PWM logic circuit.

Optionally, the output drive circuit comprises a floating ground drive circuit or an isolation drive circuit.

Optionally, if the clock signal generated by the clock signal generator is used as the comparison parameter and the output driving circuit drives the first switch to be turned on or off, the comparison parameter is a clock signal generated by the clock signal generator

The voltage division unit comprises an adjustable resistor, the adjustable resistor divides the internal reference signal, and the voltage divided by the adjustable resistor is used as the reference voltage of the inductive current;

the voltage division of the adjustable resistor is adjusted by changing the resistance value of the adjustable resistor, so that the magnitude of the inductive current reference voltage is adjusted, and the magnitude of the inductive current reference value is adjusted.

Optionally, if the collected filter inductor current is used as the comparison parameter and the output driving circuit drives the first switch to be turned on or off, the first switch is turned on or off

The voltage division unit comprises a second switch;

the PWM signal is used as a control signal to control the on or off of the second switch, if the second switch is on, the inductive current reference voltage is zero, and if the second switch is off, the inductive current reference voltage is the voltage of the internal reference signal;

and controlling the second switch to be switched on or switched off by adjusting the PWM signal, so that the magnitude of the reference voltage of the inductive current is adjusted, and the magnitude of the reference value of the inductive current is adjusted.

Optionally, the load comprises a light source device.

According to the utility model discloses an on the other hand still provides a lamp, include:

a chip integrated with the control circuit described above; and

a light source device as a load, a filter inductor connected to the control circuit;

the control circuit receives an externally input control signal and converts the externally input control signal into a filter inductance current reference value, and the filter inductance current is made to be equal to the filter inductance current reference value by comparing the filter inductance current with the reference value so as to adjust the current of the light source device and further adjust the light of the light source device.

Optionally, the control circuit receives an externally input control signal, and includes:

the control circuit receives a control instruction sent by external equipment, wherein the control instruction comprises a target parameter for adjusting the light source device.

Optionally, the external device comprises any one of: switch, intelligent terminal, sensor.

The embodiment of the utility model provides an in, control circuit includes step-down circuit, operational amplifier circuit, interface circuit, clock signal generater and PWM logic circuit adjust luminance, has increased the sampling unit who gathers filtering inductive current among the step-down circuit. And one input end of the operational amplifier circuit is connected with the dimming interface circuit, receives an inductive current reference value converted by the dimming interface circuit from an input control signal, and the other input end of the operational amplifier circuit is connected with the sampling unit, receives the filtering inductive current collected by the sampling unit, compares the filtering inductive current with the inductive current reference value, and outputs the comparison result as a first output signal. And the PWM logic circuit is respectively connected with the clock signal generator and the output end of the operational amplifier circuit, wherein the clock signal with fixed frequency generated by the clock signal generator can control the first switch to be switched on so as to increase the filter inductance current, and the first output signal output by the output end of the operational amplifier circuit can control the first switch to be switched off so as to decrease the filter inductance current. The PWM logic circuit controls the conduction duty ratio of the first switch according to the control rule so that the magnitude of the filter inductance current is equal to the inductance current reference value, and the current magnitude of a load connected to the filter inductance is further adjusted. The utility model discloses control circuit abandons indirect measurement's mode, and the electric current that flows through filter inductance is gathered through direct for filter inductance current's collection is more accurate and timely. Meanwhile, the reference value of the inductance current is compared with the collected filter inductance current, so that when the value of the filter inductance current is deviated, the size of the filter inductance current is adjusted in time by controlling the conduction duty ratio of the switch, and the size of the filter inductance current approaches to the reference value of the inductance current. In addition, the magnitude of the inductor current reference value can be adjusted by adjusting the magnitude of the control signal, so that the current value of the load can be further adjusted.

Further, the utility model discloses clock signal generator can also make control circuit work at fixed frequency, avoids because control circuit constantly rises at its operating frequency in the course of the work, makes the current value and the control signal proportional reduction of load, causes the problem of restriction to the current control scope of load.

The above description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the present invention is given.

The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments thereof, taken in conjunction with the accompanying drawings.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 shows a schematic diagram of a voltage step-down circuit according to an embodiment of the present invention;

fig. 2 shows a schematic diagram of a voltage step-down circuit according to another embodiment of the present invention;

fig. 3 illustrates waveforms of the switch drive and inductor current in the buck circuit, according to an embodiment of the present invention;

fig. 4 shows a schematic structural diagram of a control circuit according to an embodiment of the present invention;

fig. 5 shows a schematic structural diagram of a control circuit according to another embodiment of the present invention;

fig. 6 shows a schematic structural diagram of a control circuit according to yet another embodiment of the present invention; and

fig. 7 shows a schematic structural diagram of a control circuit according to yet another embodiment of the present invention.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

In order to solve the above technical problem, an embodiment of the present invention provides a control circuit. The control circuit can be used in a lamp needing dimming and color mixing. This control circuit is based on the step-down circuit design, if only adopt step-down circuit control switch's the duty cycle that switches on, and then the electric current of control load, can have the error in the control, consequently, the utility model discloses the scheme has designed based on the step-down circuit the embodiment of the utility model provides an in control circuit. First, each device and operation principle of the step-down circuit will be described.

Referring to fig. 1 and 2, two different voltage reduction circuits are shown, which can control the output current of a load connected thereto. Q is a switching device, D is a freewheeling diode, L is an inductor, C is an electrolytic capacitor, LED is a current-driven light-emitting device, the electrolytic capacitor C is connected with a load LED in parallel, and the inductor L and the electrolytic capacitor C mainly play a role in filtering high-frequency noise of the switch and a power supply to ensure that the output of the circuit is low-ripple direct current.

In the step-down circuit shown in fig. 1, one end of the switch Q is connected to the current diode D, and the other end is grounded, and this circuit can make the circuit controlled by the switch Q and the input control signal be connected to the common ground, so as to reduce the cost of the circuit and ensure that the control signal can be simply and reliably connected to the control chip, but it is difficult to collect the output current of the LED. In the step-down circuit shown in fig. 2, one end of the switch Q is connected to the current flowing diode D, and the other end is floating, and although this circuit can easily collect the output current of the LED, the operation of the switch Q needs to be controlled by floating driving or isolation driving in the case of the switch Q control circuit. At present, the voltage reducing circuit shown in fig. 1 is generally adopted, and the voltage reducing circuit is operated in a critical current mode, and the output current of the LED is calculated by collecting the peak value of the inductor current.

When the step-down circuit operates in the critical current mode, the output waveform is as shown in fig. 3, wherein the driving signal generated by the step-down circuit controls the operation of the switch Q, and when the driving signal is at a high level, the switch Q is turned on, and the inductor current linearly increases. When the driving signal is at a low level, the switch Q is turned off and the inductor current decreases linearly. When the inductor current drops to zero, the drive signal causes switch Q to re-conduct, starting the next cycle. The inductive current is filtered by a capacitor C and then output to a load LED, and the average value of the inductive current is equal to the output current. As can be seen from the waveforms in fig. 3, the inductor current is a continuous triangle, and the average value is equivalent to half of the peak value, so that the variation of the output current can be controlled by controlling the peak value of the inductor current. When the switch Q is turned on, the current flowing through the switch Q is equal to the inductor current, and therefore, the inductor current peak value can be obtained by detecting the on current of the switch Q.

However, when the step-down circuit works in the critical current mode, the working frequency of the step-down circuit changes along with the input voltage and the load, the working frequency of the step-down circuit also rises along with the increase of the dimming depth, when the working frequency is high enough, the delay of the driving signal generated by the control circuit can greatly influence the work of the step-down circuit, the inductive current is no longer in the critical working mode, the current peak value and the average value are not in linear proportion, the output current of the step-down circuit and the control signal can not be reduced in proportion, and therefore the dimming range of the circuit is limited. In addition, when the voltage reduction circuit works in a critical current mode, the peak value of the inductive current and the average value of the inductive current do not strictly follow a two-time linear relationship, when the inductive current reaches zero, the inductive current does not rise from zero in time due to the detection and driving delay of the control circuit, but can follow current reversely, and the actual average value of the output current is also influenced by the reverse follow current along with the increase of the dimming depth, so that control errors are caused. Therefore, the embodiment of the utility model provides a control circuit has been designed based on step-down circuit to overcome the problem that exists among the above-mentioned step-down circuit.

The following describes the composition and operation of the control circuit according to an embodiment of the present invention in detail.

Referring to fig. 4 and 5, the control circuit includes a voltage reduction circuit 101, an operational amplifier circuit 102, a dimming interface circuit 103, a clock signal generator 104, a PWM logic circuit 105, and a sampling unit 106.

The voltage reducing circuit 101 includes a first switch Q and a filter inductor L connected to the first switch Q, and the current of the filter inductor L is controlled by the on duty ratio of the first switch Q.

In this embodiment, the sampling unit 106 is connected to the filter inductor L and collects the current flowing through the filter inductor L.

The operational amplifier circuit 102 has an input end connected to the dimming interface circuit 103, receives an inductor current reference value converted by the dimming interface circuit 103 from an input control signal (for example, a dimming signal shown in fig. 5), and has another input end connected to the sampling unit 106, receives the filtered inductor current collected by the sampling unit 106, compares the filtered inductor current with the inductor current reference value, and outputs the comparison result as a first output signal. In this embodiment, the dimming interface circuit 103 may obtain a corresponding low ripple direct current signal by isolating, filtering, or performing proportional conversion on the control signal, and use the low ripple direct current signal as the inductor current reference value.

The PWM logic circuit 105 is connected to the output terminals of the clock signal generator 104 and the operational amplifier circuit 102, wherein the clock signal with a fixed frequency generated by the clock signal generator 104 is compared with the first output signal output by the output terminal of the operational amplifier circuit 102 through the PWM logic circuit 105, and then the PWM logic circuit 105 controls the on-duty ratio of the first switch Q according to the control rule, so that the magnitude of the filter inductor current is equal to the inductor current reference value, thereby adjusting the magnitude of the current of the load connected to the filter inductor L. The first switch is connected with the Q, and the current of the filter inductor is increased; the first switch Q is turned off and the filter inductor current decreases.

In an embodiment of the present invention, the first switch Q of the voltage-reducing circuit 101 is disposed on the main circuit of the voltage-reducing circuit 101, and one branch circuit includes the freewheeling diode D and the other branch circuit includes the electrolytic capacitor C connected in series with the filter inductor L. One end of the first switch Q is connected with the ground in a floating mode, and the other end of the first switch Q is connected with the filter inductor L. The electrolytic capacitor C is connected in parallel with the load (the load is LED in fig. 5), wherein the filter inductor L and the electrolytic capacitor C mainly filter the high-frequency noise of the first switch Q and the power source Vin, so as to ensure that the output of the circuit is low-ripple direct current. In this embodiment, the first switch Q may be a common switch or a MOS transistor, and the first switch Q described in the embodiments of the present invention is described by taking a MOS transistor as an example.

In an embodiment of the present invention, the load may be a light source device, such as a light emitting source like LED, CCFL (Cold cathode fluorescent Lamp), and may also be other devices, which is not specifically limited in this embodiment of the present invention. When the load is a light source device, the control signal is a dimming signal, which may be a dc dimming signal, a PWM dimming signal, or the like. The magnitude of the reference value of the inductor current can be adjusted by adjusting the magnitude of the dimming signal, and then the control circuit adjusts the magnitude of the current of the light source device so as to adjust the light color of the light source device.

With continued reference to fig. 4, in an embodiment of the present invention, the control circuit may further include an output driving circuit 107, which is connected to the output end of the PWM logic 105 and the first switch Q, respectively, and the output driving circuit 107 drives the first switch Q to be turned on or off according to the output signal of the PWM logic 105. For example, when the output driving circuit 107 receives a high level of the output signal of the PWM logic circuit 105, the first switch Q is controlled to be turned on, and when the output driving circuit 107 receives a low level of the output signal of the PWM logic circuit 105, the first switch Q is controlled to be turned off.

In this embodiment, the output driving circuit 107 generally includes three terminals, one is a floating ground terminal connected to the source of the first switch Q (such as a MOS transistor shown in fig. 5), the second is a power supply pin for providing the charge required to drive the first switch Q, and the third is a driving signal output terminal connected to the gate of the first switch Q. In the embodiment of the present invention, the output driving circuit 107 may be a floating driving circuit, or an isolation driving circuit, etc., the embodiment of the present invention does not limit the kind of the output driving circuit 107. The isolation driving circuit may use an isolation transformer to drive the first switch Q, i.e., a driving signal is coupled to the gate and the source of the first switch Q through a coupled winding, so as to subsequently control the state of the first switch Q.

In the embodiment of the present invention, in order to facilitate the use of the control circuit, the operational amplifier circuit 102, the dimming interface circuit 103, the clock signal generator 104 and the PWM logic circuit 105 mentioned above can be integrated into a chip, and the output driving circuit 107 can be integrated into the chip at the same time, which is not limited by the embodiment of the present invention.

Based on the operation principle of the control circuit shown in fig. 4, in an embodiment of the present invention, the positive terminal of the operational amplifier circuit U1 (such as an operational amplifier) in the control circuit shown in fig. 5 is connected to the dimming interface circuit 103, and the negative terminal is connected to the sampling unit 106. The sampling unit 106 comprises a sampling resistor Rs, the positive terminal of the operational amplifier circuit U1 is connected to the dimming interface circuit 103, the negative terminal is connected to the sampling resistor Rs, and the sampling resistor Rs is connected in series with the filter inductor L. In this embodiment, the inductor current collected by the sampling resistor Rs may operate in a discontinuous mode or a continuous mode.

When the operational amplifier circuit U1 operates, if the average value of the filter inductor current collected by the sampling resistor Rs received by the operational amplifier circuit U1 is smaller than the inductor current reference value converted by the dimming interface circuit 103, the output first output signal is increased, and then the on-duty ratio of the first switch Q can be correspondingly increased in the subsequent process, and if the average value of the filter inductor current collected by the sampling unit 106 received by the operational amplifier circuit U1 is larger than the inductor current reference value converted by the dimming interface circuit 103, the output first output signal is decreased, and then the on-duty ratio of the first switch Q can be correspondingly decreased in the subsequent process.

In this embodiment, the operational amplifier circuit U1 further includes a compensation network composed of a resistor Rfb, a resistor Rcomp, and a capacitor Ccomp, for filtering the noise of the acquisition unit and stabilizing the operation of the control circuit. The resistor Rcomp and the capacitor Ccomp are compensation impedances, and the filter inductor current collected by the collecting resistor Rs is fed back to the negative terminal of the operational amplifier circuit U1 through the resistor Rfb.

Based on the operating principle of the control circuit shown in fig. 4, in an embodiment of the present invention, when the PWM logic circuit 105 in the control circuit shown in fig. 5 receives the clock signal, the first switch Q is controlled to be turned on, and the first switch Q is controlled to be turned off until the received first output signal is lower than the clock signal, so as to control the on-duty ratio of the first switch Q by controlling the on-time of the first switch Q.

In this embodiment, the PWM logic circuit 105 may further include a comparator U2 and a flip-flop (e.g., an RS flip-flop U3 shown in fig. 5), wherein a negative terminal of the comparator U2 is connected to an output terminal of the operational amplifier circuit U1, and receives the first output signal output by the operational amplifier circuit U1, and a positive terminal of the comparator U2 receives the comparison parameter, and outputs the comparison result as the second output signal by comparing magnitudes of the first output signal and the comparison parameter. The comparative parameter for the embodiment shown in fig. 5 is a clock signal, such as a sawtooth wave, generated by oscillator U4. If the first output signal is greater than the comparison parameter, the second output signal output by the comparator U2 is at a low level, and if the first output signal is less than the comparison parameter, the second output signal output by the comparator U2 is at a high level.

One input end of the trigger is connected with the output end of the comparator U2, and the other input end of the trigger is connected with the oscillator U4. For example, if the flip-flop is an RS flip-flop U3, its reset terminal (i.e., "R" terminal) is connected to the output terminal of the comparator U2, and its enable terminal (i.e., "S" terminal) is connected to the oscillator U4. When the RS flip-flop U3 receives the clock signal generated by the oscillator U4, the RS flip-flop U3 outputs a set signal (i.e., outputs a high level) and controls the first switch Q to be turned on, and outputs a reset signal (i.e., outputs a low level) until the received second output signal is a high level, and controls the first switch Q to be turned off, so that the on-duty ratio of the first switch Q is controlled by controlling the on-time of the first switch Q, thereby achieving the purpose of controlling the current of a load, such as an LED.

Referring to fig. 4 and 5, the operation of the control circuit shown in fig. 5 will now be described in detail. The clock signal with a fixed frequency generated by the oscillator U4 shown in fig. 5 is a sawtooth wave, and the output driving circuit 107 includes a floating-ground driving/isolation driving U5.

When the control circuit starts to power up, firstly the oscillator U4 outputs a clock signal, the clock signal controls the RS flip-flop U3 to output a high level, and the high level controls the floating ground driving/isolating driving U5 to drive the first switch Q to be turned on and to make the load, such as an LED, emit light. Since the filter inductor L has an energy storage function, the filter inductor current starts to rise.

The sampling resistor Rs collects a filter inductor current, when the collected filter inductor current is greater than an inductor current reference value converted by the dimming interface circuit 103, a first output signal output by the operational amplifier circuit U1 starts to decrease, and when the first output signal is less than a sawtooth wave voltage, a second output signal output by the comparator U2 is at a high level, that is, a reset terminal ("R" terminal) of the Rs flip-flop U3 receives an input signal at the high level. At this time, the RS flip-flop U3 outputs reset, i.e., the flip-flop U3 outputs low level to the floating ground driving/isolation driving U5, and the first switch Q is driven to be turned off by the driving circuit U5, at which time the filter inductor current starts to decrease until the magnitude of the filter inductor current approaches or equals to the inductor current reference value. When the filter inductor current is close to or equal to the inductor current reference value, the clock signal output by the oscillator U4 continues to control the first switch Q to be turned on, and the above process is repeated, so that the filter inductor current is stabilized to the inductor current reference value, and further the adjustment of the load, such as the LED current, is realized, that is, the load, that is, the light emitting effect of the LED is adjusted.

In this embodiment, if different light emitting effects of the LED are to be adjusted, the adjustment can be achieved by adjusting the reference value of the inductor current. And adjusting the inductor current reference may be further accomplished by adjusting the dimming signal.

The utility model discloses an in the embodiment, interface circuit 103 adjusts luminance includes the voltage division unit and the low pass filter unit of being connected with the voltage division unit, and the voltage division unit is used for converting control signal into inductive current reference voltage according to inside reference signal Vref, and this inside reference signal Vref is stable voltage signal. The low-pass filtering unit is used for filtering high-frequency components of the inductor current reference voltage and feeding the high-frequency components serving as the inductor current reference value back to the input end of the operational amplifier circuit U1.

In the embodiment shown in fig. 5, the load is an LED, and correspondingly, the control signal may be a dimming signal. If the dimming signal is a direct-current dimming signal, the voltage dividing unit may include an adjustable resistor Rext, and the adjustable resistor Rext is connected in series with the resistor R1, the adjustable resistor Rext divides the internal reference signal Vref, the voltage divided by the adjustable resistor Rext serves as an inductor current reference voltage, and the divided voltage of the adjustable resistor is changed by changing the resistance value of the adjustable resistor, so that the magnitude of the inductor current reference voltage is adjusted, and further, the magnitude of the inductor current reference value is adjusted, and the adjustment of the magnitude of the inductor current reference value is realized.

In this embodiment, the low pass filtering unit includes a low pass filter composed of a resistor R2 and a capacitor C1. The voltage Vdim obtained by dividing the adjustable resistor Rext is fed back to the positive end of the operational amplifier circuit U1 through the low-pass filter, so that the high-frequency component of the divided voltage Vdim of the adjustable resistor can be filtered, and the voltage fed back to the positive end of the operational amplifier circuit U1 is ensured to be a low-ripple direct current signal. The inductor current reference value in the control circuit is Vref × Rext/(Rext + R1). Since the inputs of the positive terminal and the negative terminal of the operational amplifier circuit U1 are equal when the operational amplifier circuit U1 operates in a steady state, that is, the inductor current reference value is equal to the average inductor current value, the formula is as follows:

the average inductor current value is Vref × Rext/(Rext + R1).

Example two

Referring to fig. 6, the embodiment of the present invention further provides another control circuit, the control circuit in the embodiment shown in fig. 6 is similar to the operating principle of the control circuit shown in fig. 5, and the difference is that the dimming signal in this embodiment changes the dc dimming signal into the PWM dimming signal, and replaces the adjustable resistor Rext shown in fig. 5 with the second switch S, and the PWM dimming signal can control the on or off of the second switch S, so as to adjust the magnitude of the inductor current reference voltage, and further adjust the magnitude of the inductor current reference value.

In this embodiment, if the second switch S is turned on, the inductor current reference voltage is zero, and if the second switch S is turned off, the inductor current reference voltage is the voltage of the internal reference signal Vref. The inductor current reference value is equivalent to the average value of Vdim, and assuming that the duty ratio of the PWM signal is D, the inductor current reference value is Vref × (1-D).

In this embodiment, the comparison parameter received by the positive terminal of the comparator U2 does not use the sawtooth wave output by the oscillator U4, but multiplexes the voltage Vcs signal of the sampling resistor Rs, and the voltage Vcs signal is compared with the first output signal output by the operational amplifier circuit U1 by the comparator U2 to obtain a second output signal, so that the second output signal is subsequently used to control the on and off of the first switch Q to control the magnitude of the filter inductor current value. Specific control procedures refer to the embodiment of the control circuit shown in fig. 5 above.

EXAMPLE III

Referring to fig. 7, the embodiment of the present invention further provides another control circuit, the control circuit in the embodiment shown in fig. 7 is similar to the operation principle of the control circuit shown in fig. 5, except that the control circuit of this embodiment is a floating structure, a floating driving/isolation driving U5 is omitted, i.e. a floating driving or an isolation driving is omitted, the output of the RS flip-flop U3 is directly connected to the gate of the first switch Q, the second switch S is replaced by a coupler U6, and the PWM dimming signal is coupled to the control circuit through the coupler U6.

In this embodiment, the coupler U6 is an optical coupler, when the PWM dimming signal is at a high level, the optocoupler diode of the optocoupler is turned on, and its output is short-circuited, and Vdim is at a low level; when the PWM dimming signal is low, the optocoupler is disconnected and its output is open, Vdim is the internal reference signal Vref. Specific control procedures refer to the embodiment of the control circuit shown in fig. 5 above.

Based on same utility model the design, the utility model also provides a lamp, this lamp is including the chip of the control circuit of integrated in the arbitrary embodiment in the above to and as the light source device of load, light source device and control circuit's filter inductance series connection. The control circuit receives an externally input control signal, converts the externally input control signal into a filter inductance current reference value, and makes the filter inductance current equal to the filter inductance current reference value by comparing the filter inductance current with the reference value so as to adjust the current of the light source device and further adjust the light of the light source device.

The utility model discloses an in the embodiment, control circuit receives external input's control signal, receive the control command that external equipment sent including control circuit, include among the control command and carry out the target parameter adjusted to the light source device. In this instance, the external device may include any one of a switch, a smart terminal, a sensor, and the like.

The embodiment of the utility model provides a can adjust the luminance of light source device to 1% from 100%, and can only adjust the luminance of light source device to 15%, visible from 100% among the prior art, the embodiment of the utility model provides a obviously improve the luminance scope of light source device, improved the proportion of adjusting luminance to lamps and lanterns. Furthermore, for the lamp with the light source devices of various colors, the range of CIE color coordinates of the lamp can be expanded, and the dimming and color-mixing range of the lamp is enlarged.

The utility model discloses control circuit abandons indirect measurement's mode, and the electric current that flows through filter inductance is gathered through direct for filter inductance current's collection is more accurate and timely. Meanwhile, the reference value of the inductance current is compared with the collected filter inductance current, so that when the value of the filter inductance current is deviated, the size of the filter inductance current is adjusted in time by controlling the conduction duty ratio of the switch, and the size of the filter inductance current is equal to the reference value of the inductance current. In addition, the magnitude of the inductor current reference value can be adjusted by adjusting the magnitude of the control signal, so that the current value of the load can be further adjusted.

Thus, it should be appreciated by those skilled in the art that while a number of exemplary embodiments of the invention have been shown and described in detail herein, many other variations and modifications can be made, consistent with the principles of the invention, which are directly determined or derived from the disclosure herein, without departing from the spirit and scope of the invention. Accordingly, the scope of the present invention should be understood and interpreted to cover all such other variations or modifications.

Claims

1. A control circuit comprises a voltage reduction circuit, the voltage reduction circuit comprises a first switch and a filter inductor connected with the first switch, the current of the filter inductor is controlled by the conducting duty ratio of the first switch, and the control circuit is characterized in that,

the PWM logic circuit is respectively connected with the clock signal generator and the output end of the operational amplifier circuit, wherein after the clock signal with fixed frequency generated by the clock signal generator and the first output signal output by the output end of the operational amplifier circuit are compared by the PWM logic circuit, the PWM logic circuit controls the conduction duty ratio of the first switch according to a control rule so that the magnitude of the filter inductance current is equal to the inductance current reference value, and the magnitude of the current of a load connected to the filter inductance is further adjusted;

2. The control circuit of claim 1, wherein the op-amp circuit compares the magnitude of the filtered inductor current with the inductor current reference and outputs the comparison as a first output signal, comprising:

3. The control circuit of claim 2, wherein the op-amp circuit comprises an operational amplifier and the sampling unit comprises a sampling resistor, wherein,

the operational amplifier has a positive terminal connected to the dimming interface circuit and a negative terminal connected to the sampling resistor, and the sampling resistor is connected in series with the filter inductor.

4. The control circuit of claim 1 or 2, wherein the PWM logic circuit controls the on duty cycle of the first switch according to a control rule, comprising:

5. The control circuit of claim 1 or 2, wherein the PWM logic circuit comprises:

6. The control circuit of claim 5,

the comparator has positive end and negative end, if the comparator negative end is connected the output of fortune amplifier circuit, the positive end receives the comparison parameter, then the comparator compares the first output signal with the magnitude of comparison parameter to regard the comparison result as second output signal output, include:

7. The control circuit of claim 6, wherein the flip-flop comprises an RS flip-flop, wherein,

the reset end of the RS trigger is connected with the output end of the comparator, and the enable end of the RS trigger is connected with the clock signal generator;

at the beginning of each period, when the RS trigger receives the clock signal, the RS trigger outputs a set and controls the first switch to be switched on, and when the received second output signal is at a high level, the RS trigger outputs a reset and controls the first switch to be switched off, so that the switching-on duty ratio of the first switch is controlled by controlling the switching-on time of the first switch.

8. The control circuit of claim 6, wherein the dimming interface circuit comprises:

9. The control circuit of claim 8, wherein the sampled filter inductor current is used as the comparison parameter

The voltage division unit comprises a coupler;

10. The control circuit of claim 9, wherein the coupler is an optocoupler.

11. The control circuit of claim 8, further comprising:

12. The control circuit of claim 11, wherein the output driver circuit comprises a floating ground driver circuit or an isolated driver circuit.

13. The control circuit according to claim 11 or 12, wherein if a clock signal generated by the clock signal generator is used as the comparison parameter and the output driver circuit drives the first switch to be turned on or off, the control circuit controls the first switch to be turned on or off

14. The control circuit according to claim 11 or 12, wherein if the sampled filtered inductor current is used as the comparison parameter and the output driving circuit drives the first switch to be turned on or off, the control circuit further comprises a comparator for comparing the sampled filtered inductor current with the reference voltage

The voltage division unit comprises a second switch;

15. The control circuit of claim 1 or 2, wherein the clock signal generator comprises an oscillator.

16. The control circuit according to claim 1 or 2,

and the dimming interface circuit is used for isolating, filtering or proportionally converting the control signal to obtain a corresponding low-ripple direct current signal which is used as the reference value of the inductive current.

17. The control circuit of claim 1 or 2, wherein the load comprises a light source device.

18. A light fixture, comprising:

a chip integrated with the control circuit of any one of claims 1 to 17; and

19. The light fixture of claim 18, wherein the control circuit receives an externally input control signal comprising:

20. A light fixture as recited in claim 19, wherein said external device comprises any one of: switch, intelligent terminal, sensor.