CN206698141U - A kind of dutycycle counting circuit for Switching Power Supply line loss compensation - Google Patents
A kind of dutycycle counting circuit for Switching Power Supply line loss compensation Download PDFInfo
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- CN206698141U CN206698141U CN201720259970.2U CN201720259970U CN206698141U CN 206698141 U CN206698141 U CN 206698141U CN 201720259970 U CN201720259970 U CN 201720259970U CN 206698141 U CN206698141 U CN 206698141U
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Abstract
The utility model discloses a kind of dutycycle counting circuit for Switching Power Supply line loss compensation, including sampling control circuit, pre-flock wave circuit, peak value valley sample circuit, average sample circuit, switch-capacitor filtering circuit, sampling control circuit is used to provide control signal to peak value valley sample circuit, average sample circuit and switch-capacitor filtering circuit, degaussing time square-wave signal is sequentially connected pre-flock wave circuit, peak value valley sample circuit, average sample circuit, switch-capacitor filtering circuit, the output end output compensation voltage signal of switch-capacitor filtering circuit.The dutycycle of degaussing time square-wave signal can be converted into analog voltage by the utility model, this voltage be used to adjusting output voltage size with make up because charge cable impedance and caused by voltage loss, make to be output to the voltages keep constant at load both ends.Big resistance is not present without external bulky capacitor in circuit, therefore will not take substantial amounts of area in integrated circuits, reduces cost of manufacture.
Description
Technical field
It the utility model is related to integrated circuit fields, more particularly to a kind of line of inverse-excitation type primary side feedback constant pressure Switching Power Supply
Damage compensation circuit.
Background technology
With flourishing for electronic technology, the measure of precision of the portable electric appts such as system such as mobile phone, tablet personal computer
More and more higher, it result in corresponding charger, adapter requirement more and more higher.The inverse-excitation type switch power-supply topology tool of primary side feedback
There is the advantages of simple and stable structure is good, obtained a wide range of applications in small-power out-put supply field.Using primary side feedback knot
The circuit structure of the inverse-excitation type switch power-supply of structure is as shown in figure 1, its operation principle is：Alternating voltage Vac passes through four diodes
Rectification and electric capacity C2After filtering, DC voltage V is obtainedin, this DC voltage, which produces, provides the vdd voltage that control chip works.
When control chip control power switch pipe conducting, transformer primary side winding produces primary current Ip, energy stores are in primary side electricity
Feel LpIn.Primary current IpSize increase over time and constantly increase, primary current detection resistance RcsFor detecting IpIt is big
It is small, work as IpConstantly increase causes RcsOn voltage reach certain threshold value after, produce switch-off power pipe signal, power tube Q1Closed
It is disconnected, be stored in energy transfer on transformer primary side inductance to secondary and assists winding side, this process be transformer demagnetization process,
Time used is the degaussing time, is designated as Tdemag.In transformer demagnetization process, energy is mainly consumed by secondary, electric current IsFrom pair
Side inductance outflow, Partial conservation of energy is in output capacitance C1On, partly fallen by load consumption.Degaussing terminate after to switching next time
Before unlatching, due to secondary side diode D1Effect, electric capacity C1On energy can not be released from secondary inductance, can only be by load consumption.
Because of output capacitance C1Accumulation of energy effect, output end can stably output voltage or electric current relatively.Primary current Ip, secondary current Is、
Assists winding terminal voltage VfbAnd degaussing time square-wave signal TdemagVisible in fig. 2, degaussing time square-wave signal passes through degaussing
The auxiliary winding voltage of time detecting module detection switch power transformer produces.
For the Switching Power Supply of constant pressure output, control chip is detected by assists winding within the transformer degaussing time
VfbVoltage carrys out indirect detection circuit pcb board output voltage Vo_pcbSize, the auxiliary winding voltage V that will be detectedfbWith threshold value electricity
Press VrefIt is compared by amplifier EA, EA output voltage adjustable switch frequency (PFM patterns) or switching signal pulsewidth (PWM
Pattern), output voltage is remained at a stable value.Output voltage Vo_pcbWith threshold voltage VrefIt is big in fixed proportion
Small relation.
Because adapter output end is connected by charge cable with load, and there is a constant impedance in charge cable itself, meeting
Portion voltage is lost, the size that voltage is lost is related to the size of output current.It is if defeated on switching power circuit pcb board
Go out voltage Vo_pcbKeep constant, then voltage V of the circuit output to load both endso_loadMeet equation below：
Vo_load=Vo_pcb-Io·Rcable (1)
In formula (1), RcableFor charge cable equiva lent impedance, IoFor output current.Load voltage Vo_loadMeet in Fig. 3
Voltage waveform.As can be known from Fig. 3, both end voltage V is loadedo_loadReduce with the increase of output current, can not keep steady
It is fixed.In order to make Vo_loadKeep stable, then must allow Vo_pcbWith output current IoIncrease and increase, with this come compensate because
Cable impedance and caused by extra voltage be lost, voltage waveform is as shown in Figure 4.
Due to can not directly detect output current using the Switching Power Supply of primary side feedback structure, it is therefore desirable to by detection with
The related parameter of output current obtains output current information indirectly.Output current I can be obtained through derivingoExpression formula：
In formula (2), VpkFor primary side crest voltage, for steady state value in the constant pressure Switching Power Supply for use PFM patterns, Rcs
For primary current detection resistance, N is the turn ratio of transformer primary side winding and vice-side winding, TsIt is switch periods.From formula (2)
In understand, output current IoIt is directly proportional to the ratio of degaussing time and switch periods, therefore by detection magnetic signal can be gone to open
Close the dutycycle in the cycle to obtain load current information indirectly, load heavier, TdemagDutycycle is bigger, otherwise load is lighter,
TdemagDutycycle is smaller.
Prior art realizes line loss by adjusting the threshold voltage of error amplifier EA inputs under different loads
Compensation, the Isobarically Control structure with line loss compensation function as shown in figure 5, this structure be used for using PFM patterns Switching Power Supply, when
EA output voltages are lower, and the switching frequency of system is higher, conversely, the higher switching frequency of EA output voltages is lower.The degaussing time is examined
Survey module detection auxiliary winding voltage Vfb, output degaussing time square-wave signal Tdemag, the input of dutycycle counting circuit, which connects, goes
Magnetic time signal Tdemag, detect Tdemag, can be by T after signaldemagDutycycle size be converted into voltage Vcpc, dutycycle gets over
Height, VcpcValue is bigger, and dutycycle is lower, VcpcIt is worth smaller.
By deriving, the voltage on resistance R7 is represented by：
In formula (3), α and β are equivalent proportionality coefficient.Under constant voltage mode, by EA connected for negative-feedback knot
Structure, and the R in actual circuit11Value be much larger than R10, voltage V can be obtained through derivingfbWith voltage VR7Approximately equal.Meanwhile feed back
Voltage VfbValue and output voltage Vo,pcbCorrelation, Vo,pcbIt is expressed as：
R in formula (4)1、R2For the pull down resistor of assists winding, n is the number of turn of transformer secondary winding and assists winding
Than.Then it can obtain output voltage Vo,pcbFor：
It was found from formula (5), using Isobarically Control structure in Fig. 5, the output voltage of pcb board can be with VcpcThe rise of voltage
And raise, VcpcIt is directly proportional to output current size, so the magnitude of voltage risen can be used for making up line loss voltage, make load both ends
Voltages keep constant.Prior art is using the RC low pass filters being made up of big resistance and bulky capacitor shown in Fig. 6 Lai real
Now by degaussing time signal TdemagDutycycle be converted into the function of magnitude of voltage.But the capacitance due to using will be greatly, it is necessary to will
Bulky capacitor is external, and big resistance can also take substantial amounts of area in domain, causes cost too high.
Utility model content
Purpose of utility model：In order to solve the problems, such as that prior art is present, can be made up without using the big resistance of bulky capacitor
The voltage loss caused by charge cable impedance, the utility model provide a kind of based on the dutycycle of Switching Power Supply line loss compensation
Calculate circuit.
Technical scheme：Including sampling control circuit, pre-flock wave circuit, peak value valley sample circuit, average sample circuit and
Switch-capacitor filtering circuit, the sampling control circuit are used for peak value valley sample circuit, average sample circuit and switch electricity
Capacitor filter circuit provides control signal, the input input degaussing time square-wave signal of the pre-flock wave circuit, the peak value paddy
The input of value sample circuit is connected with the output end of pre-flock wave circuit, the input connection peak value paddy of the average sample circuit
It is worth the output end of sample circuit, the output end of the input connection average sample circuit of the switch-capacitor filtering circuit, switch
The output end output compensation voltage signal of capacitor filter；Peak value valley sample circuit is used to gather peak signal and valley letter
Number and further obtain mean value signal, average sample circuit is used to sample mean value signal.
Further, the sampling control circuit includes the first rising edge pulse maker, the second rising edge pulse generates
Device, the 3rd rising edge pulse maker and the 4th rising edge pulse maker, the input of the first rising edge pulse maker are defeated
Enter degaussing time square-wave signal, the degaussing time square-wave signal for detection Switching Power Supply auxiliary winding voltage signal, first
The output end of rising edge pulse maker is degaussing time rising edge single pulse signal；Degaussing time square-wave signal passes through phase inverter
INV1 connection the second rising edge pulse makers, the output of the second rising edge pulse maker is degaussing time trailing edge pulse
Signal；Degaussing time rising edge single pulse signal sequentially connects through the phase inverter INV2 with delay with the phase inverter INV3 with delay
3rd rising edge pulse maker, the output of the 3rd rising edge pulse maker is average sampled signal；4th rising edge pulse is given birth to
The input input fixed frequency signal grown up to be a useful person, output end is switch-capacitor filtering control signal.
Further, the pre-flock wave circuit is low pass R/C filters.
Further, the output end of the pre-flock wave circuit connects the input of peak value valley sample circuit through the second buffer
End；The peak value valley sample circuit includes two sampling paths, and a sampling path is peak value sampling path, including switch S1
With electric capacity C7, switch S1 one end connects the output end of the second buffer, the other end for peak value valley sample circuit output end and
Connect electric capacity C7One end, electric capacity C7Other end ground connection, the control terminal for switching S1 connects degaussing time trailing edge pulse letter
Number；Another sampling path is that valley samples path, including switch S2, switch S3 and electric capacity C8, switch S2 one end connection the
The output end of two buffers, other end connection electric capacity C8One end and switch S3 one end, electric capacity C8The other end ground connection, switch S3's
The other end is connected to the output end of peak value valley sample circuit, and the control terminal for switching S2 connects the degaussing time rising edge simple venation
Signal is rushed, the control terminal for switching S3 connects the average sampled signal.
Further, the average sample circuit includes the 3rd buffer, switch S4, electric capacity C9, the 3rd buffer it is defeated
Enter the output end of end connection peak value valley sample circuit, the output end connecting valve S4 of the 3rd buffer one end, switch S4's
The other end is the output end of average sample circuit and connection electric capacity C9One end, electric capacity C9The other end is grounded, and switchs S4 control terminal
Connect the average sampled signal.
Further, the switch-capacitor filtering circuit includes the 4th buffer, switch S5, switch S6, electric capacity C10, electric capacity
C11And phase inverter INV4, the 3rd buffer input connect the output end of average sample circuit, the output end of the 3rd buffer
Connecting valve S5 one end, switch the S5 other end connecting valve S6 input and electric capacity C10One end, electric capacity C10It is another
End ground connection, the output end for switching S6 are the output end and connection electric capacity C of switch-capacitor filtering circuit11One end, electric capacity C11It is another
One end is grounded, and switchs S5 control terminal connecting valve capacitor filtering control signal, and the control terminal for switching S6 is connected through phase inverter
Switch-capacitor filtering control signal.
Further, the dutycycle counting circuit is integrated in chip.
Beneficial effect：A kind of dutycycle counting circuit for Switching Power Supply line loss compensation provided by the utility model, phase
For comparing prior art, the dutycycle of degaussing time square-wave signal can be converted into analog voltage, this voltage, which is used to adjust, is
Unite output voltage size with make up because charge cable impedance and caused by voltage loss, the voltage for making to be output to load both ends protects
Hold constant, realize cable compensation function.Without external very big electric capacity, also in the absence of big resistance, therefore in integrated circuits will not
Substantial amounts of area is taken, reduces cost of manufacture.
Brief description of the drawings
Fig. 1 is the main topology theory figure of AC-DC primary side feedback inverse-excitation type switch power-supplies；
Fig. 2 is AC-DC primary side feedback inverse-excitation type switch power-supply transformer primaries secondary current, auxiliary winding voltage and degaussing side
Ripple signal waveforms；
Fig. 3 is the curve map of circuit pcb board output voltage and load terminal voltage without line loss compensation；
Fig. 4 is the curve map of the circuit pcb board output voltage and load terminal voltage that have line loss compensation；
Fig. 5 is the existing Isobarically Control structure with line loss compensation compensation function；
Fig. 6 is existing dutycycle counting circuit；
Fig. 7 is the dutycycle counting circuit theory diagram in the utility model；
Fig. 8 is sampling control circuit schematic diagram in the utility model dutycycle counting circuit；
Fig. 9 is pre-flock wave circuit and peak value valley sample circuit schematic diagram in the utility model dutycycle counting circuit；
Figure 10 is average sample circuit and switch-capacitor filtering circuit theory diagrams in the utility model dutycycle counting circuit；
Figure 11 is degaussing time signal and logic control signal oscillogram when the utility model dutycycle counting circuit works；
Figure 12 is each sampled voltage oscillogram when the utility model dutycycle counting circuit works.
Embodiment
The utility model is described in further detail with specific embodiment below in conjunction with the accompanying drawings.
As shown in fig. 7, the dutycycle counting circuit for Switching Power Supply line loss compensation includes sampling control circuit 1, pre-flock
5 five wave circuit 2, peak value valley sample circuit 3, average sample circuit 4 and switch-capacitor filtering circuit parts.
The structure of sampling control circuit 1 can refer to Fig. 8.The input of four parts is the degaussing time in sampling control circuit
Square-wave signal Tdemag, the degaussing time square-wave signal TdemagExported by degaussing time detecting module.In Part I, first
Rising edge pulse maker 11 detects TdemagThe peak value sampling that the duration is 500ns is produced after the rising edge level of signal to believe
Number, i.e. degaussing time rising edge single pulse signal Tdemag_up；In Part II, degaussing time square-wave signal TdemagSignal passes through
The second rising edge pulse maker 12 is connected after phase inverter INV1, is detecting TdemagProduce and continue after the trailing edge level of signal
Time is 500ns valley sampled signal, i.e. degaussing time trailing edge single pulse signal；Part III, Tdemag_upSignal is successively
By connecting the 3rd rising edge pulse maker 13 after phase inverter INV2 and INV3 with delay, T is being produceddemag_upPulse is believed
After number 300ns, the sampled signal cpc_sample that the duration is 500ns is produced, sampled signal cpc_sample is as equal
It is worth sampled signal；Part IV, the signal of a fixed frequency, fixed frequency signal connection the are produced by oscillator OSC
The input of four rising edge pulse makers 14, control signal of the duration as 500ns is produced using fixed 6.4kHz frequencies
Cpc_clk, control signal cpc_clk are the control signal of switch-capacitor filtering circuit.
The structure of pre-flock wave circuit 2 and peak value valley sample circuit 3 can refer to Fig. 9.Pre-flock wave circuit 2 is RC LPFs
Device, receive the degaussing time square-wave signal T of degaussing detection module outputdemag, after acting on after filtering, export ramp signal
Vramp, in TdemagV during high levelrampIn ramping up, in TdemagV during low levelrampIt is downward in slope.
Peak value valley sample circuit 3 receives the ramp signal V of the output of pre-flock wave circuit 2ramp, in degaussing time signal Tdemag
After producing trailing edge, sampled signal Tdemag_downIt is changed into high level, switch S1 is opened, now ramp signal VrampRise to peak value,
Switch S1 and open post-sampling electric capacity C7By peak value VrampVoltage sample, V is saved as after S1 shut-offsramp_max；TdemagProduce rising edge
Afterwards, sampled signal Tdemag_upIt is changed into high level, switch S2 is opened, now ramp signal VrampDrop to valley, S2 is adopted after opening
Sample electric capacity C8By valley VrampVoltage sample, V is saved as after S2 shut-offsramp_min；After the 300ns that valley sampling terminates, adopt
Sample signal cpc_sample is changed into high level, and switch S3 is opened, due to electric capacity C7With electric capacity C8Capacitance it is equal, when S3 is turned on
C7With C8On electric charge mean allocation, C7With C8On voltage be also averaged, signal Vramp_minWith Vramp_maxIt is changed into VrampBe averaged
Threshold voltage.The output signal of peak value valley sample circuit is Vramp_max, connect average sample circuit.Degaussing time signal and switch
The timing waveform signal of control signal is referring to Figure 11, and ramp voltage is with each sampled voltage waveform signal referring to Figure 12.
The structure of average sample circuit and switch-capacitor filtering circuit can refer to Figure 10.Average sample circuit input connects
The output signal V of peak value valley sample circuitramp_max, from above-mentioned principle it was found from, the signal V when average samplesramp_maxBy electricity
Press VrampPeak value be changed into average value, therefore average sample circuit will switch S4 also by sampled signal cpc_sample opens, will
Have turned into the V of average valueramp_maxSample electric capacity C9Go up and remain to next sampled signal and arrive, average sample circuit it is defeated
Go out for Vramp_avg。
The principle calculated according to dutycycle described above, can enter to the output voltage Vramp_avg of average sample circuit
Row derives.Because pre-flock wave circuit 2 has stronger filter effect so that the ramp voltage peak value of output differs not with valley
Greatly, in R13It is worth for 4M Ω, C6For 50pF, under conditions of internal electric source Vdd is 3V, the difference of peak value valley is usually no more than 200mV,
Therefore magnetic signal is being gone to give electric capacity C for high level6It is low level C to charge and remove magnetic signal6Discharge regime, electric capacity can be approximately considered
C6On voltage do not change, this voltage can use slope average voltage Vramp_avgInstead of.When transformer is in the degaussing time, electricity
Press VrampFrom valley Vramp_minRamp to peak value Vramp_max, formula is：
In formula (6), VddFor chip internal supply voltage, and remove magnetic signal high level voltage.When transformer removes magnetic knot
To when degaussing starts next time after beam, voltage VrampFrom peak value Vramp_maxRamp down is to valley Vramp_min, formula is：
Formula (6) is substituted into formula (7), can obtain：
Further derive, obtaining average ramp voltage value Vramp_avg is：
In view of the stability of system, after saltus step occurs for load, the output voltage V of line loss compensation compensating modulecpcCan not
The quick acute variation of generation.Therefore, it is necessary to output voltage V to average sampling moduleramp_avgFurther filtering, obtains one
More slowly varying VcpcVoltage.Traditional RC low pass filters being made up of resistance capacitance go for preferably filtering effect
Fruit, it is necessary to big resistance capacitance to obtain high time constant.However, big resistance and bulky capacitor can be occupied in domain it is larger
Area causes cost increase, so the utility model obtains filter effect using switch-capacitor filtering circuit.Filtered stabilization
Afterwards, voltage VcpcValue and Vramp_avgIt is equal, therefore VcpcFormula be：
From the operation principle of the angle analysis switch-capacitor filtering circuit of time domain：When electric capacity is not started working, electric capacity C10
And C11On voltage be that 0, Va is a constant voltage source, clk_cpc is the switching signal of fixed frequency, when clk_cpc believe
Number open switch S5, voltage source is to C10Charging makes its voltage rise to Va, and S5 is closed and opened S6 by subsequent clk_cpc, electric capacity
C10On charged moiety be transferred to C11On, C10Capacitance voltage declines；Next cycle is arrived, clk_cpc again opens S5, Va
To electric capacity C10Charging, C10On voltage recover to Va, S5 is closed after S6 opens, electric capacity C10Partial charge be transferred to C again11On.
When clk_cpc signals alternately cut-off to S5 and S6, voltage Vcpc just constantly rises.
According to the upper principle, within clk_cpc n-th of cycle, voltage Vcpc (n) expression formula is：
By successive ignition, formula (11) can be converted into：
If C10With C11Ratio be substantially equal to 0, then meet：
Therefore, formula (12) can be eventually converted into below equation：
If the frequency of clk_cpc signals is f, then formula (14) can be converted to the formula of continuous time：
Formula (14) is the time-domain expression of switch-capacitor filtering circuit output voltage, it can be seen that, work as C10Meet remote
Less than C11Condition when, switch-capacitor filtering circuit output characteristic is consistent with RC low-pass filter circuit output characteristics, time constant
Can arbitrarily it be set by the frequency of configuration switch, phase inverter INV1, switch S5, S6 and electric capacity C10Combination can be equivalent to one
Individual resistance Reff, ReffValue be equal to S5, S6 turn-on frequency f and C10The inverse of sum.
Voltage Vramp_avgVoltage V that can be slowly varying is obtained after SCF filterscpc, now VcpcIt can be used for
Output voltage size is adjusted, realizes line loss compensation function, and the stability of system can be kept.
Claims (7)
1. a kind of dutycycle counting circuit for Switching Power Supply line loss compensation, it is characterised in that including sampling control circuit
(1), pre-flock wave circuit (2), peak value valley sample circuit (3), average sample circuit (4) and switch-capacitor filtering circuit (5), institute
Sampling control circuit (1) is stated to be used for peak value valley sample circuit (3), average sample circuit (4) and switch-capacitor filtering circuit
(5) control signal, the input input degaussing time square-wave signal of the pre-flock wave circuit (2) are provided, the peak value valley is adopted
The input of sample circuit (3) is connected with the output end of pre-flock wave circuit (2), the input connection of the average sample circuit (4)
The output end of peak value valley sample circuit (3), the input connection average sample circuit of the switch-capacitor filtering circuit (5)
(4) output end, the output end output compensation voltage signal of switch-capacitor filtering circuit (5)；Peak value valley sample circuit (3) is used
Mean value signal is obtained in collection peak signal and valley signal and further, average sample circuit (4) is used to enter mean value signal
Row sampling.
2. the dutycycle counting circuit according to claim 1 for Switching Power Supply line loss compensation, it is characterised in that described
Sampling control circuit (1) includes the first rising edge pulse maker (11), the second rising edge pulse maker (12), the 3rd rising
Along impulse generator (13) and the 4th rising edge pulse maker (14), the input of the first rising edge pulse maker (11) is defeated
Enter degaussing time square-wave signal, the output end of the first rising edge pulse maker (11) is believed for degaussing time rising edge pulse
Number；Degaussing time square-wave signal passes through phase inverter INV1 connection the second rising edge pulse makers (12), the second rising edge pulse
The output of maker (12) is degaussing time trailing edge single pulse signal；Degaussing time rising edge single pulse signal sequentially prolongs through band
When phase inverter INV2 connect the 3rd rising edge pulse maker (13), the 3rd rising edge pulse with the phase inverter INV3 with delay
Maker (13) output is average sampled signal；The input input fixed frequency letter of 4th rising edge pulse maker (14)
Number, output end is switch-capacitor filtering control signal.
3. the dutycycle counting circuit according to claim 1 or 2 for Switching Power Supply line loss compensation, it is characterised in that
The pre-flock wave circuit (2) is low pass R/C filters.
4. the dutycycle counting circuit according to claim 2 for Switching Power Supply line loss compensation, it is characterised in that described
The output end of pre-flock wave circuit (2) connects the input of peak value valley sample circuit (3) through the second buffer；The peak value valley
Sample circuit (3) includes two sampling paths, and a sampling path is peak value sampling path, including switch S1 and electric capacity C7, open
The output end that S1 one end connects the second buffer is closed, the other end is the output end of peak value valley sample circuit and connection electric capacity C7One
End, electric capacity C7Other end ground connection, the control terminal for switching S1 connects the degaussing time trailing edge single pulse signal；Another is adopted
Sample path is that valley samples path, including switch S2, switch S3 and electric capacity C8, the one end for switching S2 connects the defeated of the second buffer
Go out end, other end connection electric capacity C8One end and switch S3 one end, electric capacity C8Other end ground connection, the other end for switching S3 is connected to
The output end of peak value valley sample circuit, the control terminal for switching S2 connect the degaussing time rising edge single pulse signal, switch
S3 control terminal connects the average sampled signal.
5. the dutycycle counting circuit for Switching Power Supply line loss compensation according to claim 2 or 4, it is characterised in that
The average sample circuit (4) includes the 3rd buffer, switch S4, electric capacity C9, the input connection peak value paddy of the 3rd buffer
It is worth the output end of sample circuit, the output end connecting valve S4 of the 3rd buffer one end, the other end for switching S4 is adopted for average
The output end and connection electric capacity C of sample circuit (4)9One end, electric capacity C9The other end is grounded, and the control terminal connection for switching S4 is described
It is worth sampled signal.
6. the dutycycle counting circuit for Switching Power Supply line loss compensation according to claim 2 or 4, it is characterised in that
The switch-capacitor filtering circuit (5) includes the 4th buffer, switch S5, switch S6, electric capacity C10, electric capacity C11And phase inverter
INV4, the output end of the 3rd buffer input connection average sample circuit (4), the output end connecting valve S5 of the 3rd buffer
One end, switch the S5 other end connecting valve S6 input and electric capacity C10One end, electric capacity C10The other end is grounded, and is opened
The output end for closing S6 is the output end and connection electric capacity C of switch-capacitor filtering circuit11One end, electric capacity C11The other end ground connection,
S5 control terminal connecting valve capacitor filtering control signal is switched, the control terminal for switching S6 is connected through the switching capacity of phase inverter
Filter control signal.
7. the dutycycle counting circuit according to claim 1 or 2 for Switching Power Supply line loss compensation, it is characterised in that
The dutycycle counting circuit is integrated in chip.
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| CN201720259970.2U CN206698141U (en) | 2017-03-17 | 2017-03-17 | A kind of dutycycle counting circuit for Switching Power Supply line loss compensation |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107508476A (en) * | 2017-03-17 | 2017-12-22 | 苏州智浦芯联电子科技股份有限公司 | A kind of dutycycle counting circuit for Switching Power Supply line loss compensation |
| CN109818507A (en) * | 2019-04-03 | 2019-05-28 | 深圳市必易微电子有限公司 | Overcurrent protection compensation circuit and method and circuit of reversed excitation |
| CN111509974A (en) * | 2019-01-31 | 2020-08-07 | 炬芯（珠海）科技有限公司 | Method and circuit for controlling stability of PWM loop and DC-DC converter |
| CN117498658A (en) * | 2023-12-29 | 2024-02-02 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
-
2017
- 2017-03-17 CN CN201720259970.2U patent/CN206698141U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107508476A (en) * | 2017-03-17 | 2017-12-22 | 苏州智浦芯联电子科技股份有限公司 | A kind of dutycycle counting circuit for Switching Power Supply line loss compensation |
| CN107508476B (en) * | 2017-03-17 | 2024-05-31 | 苏州智浦芯联电子科技股份有限公司 | A duty cycle calculation circuit for switching power supply line loss compensation |
| CN111509974A (en) * | 2019-01-31 | 2020-08-07 | 炬芯（珠海）科技有限公司 | Method and circuit for controlling stability of PWM loop and DC-DC converter |
| CN109818507A (en) * | 2019-04-03 | 2019-05-28 | 深圳市必易微电子有限公司 | Overcurrent protection compensation circuit and method and circuit of reversed excitation |
| CN117498658A (en) * | 2023-12-29 | 2024-02-02 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
| CN117498658B (en) * | 2023-12-29 | 2024-03-22 | 晶艺半导体有限公司 | Ramp signal generating circuit and generating method |
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