CN206099730U - A chip with dynamic slope compensation function - Google Patents

Abstract

The utility model relates to a chip with dynamic slope compensation function is equipped with dynamic slope compensation circuit on the chip, and dynamic slope compensation circuit includes: the voltage-controlled current source is connected with the capacitor C in sequence, and the switch is connected with the capacitor C in parallel. In the compensation process of the chip, the size of the compensated slope can be controlled necessarily through the subtraction circuit and the voltage-controlled current source, so that a proper slope can be obtained.

Description

A chip with dynamic slope compensation function

technical field

The utility model relates to a chip with a dynamic slope compensation function.

Background technique

The applications of BUCK circuit clients vary widely. The peak current mode requires slope compensation when the duty cycle is greater than 50% to stabilize the system. What kind of slope compensation is used to adapt to the widest range of applications is a problem that requires in-depth research.

According to the principle of slope compensation, if the slope compensation is less, there will still be open-loop instability when the duty cycle is greater than 50%, but if the slope compensation is too much, the current mode control will change to voltage mode control. The advantages of current mode control are lost. Therefore, in the compensation process, it is necessary to control the size of the compensated slope to obtain a suitable slope.

Utility model content

The utility model provides a chip with a dynamic slope compensation function in order to solve the above problems. The chip is provided with a dynamic slope compensation circuit, and the dynamic slope compensation circuit includes: a subtraction circuit, a voltage-controlled current source, a capacitor C and A switch, the subtraction circuit, the voltage-controlled current source and the capacitor C are connected in sequence, and the switch is connected in parallel with the capacitor C.

Preferably, the subtraction circuit includes: a comparator U1, a resistor R1, a resistor R2, a resistor R3 and a resistor R4, the resistor R1 is connected to the inverting input terminal of the comparator U1, and the resistor R4 is connected to the Inverting input terminal and output terminal, the resistor R2 is connected to the non-inverting input terminal of the comparator U1, and the resistor R3 is grounded and connected to the non-inverting input terminal of the comparator U1.

Preferably, the voltage-controlled current source includes: a first-stage current source and a proportional mirror current source.

Preferably, the first stage current source includes: a resistor R6, a comparator U2 and a CMOS transistor Q1, the resistor R6 is grounded and connected to the inverting input terminal of the comparator U2 and the CMOS transistor Q1, and the comparator U1 The output end of the comparator U2 is connected to the non-inverting input end of the comparator U2, and the output end of the comparator U2 is connected to the CMOS transistor Q1.

Preferably, the proportional mirror current source includes: a comparator U3 and a CMOS transistor Q2, the CMOS transistor Q1 is connected to the non-inverting input terminal of the comparator U3, and the output terminal of the comparator U3 is connected to the CMOS transistor Q2, The CMOS transistor Q2 is connected to the capacitor C.

Preferably, the switch is a switch tube Q3.

The beneficial effect of the utility model is that: during the compensation process of the above-mentioned chip, the compensation slope can be controlled through the subtraction circuit and the voltage-controlled current source, so that a suitable slope can be obtained.

Description of drawings

Fig. 1 is the schematic diagram of the dynamic slope compensation involved in the utility model;

Fig. 2 is the circuit diagram of the dynamic slope compensation involved in the utility model;

FIG. 3 is a schematic diagram of voltage changes of the dynamic slope compensation involved in the present invention.

detailed description

Below in conjunction with accompanying drawing, the utility model is further elaborated:

As shown in Figure 1, a dynamic slope compensation circuit is provided on the chip, and the dynamic slope compensation circuit includes a subtraction circuit, a voltage-controlled current source, a capacitor C and a switch. Wherein, the subtraction circuit, the voltage-controlled current source and the capacitor C are connected in sequence, and the switch and the capacitor C are connected in parallel. The subtraction circuit is used to realize the subtraction operation; the voltage-controlled current source is used to charge the capacitor C with a constant current; the switch is used to realize the charging and discharging of the capacitor C; the capacitor C is grounded.

The working principle of the dynamic slope compensation circuit is as follows: the input voltage of the inverting input terminal of the subtraction circuit is Vin, and the input voltage of the non-inverting input terminal is Vout. After the voltage Vin and the voltage Vout pass through the subtraction circuit, the output voltage is Vout-0.5Vin. The voltage-controlled current source is controlled by the output voltage Vout-0.5Vin, so that the current of the voltage-controlled current source is controlled by the operation voltage Vout-0.5Vin. The capacitor C is charged by a voltage-controlled current source, and the charging voltage rises linearly due to constant current charging. The clock signal controls the charging and discharging of the capacitor C through the switch. When the clock signal is at a low level, the switch is turned off, and the capacitor is charged; when the clock signal is at a high level, the switch is closed, and the capacitor is discharged. As the cycle of the clock changes, a dynamically adjustable slope compensation signal controlled by the slope of the Vout-0.5Vin voltage can be obtained on the capacitor C.

Specifically, as shown in Figure 2, the subtraction circuit includes: a comparator U1, a resistor R1, a resistor R2, a resistor R3 and a resistor R4, the resistor R1 is input to Vin and connected to the inverting input terminal of the comparator U1, and the resistor R4 is connected to the comparator U1 The inverting input terminal and output terminal of the resistor R2 is input to Vout and connected to the non-inverting input terminal of the comparator U1, and the resistor R3 is grounded and connected to the non-inverting input terminal of the comparator U1. Wherein, R1=2×R4, R3=2×R2, and the output terminal of the comparator U1 outputs Vout-0.5Vin.

The voltage-controlled current source includes: a first-stage current source and a proportional mirror current source. The first-stage current source includes: a resistor R6, a comparator U2 and a CMOS transistor Q1, and the size of the first-stage current source is controlled by the voltage difference between Vout-0.5Vin. The resistor R6 is grounded and connected to the inverting input terminal of the comparator U2 and the CMOS transistor Q1, the output terminal of the comparator U1 is connected to the non-inverting input terminal of the comparator U2, and the output terminal of the comparator U2 is connected to the CMOS transistor Q1. After the first-stage current source, the current flowing through R6 is

The proportional mirror current source includes: comparator U3, CMOS transistor Q2, R5 and R7, and the proportional mirror current source charges the capacitor. The CMOS transistor Q1 is connected to the non-inverting input terminal of the comparator U3, the output terminal of the comparator U3 is connected to the CMOS transistor Q2, and the CMOS transistor Q2 is connected to the capacitor C. Adjusting R5 and R6 can adjust the size of the proportional mirror current source. After the proportional mirror current source, the current flowing through Q2 is

The switch is the switch tube Q3, the capacitor C is connected in parallel with the switch tube Q3, the switch tube Q3 is controlled by the circuit clock signal, the mirror current source charges and discharges the capacitor C under the clock control, and the slope signal compensation signal is obtained on the capacitor.

Using the current source to charge the capacitor, the slope compensation signal can be obtained on the capacitor, and the current source can be controlled by the input and output voltage difference, and the slope compensation signal with the slope change can be obtained. Provide a compensation slope as shown in Figure 3, whose slope is proportional to the difference between the output and input voltages, thereby effectively avoiding insufficient compensation or overcompensation caused by changes in the voltage difference. Among them, the solid line is the compensation slope in the worst case (the difference between the input and output voltages is the largest), and the dotted line is the corresponding compensation slope when the difference between the input and output voltages decreases. Superimpose this slope compensation signal on the current sampling signal to form a new current feedback control signal, which is input to one end of the current detection comparator in the UC3842 current-mode pulse width controller (PWM), and compared with the error voltage at the other end of the current detection comparator , output pulse signal with controllable width, so as to realize dynamic slope compensation.

During the compensation process of the above chip, the magnitude of the compensated slope can be controlled through the subtraction circuit and the voltage-controlled current source, so that a suitable slope can be obtained.

The above-described embodiments are only preferred examples of the utility model, and are not intended to limit the scope of implementation of the utility model, so all equivalent changes or modifications made according to the structure, features and principles described in the utility model patent scope , should be included in the utility model patent application scope.

Claims (6)

1. a kind of chip with dynamic slope compensation function, it is characterised in that the chip is provided with dynamic slope compensation electricity Road, the Dynamic Slope Compensation Circuit include：Subtraction circuit, voltage-controlled current source, electric capacity C and switch, it is the subtraction circuit, described Voltage-controlled current source and the electric capacity C are sequentially connected, and the switch is in parallel with the electric capacity C.

2. there is the chip of dynamic slope compensation function as claimed in claim 1, it is characterised in that subtraction circuit includes：Than Compared with device U1, resistance R1, resistance R2, resistance R3 and resistance R4, the resistance R1 connects the inverting input of the comparator U1, institute Inverting input and outfan that resistance R4 connects the comparator U1 are stated, the resistance R2 connects the homophase of the comparator U1 Input, the resistance R3 are grounded and connect the in-phase input end of the comparator U1.

3. there is the chip of dynamic slope compensation function as claimed in claim 2, it is characterised in that the voltage-controlled current source bag Include：First order current source and scaled mirror current source.

4. there is the chip of dynamic slope compensation function as claimed in claim 3, it is characterised in that the first order current source Including：Resistance R6, comparator U2 and CMOS tube Q1, the resistance R6 be grounded and connect the comparator U2 inverting input and CMOS tube Q1, the outfan of the comparator U1 connect the in-phase input end of the comparator U2, the output of the comparator U2 End connection CMOS tube Q1.

5. there is the chip of dynamic slope compensation function as claimed in claim 4, it is characterised in that the scaled mirror electric current Source includes：Comparator U3 and CMOS tube Q2, CMOS tube Q1 connect the in-phase input end of the comparator U3, the comparator The outfan of U3 connects CMOS tube Q2, and CMOS tube Q2 connects electric capacity C.

6. there is the chip of dynamic slope compensation function as claimed in claim 5, it is characterised in that the switch is switching tube Q3。