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CN205750958U - Coded lock based on FPGA - Google Patents

Coded lock based on FPGA Download PDF

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Publication number
CN205750958U
CN205750958U CN201620654639.6U CN201620654639U CN205750958U CN 205750958 U CN205750958 U CN 205750958U CN 201620654639 U CN201620654639 U CN 201620654639U CN 205750958 U CN205750958 U CN 205750958U
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circuit
fpga
module circuit
display
lock based
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CN201620654639.6U
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于斌
杨慧晶
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Harbin University of Science and Technology
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Harbin University of Science and Technology
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Abstract

一种基于FPGA的密码锁。早期的机械式密码锁存在密码量少、安全性差的缺点。一种基于FPGA的密码锁,其组成包括:FPGA系统,所述的FPGA系统(1)内部具有按键处理模块电路(1‑1)、主控CPU(1‑2)和译码显示电路(1‑3),所述的FPGA系统外部分别连接有开/关门模块电路(2)、报警模块电路(3)、键盘电路(5)、显示器(4)和WiFi接收控制模块电路6,所述的键盘电路通过导线连接按键处理模块电路,所述的按键处理模块电路连接主控CPU,所述的主控CPU连接译码显示电路,所述的译码显示电路连接显示器。本实用新型应用于安保领域,特别应用于基于FPGA的密码锁。

A combination lock based on FPGA. The early mechanical combination locks had the disadvantages of few passwords and poor security. An FPGA-based cipher lock, comprising: an FPGA system, wherein the FPGA system (1) has a key processing module circuit (1‑1), a main control CPU (1‑2) and a decoding display circuit (1 ‑3), the FPGA system is externally connected with an opening/closing module circuit (2), an alarm module circuit (3), a keyboard circuit (5), a display (4) and a WiFi receiving control module circuit 6, and the The keyboard circuit is connected to the key processing module circuit through wires, the key processing module circuit is connected to the main control CPU, the main control CPU is connected to the decoding display circuit, and the decoding display circuit is connected to the display. The utility model is applied to the field of security, in particular to a combination lock based on FPGA.

Description

基于FPGA的密码锁FPGA-Based Combination Lock

技术领域:Technical field:

本实用新型涉及安保领域,尤其涉及一种基于FPGA的密码锁。The utility model relates to the security field, in particular to an FPGA-based combination lock.

背景技术:Background technique:

密码锁的主要功能是用来对某些操作进行加密保护,目的是避免无权人员使用某些设施或者进行越权操作,它的实际应用十分广泛,例如门卡系统、自动售货机、银行自动柜员机或者保险柜中都含有这种密码锁;早期的机械式密码锁存在密码量少、安全性差的缺点,而在电子技术飞速发展的今天,具有防盗报警等功能的电子密码锁代替机械式密码锁已是必然趋势,电子密码锁具有机械锁无可比拟的优越性,它不但可以完成锁本身的功能,还可以有其他多种功能,如识别、报警等;由于电子密码锁具有的安全性高、功耗低、易操作等优点,使得它受到越来越多人的欢迎。The main function of the password lock is to encrypt and protect certain operations, the purpose is to prevent unauthorized personnel from using certain facilities or performing unauthorized operations. Its practical application is very extensive, such as door card systems, vending machines, bank ATMs Or all safes contain this kind of coded lock; the early mechanical coded locks had the disadvantages of less codes and poor security, and today, with the rapid development of electronic technology, electronic coded locks with functions such as anti-theft alarms replace mechanical coded locks It is an inevitable trend. The electronic combination lock has the unparalleled superiority of the mechanical lock. It can not only complete the function of the lock itself, but also have other functions, such as identification, alarm, etc.; , low power consumption, easy operation and other advantages, making it welcomed by more and more people.

发明内容:Invention content:

本实用新型的目的是提供一种基于FPGA的密码锁。The purpose of the utility model is to provide a combination lock based on FPGA.

上述的目的通过以下的技术方案实现:Above-mentioned purpose realizes by following technical scheme:

一种基于FPGA的密码锁,其组成包括:FPGA系统,所述的FPGA系统内部具有按键处理模块电路、主控CPU和译码显示电路,所述的FPGA系统外部分别连接有开/关门模块电路、报警模块电路、键盘电路、显示器和WiFi接收控制模块电路,所述的键盘电路通过导线连接按键处理模块电路,所述的按键处理模块电路连接主控CPU,所述的主控CPU连接译码显示电路,所述的译码显示电路连接显示器。A kind of combination lock based on FPGA, its composition comprises: FPGA system, described FPGA system interior has button processing module circuit, main control CPU and decoding display circuit, described FPGA system is connected with opening/closing module circuit respectively , an alarm module circuit, a keyboard circuit, a display and a WiFi receiving control module circuit, the keyboard circuit is connected to the key processing module circuit through wires, the key processing module circuit is connected to the main control CPU, and the main control CPU is connected to the decoding A display circuit, the decoding and display circuit is connected to a display.

所述的基于FPGA的密码锁,所述的FPGA系统和所述的WiFi接收控制模块电路分别连接电源系统电路,所述的WiFi接收控制模块电路通过无线网络连接手机。The FPGA-based combination lock, the FPGA system and the WiFi receiving control module circuit are respectively connected to the power system circuit, and the WiFi receiving control module circuit is connected to the mobile phone through a wireless network.

所述的基于FPGA的密码锁,所述的主控CPU采用型号为:EPF10K10LC84-4的模块芯片。In the FPGA-based combination lock, the main control CPU adopts a module chip with a model number of EPF10K10LC84-4.

本实用新型的有益效果:The beneficial effects of the utility model:

1.本实用新型的密码锁,采用FPGA控制系统,其特点是:体积小、功耗低、价格便宜、安全可靠、维修和升级十分方便,与可编程逻辑器件配合使用能够实现适时、智能管理功能,特别是在系统的扩展上有很好的优势,具有较好的应用前景。1. The combination lock of this utility model adopts the FPGA control system, and its characteristics are: small size, low power consumption, cheap price, safe and reliable, very convenient for maintenance and upgrading, and can realize timely and intelligent management when used in conjunction with programmable logic devices Function, especially in the expansion of the system has a good advantage, has a good application prospect.

本实用新型的密码锁,当密码输入正确时,其状态用LED指示灯模拟,其中用红灯灭,绿灯亮表示开锁;用红灯亮,绿灯熄灭表示关锁。Combination lock of the present utility model, when password input is correct, its state is simulated with LED indicator light, and wherein with red light off, and green light is on to represent unlocking;

本实用新型的密码锁,在密码锁主控CPU中储存一个可以修改的1~10位密码,当开锁按钮开关按下并且输入密码等于存储器储存值时实现开锁,否则一直关锁,并会导致报警。The combination lock of the present utility model stores a modifiable 1-10-digit password in the combination lock master control CPU, and realizes unlocking when the unlock button switch is pressed and the input password is equal to the value stored in the memory, otherwise the lock will be closed all the time, and will cause Call the police.

本实用新型的密码锁,如连续三次输入错误密码,电路自动处于自锁状态,使其无法再打开,并由扬声器发出持续20秒的报警信号,直到按复位键才允许再次输入密码。In the combination lock of the present invention, if the wrong password is input for three consecutive times, the circuit is automatically in a self-locking state, making it impossible to open again, and the speaker sends an alarm signal for 20 seconds, and the password is not allowed to be input again until the reset button is pressed.

本实用新型的密码锁,输入密码的第一个动作触发一个8秒定时器,若8秒钟内无确认开锁信号产生,则扬声器发出警告声音,并使得LED灯不断闪烁。In the password lock of the present utility model, the first action of inputting the password triggers an 8-second timer, and if there is no confirmation signal for unlocking within 8 seconds, the speaker emits a warning sound and the LED light continuously flashes.

本实用新型的密码锁,采用WiFi接收控制模块电路采用无线通信技术,不需要重新布线,使整个系统的安装和使用更为灵活、便捷,对身处异地的用户,可以采用手机对需保护的部位和使用的装置的密码锁的密码进行保护性修改,有利于对需要保护的部位和装置进行强化管理。The password lock of the utility model adopts the WiFi receiving control module circuit and adopts the wireless communication technology, and does not need to rewire, so that the installation and use of the whole system are more flexible and convenient. Protective modification of the passwords of the combination locks of the parts and devices used is conducive to strengthening the management of the parts and devices that need to be protected.

附图说明:Description of drawings:

附图1是本实用新型的结构示意图。Accompanying drawing 1 is the structural representation of the utility model.

附图2是本实用新型的EPF10K10LC84-4最小系统图。Accompanying drawing 2 is the minimum system diagram of EPF10K10LC84-4 of the present utility model.

附图3是本实用新型的电源电路示意图。Accompanying drawing 3 is the schematic diagram of the power supply circuit of the present utility model.

附图4是本实用新型的外部时钟电路示意图。Accompanying drawing 4 is the schematic diagram of the external clock circuit of the present utility model.

附图5是本实用新型的接口电路示意图。Accompanying drawing 5 is the interface circuit schematic diagram of the present utility model.

图中:1 — FPGA系统;1-1 —按键处理模块电路;1-2 —主控CPU;1-3 —译码显示电路;2 —开/关门模块电路;3 —报警模块电路;4 —显示器;5 —键盘电路;6 — WiFi接收控制模块电路;7 —电源系统电路;8 —手机;In the figure: 1 — FPGA system; 1-1 — button processing module circuit; 1-2 — main control CPU; 1-3 — decoding display circuit; 2 — door opening/closing module circuit; 3 — alarm module circuit; 4 — Display; 5 - keyboard circuit; 6 - WiFi receiving control module circuit; 7 - power system circuit; 8 - mobile phone;

具体实施方式:detailed description:

实施例1:Example 1:

一种基于FPGA的密码锁,其组成包括:FPGA系统,所述的FPGA系统1内部具有按键处理模块电路1-1、主控CPU1-2和译码显示电路1-,所述的FPGA系统外部分别连接有开/关门模块电路2、报警模块电路3、键盘电路5、显示器4和WiFi接收控制模块电路6,所述的键盘电路通过导线连接按键处理模块电路,所述的按键处理模块电路连接主控CPU,所述的主控CPU连接译码显示电路,所述的译码显示电路连接显示器。A kind of combination lock based on FPGA, its composition comprises: FPGA system, described FPGA system 1 inside has button processing module circuit 1-1, main control CPU1-2 and decoding display circuit 1-, described FPGA system outside Respectively connected with opening/closing module circuit 2, alarm module circuit 3, keyboard circuit 5, display 4 and WiFi receiving control module circuit 6, described keyboard circuit is connected to button processing module circuit by wire, and described button processing module circuit is connected A main control CPU, the main control CPU is connected to a decoding and display circuit, and the decoding and display circuit is connected to a display.

实施例2:Example 2:

根据实施例1所述的基于FPGA的密码锁,所述的FPGA系统和所述的WiFi接收控制模块电路分别连接电源系统电路8,所述的WiFi接收控制模块电路通过无线网络连接手机8。According to the combination lock based on FPGA described in Embodiment 1, the FPGA system and the WiFi receiving control module circuit are respectively connected to the power supply system circuit 8, and the WiFi receiving control module circuit is connected to the mobile phone 8 through a wireless network.

实施例3:Example 3:

根据实施例2所述的基于FPGA的密码锁,所述的主控CPU采用型号为:EPF10K10LC84-4的模块芯片。According to the combination lock based on FPGA described in Embodiment 2, the main control CPU adopts a module chip whose model is EPF10K10LC84-4.

实施例4:Example 4:

根据实施例2所述的基于FPGA的密码锁,其总体设计原理为:实现系统大量逻辑电路的集成,在设计中使用了现场可编程逻辑门阵列器件(FPGA);在系统中FPGA主要实现以下逻辑功能:键盘处理、译码显示、设置密码、解码开门以及报警等控制功能;系统设置有13个按键,包括0~9共10个数字键和1个确认键,1个报警复位键,1个清零键;(1)当通过键盘或通过手机输入正确的密码并按动确认键后,键盘和WiFi接收控制模块电路都会将正确的信息传递给按键处理模块电路,再经按键处理模块电路处理后传给主控CPU模块,再经主控CPU处理后传给开/关门模块电路,控制外围设备开门;(2)当通过键盘或通过手机输入错误的密码并按动确认键后,键盘和WiFi接收控制模块电路都会将错误的信息传递给按键处理模块电路,再经按键处理模块电路处理后传给主控CPU模块,再经主控CPU处理后传给开/关门模块电路,控制外围设备不开门,同时报警电路报警;(3)在门开的状态下,第一次输入新密码后再确认密码可设置密码,输入的密码在10位数码管上显示,最后输入的数字显示在最右边,每输入一位数字,密码在数码管上的显示左移一位,高位的零不用输入,因此密码可以为1~10位,初始密码为0,即上电后,按确认键即可开门;(4)门开后可通过锁门按钮关门,门关上后再次输入密码才能开门,在输入密码的过程中,当用户输入错误的密码时系统就会报警,由扬声器发出报警声,当连续三次出现错误密码时,则系统会长时间报警不止(20秒),这时必须按复位键方可停止。According to the combination lock based on FPGA described in embodiment 2, its overall design principle is: realize the integration of a large number of logic circuits in the system, and use a field programmable logic gate array device (FPGA) in the design; FPGA mainly realizes the following in the system Logic functions: keyboard processing, decoding display, password setting, decoding and opening, alarm and other control functions; the system has 13 keys, including 10 number keys from 0 to 9, 1 confirmation key, 1 alarm reset key, 1 (1) After entering the correct password through the keyboard or through the mobile phone and pressing the confirmation button, both the keyboard and the WiFi receiving control module circuit will pass the correct information to the key processing module circuit, and then the key processing module circuit will After processing, it is transmitted to the main control CPU module, and then transmitted to the opening/closing module circuit after being processed by the main control CPU to control the peripheral equipment to open the door; (2) When the wrong password is entered through the keyboard or through the mobile phone and the confirmation key is pressed, the keyboard And the WiFi receiving control module circuit will pass the wrong information to the button processing module circuit, and then pass it to the main control CPU module after being processed by the key processing module circuit, and then pass it to the opening/closing module circuit after being processed by the main control CPU to control the peripheral The device does not open the door, and the alarm circuit alarms at the same time; (3) When the door is open, the password can be set after entering the new password for the first time and then confirming the password. The entered password is displayed on the 10-digit digital tube, and the last entered number is displayed on the On the far right, every time a digit is input, the display of the password on the digital tube will move one digit to the left, and the high digit zero does not need to be input, so the password can be 1~10 digits, and the initial password is 0, that is, after power on, press the confirm button The door can be opened; (4) After the door is opened, the door can be closed by the lock button, and the door can only be opened by entering the password again after the door is closed. In the process of entering the password, when the user enters the wrong password, the system will alarm, and the alarm will sound from the speaker. When the wrong password appears three times in a row, the system will alarm for a long time (20 seconds), and the reset button must be pressed to stop.

Claims (3)

1. a coded lock based on FPGA, its composition includes: FPGA system, it is characterized in that: the internal tool of described FPGA system There are keystroke handling modular circuit, master cpu and coding display circuit, outside described FPGA system, are connected to opening-closing door Modular circuit, alarm module circuitry, keyboard circuit, display and WiFi receive control module circuit, and described keyboard circuit leads to Crossing wire and connect keystroke handling modular circuit, described keystroke handling modular circuit connects master cpu, and described master cpu is even Connecing coding display circuit, described coding display circuit connects display.
Coded lock based on FPGA the most according to claim 1, is characterized in that: described FPGA system and described WiFi Receiving control module circuit and connect power system circuit respectively, described WiFi receives control module circuit by wireless network even Catcher machine.
Coded lock based on FPGA the most according to claim 2, is characterized in that: described master cpu employing model is: The module chip of EPF10K10LC84-4.
CN201620654639.6U 2016-06-28 2016-06-28 Coded lock based on FPGA Expired - Fee Related CN205750958U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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CN205750958U true CN205750958U (en) 2016-11-30

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Granted publication date: 20161130

Termination date: 20170628