CN205388622U - Measurement device for power factor - Google Patents

Abstract

The utility model discloses a measurement device for power factor, utilize the voltage for the measurement of same looks, current transformer's secondary current becomes through resistance switching, and the sinusoidal voltage wave form signal that the filtering harmonic interference of process electronic circuit etc. Handled, be voltage transformer, time difference during current transformer's secondary sinusoidal waveform signal zero passage and regard as memory address directly to acquire the measuring device of the power factor value among the corresponding memory cell of memory with this time difference, be applicable to different occasions and introduced three kinds, power factor measurement device leading or that lag behind and instruct has.

Description

A kind of measurement apparatus of power factor

Technical field

This utility model relates to the measurement apparatus of a kind of power factor, particularly relates to the power frequency single-phase power factor measurement apparatus of a kind of numerical monitor.

Background technology

Power factorIt it is one of important parameter in AC electric power systems.Immediately the power factor value, accurately measuring each cycle is the top priority of electric measurement equipment.The existing instrument and meter being applied to the measurement of electric power factor is substantially two big classes, and a class is to adopt traditional pointer-type, dial insrument measurement and show, does not only exist bigger error, is also significantly not suitable with the requirement of modern digital；Another kind of is the instrument and meter adopting semiconductor components and devices, integrated circuit or single-chip microcomputer to constitute, and according to the modernization measurement apparatus being differently formed principle, configurations to signal, data processing method, be the direction of current application trend and digital development.But, these modern instrument and meters, measurement apparatus measuring method in, have plenty of and become square-wave signal by two-way being inputted the shaped circuit conversion of signal, square-wave signal is obtained string pulse after XOR processes, then through obtaining the DC voltage that is directly proportional to phase contrast after rectifying and wave-filtering, complete phase-detection, then phase signal is simulated-numeral conversion (ADC) and cos operation, obtains power factor value；Have plenty of and obtain power factor value with look-up table (cosine table) after trying to achieve phase difference angle；What have is then the powerfactorcosφ value drawing circuit by simulating multiplication and division circuit computing；What also have adopts the many methods in phase detection techniques, the complexity of its application conditions, measurement scope, certainty of measurement and hardware, software is all had nothing in common with each other, but that final acquisition is all the phase contrast between electric current, two signals of voltage and phase angle difference φ, phase contrast is converted to powerfactorcosφ value, also need to one-chip computer and be calculated could really obtaining concrete power factor value again by calling the software program calculating power factor, this increases the amount of calculation of single-chip microcomputer undoubtedly, take the use time of single-chip microcomputer more, reduce its work efficiency.In short, at present power-factor measurement method or apparatus be required for the phase contrast obtained by being again converted into power factor value such as aforesaid various indirectly modes, and this measurement result of power factor value cannot be obtained with directly settling at one go.

Summary of the invention

The purpose of this utility model is in that to overcome the deficiencies in the prior art, a kind of power-factor measurement device directly, settled at one go is provided, and need not again through indirectly mode or call, by single-chip microcomputer, the software program calculating power factor and be calculated obtaining the final result of power-factor measurement, the measurement making power frequency single-phase power factor is more rapid, accurate.

The technical solution adopted in the utility model is: the measurement apparatus of a kind of power factor, the voltage of this measurement apparatus input and the measurement voltage of electric current two signals respectively same phase, the secondary current of current transformer converts to through resistance, and through the sinusoidal voltage waveform signal filtering the process such as harmonic wave interference of electronic circuit, referred to as voltage transformer, the quadratic sine waveshape signal of current transformer, the measurement apparatus of described power factor includes first, two, three, four circuit units, 12nd circuit unit and a time data application module, H in conversion table is stored with binary-coded decimal formTwo electrically erasable programmable ROMs of the address wire parallel connection of value are connected in time data application module；

Wherein, the circuit structure of first and second circuit unit, components and parts and parameter thereof are identical, are that the voltage of input, Current Transformer Secondary sine wave-shaped signal are converted to the circuit that the square-wave signal of Transistor-Transistor Logic level exports respectively,

First circuit unit includes forward voltage follower U₁, there is the voltage comparator U of open-loop gain₄, resistance R₄、R₅、R₈、R₉, electric capacity C₁, diode D₁, diode D₂, have the NAND gate U of Schmidt trigger₆And U₈, its connection be that the quadratic sine waveshape signal of voltage transformer accesses U₁In-phase input end, U₁Inverting input and U₁Outfan be connected, U₁Outfan and R₄One end be connected, R₄The other end and U₄In-phase input end be connected, R₅The other end and U₄Inverting input be connected, U₄Outfan and R₈One end be connected, R₈The other end and R₉One end be connected, R₉The other end connect simulation ground, C₁And R₉Parallel connection, R₈The other end and U₆Two inputs be connected, diode D₁Input and U₆Two inputs be connected, D₁Outfan connection+5V, D₂Outfan connect D₁Input, D₂Input connect digitally, U₆Outfan and U₈Two inputs be connected, U₈Outfan be the outfan of the first circuit unit, the rectangular wave pulse signal of its output high level；

Second circuit unit includes forward voltage follower U₃, there is the voltage comparator U of open-loop gain₅, resistance R₆、R₇、R₁₀、R₁₁, electric capacity C₂, diode D₃, diode D₄, have the NAND gate U of Schmidt trigger₇And U₉, its connection is, the quadratic sine waveshape signal of current transformer accesses U₃In-phase input end, U₃Inverting input and U₃Outfan be connected, U₃Outfan and R₆One end be connected, R₆The other end and U₅In-phase input end be connected, R₇The other end and U₅Inverting input be connected, U₅Outfan and R₁₀One end be connected, R₁₀The other end and R₁₁One end be connected, R₁₁The other end connect simulation ground, C₂And R₁₁Parallel connection, R₁₀The other end and U₇Two inputs be connected, diode D₃Input and U₇Two inputs be connected, D₃Outfan connection+5V, D₄Outfan connect D₃Input, D₄Input connect digitally, U₇Outfan and U₉Two inputs be connected, U₉Outfan be the outfan of second circuit unit, the rectangular wave pulse signal of its output high level；

Third circuit unit is that a zero-point voltage adjusts circuit unit, and it includes voltage follower U₂, adjustable resistance R₁, resistance R₂、R₃, its connection is, adjustable resistance R₁One end connection+15V, other end connection-15V, adjustable resistance R₁Adjustable end connect R₂One end, R₂The other end connect R₃One end, R₃The other end connect simulation ground, R₂The other end and U₂In-phase input end be connected, U₂Inverting input and U₂Outfan be connected, U₂The output of outfan be divided into two-way, the R of a road and the first circuit unit₅One end be connected, R₅The other end and U₄Inverting input be connected, the R of another road and second circuit unit₇One end be connected, R₇The other end and U₅Inverting input be connected；

4th circuit unit is by AND circuit U₁₀With OR circuit U₁₁Constituting, its connection is, U₈Outfan connect U₁₀Input 1_INAnd U₁₁Input 4 end foot；U₉Outfan connect U₁₁Input 2_INAnd U₁₀Input 3 end foot；

12nd circuit unit is one and carrys out the circuit that indicated horsepower factor is advanced, delayed by LED, and it includes 4 bidirectional shift register U₁₆, two gate circuit U in hex inverter₁₃、U₁₄, resistance R₁₂、R₁₃, green LED lamp D that an instructed voltage is advanced₅, red LED lamp D that an indicator current is advanced₆With resistance R₁₄, electric capacity C₃And a pulse-delay unit；U₁₁Outfan output signal after the delay of this pulse-delay unit microsecond a little, be input to U₁₆11 feet, i.e. CP end, namely can determine whether and make advanced or delayed lamplight pointing red, green intercepting the precedence in voltage, both electric currents signal, the components and parts of pulse-delay unit include an OR circuit U₂₁, two OR-NOT circuit U₂₃、U₂₄, a gate circuit U in hex inverter₂₂With resistance R₁₆, electric capacity C₅；The connection of pulse-delay unit is, U₁₁Outfan connect U respectively₂₁Two inputs, U₂₁Outfan and R₁₆One end be connected, R₁₆The other end respectively with U₂₃An input and C₅One end be connected, C₅The other end connect digitally, U₂₃Another input and U₂₄Outfan be connected, U₂₃Outfan and U₂₄An input be connected, U₂₂Input and U₂₁Outfan be connected, U₂₂Outfan and U₂₄Another input be connected, U₂₄Outfan be the outfan of pulse-delay unit, this outfan is connected to U₁₆11 feet, i.e. CP end；

U in 12nd circuit unit₁₆3 feet and U₈Outfan be connected, U₁₆5 feet and U₉Outfan be connected, U₁₆1,9,10 foot and R₁₄One end be connected, R₁₄The other end be connected with+5V, R₁₄One end also and C₃One end be connected, C₃The other end connect digitally, U₁₆15 feet and U₁₃Input be connected, U₁₃Outfan and green LED lamp D₅Negative pole be connected, D₅Positive pole pass through R₁₂It is connected with+5V, U₁₆13 feet and U₁₄Input be connected, U₁₄Outfan and red LED lamp D₆Negative pole be connected, D₆Positive pole pass through R₁₃It is connected with+5V；

One time data application module, stores H in conversion table with binary-coded decimal formTwo electrically erasable programmable ROMs of the address wire parallel connection of value are connected in this time data application module.This time data application module has two kinds of application forms: when power-factor measurement device is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, and device is called measurement type power-factor measurement device；When power-factor measurement device is applied to accuracy of measurement is required higher AC energy metering occasion, the time data application module in measurement apparatus adopts metering type time data application module, and device is called metering type power-factor measurement device；

When power-factor measurement device is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, it includes the five, the six, seven, eight, nine, ten, 11 circuit units；

5th circuit unit is 10MHZ pulses generation and very frequency circuit, and the 1MHZ pulse of its output is input to the 6th circuit unit, and described 5th circuit unit includes 10MHZ crystal oscillator, hex inverter U₃₀, decimal scale coincidence counter U₂₉, resistance R₁₇、R₁₈、R₁₉, electric capacity C₆, its connection is, hex inverter U₃₀The 1st, connect resistance R between 2 feet₁₈, U₃₀The 3rd, connect R between 4 feet₁₉, U₃₀The 2nd, connect C between 3 feet₆, U₃₀The 1st, connect 10MHZ crystal oscillator, U between 4 feet₃₀The 2nd foot and the 13rd foot be connected, U₃₀The 12nd foot and decimal scale coincidence counter U₂₉The 2nd foot CP end be connected, U₂₉The 1st, 7,9 and 10 feet by resistance R₁₇It is connected with+5V power supply, U₂₉The 15th foot output 10MHZ 1MHZ pulse after very frequency, namely every microsecond is 1 pulse；

6th circuit unit is by four tetrad coincidence counter U₂₅、U₂₆、U₂₇、U₂₈16 binary time pulse counting circuits of be connected in sequence, its output be one by zero, be incremented by 16 bits of 1us every time, first, left side in these four enumerators, i.e. U₂₅The 14th foot be output 16 bits in lowest order, first, right side in these four enumerators, i.e. U₂₈The 11st foot be output 16 bits in highest order, its connection is, U₂₅The 15th foot connect U₂₆The 10th foot, U₂₆The 15th foot connect U₂₇The 10th foot, U₂₇The 15th foot connect U₂₈The 10th foot, the 2nd foot CP end and U of four enumerators₂₉The 15th foot be connected, the 7th of four enumerators the, 9 feet and U₂₅The 10th foot by resistance R₁₇It is connected with+5V power supply, the 1st foot of four enumeratorsThe U of end and the 4th circuit unit₁₁Outfan be connected；

7th circuit unit is a maintenance impulse circuit, by 42 inputs and door U₃₅In AND circuit constitute；Described maintenance impulse circuit is the time that temporary sampling time data at least keep 20ms, i.e. a cycle, and the condition of the setting of maintenance impulse circuit is,The time that pulse occurs is kept to should be between 5000us to the 10ms after time counting circuit starts counting and as far as possible near this side of 5000us,It is as far as possible few that hardware used during this maintenance pulse is set；After relatively, decimal number 5120 is selected according to aforementioned condition, its method to set up is, decimal number 5120 convert to binary number, namely 0001,0100,0000,0000, when after time counting circuit starts, the 11st of this binary number the, 13 represent that count value is decimal numeral 5120 when there is high level simultaneously；Its connection is, U₃₅1 foot and the 6th circuit unit in U₂₇12 feet be connected, U₃₅2 feet and U₂₈14 feet be connected, U₃₅3 feet be the outfan of the 7th circuit unit, it is connected with the CP end of the 9th four depositors of circuit unit；

8th circuit unit be four being incorporated to-and go out 4 bidirectional shift register U that mode works₃₁、U₃₂、U₃₃、U₃₄The time data buffering circuit being in turn connected into, its connection is, 16 data input pin one_to_one corresponding of four depositors totally 16 data output ends and the 9th circuit units are connected；16 data output end one_to_one corresponding of four depositors totally 16 data input pins and the 6th circuit units are connected, four depositorsEnd and the 4th circuit unit U₁₁Outfan be connected, the CP end of four depositors and the 4th circuit unit U₁₀Outfan be connected, the 9th of four depositors the, 10 feet connect resistance R₂₀One end, R₂₀The other end and+5V power supply connect, R₂₀One end pass through C₇Connect digitally；

9th circuit unit be four being incorporated to-and go out 4 bidirectional shift register U that mode works₃₆、U₃₇、U₃₈、U₃₉The time data holding circuit being in turn connected into, its connection is, front 13 13 articles of address line end foot one_to_one corresponding sequentially in parallel with two memorizeies of the tenth circuit unit in four depositor totally 16 data output ends are connected, 16 data output end one_to_one corresponding of four depositors totally 16 data input pins and the 8th circuit units are connected, the CP end of four depositors and the 7th circuit unit U₃₅3 feet be connected, the 1st of four depositors the, 9,10 feet and resistance R₂₀One end be connected, R₂₀The other end and+5V power supply connect, R₂₀One end pass through C₇Connect digitally；

Tenth circuit unit is arranged to the electrically erasable programmable ROM U of two 8K × 8 of read-only working method₄₀And U₄₁, two Memory Storage Units have adopted the H that the form of four binary-decimal binary-coded decimals is stored in conversion table individualValue；Its connection is, U₄₀And U₄₁Each 13 address wire A₀～A₁₂In parallel and be connected with front 13 data output end sequentially one_to_one corresponding of the 9th circuit unit, U₄₀And U₄₁The 20th, 22 feet pass through R₂₁Connect digitally, U₄₀And U₄₁The 27th foot pass through R₂₂Connect+5V power supply, U₄₀And U₄₁The data-out port line I/O of two memorizeies₀～I/O₇Totally 16 articles are connected with the 11st circuit unit correspondence；

11st circuit unit is used to the power factor that display is testedValue, it includes BCD-seven-segment decoder/driver U₄₂、U₄₃、U₄₄、U₄₅；Current-limiting resistance R₂₃×7、R₂₄×7、R₂₅×7、R₂₆×7；Seven sections of common-anode nixie display U₄₆、U₄₇、U₄₈、U₄₉；Wherein U₄₂、U₄₃、U₄₄、U₄₅The input of respective 7,1,2,6 feet totally 16 end foot composition the 11st circuit units, the data-out port line I/O of these 16 end foot memorizeies in parallel with two address wires of the tenth circuit unit respectively connects one to one；

When power-factor measurement device is applied to accuracy of measurement is required higher AC energy metering occasion, the time data application module in measurement apparatus adopts metering type time data application module, and this module includes an XOR gate U₁₀₁, a piece of crystal oscillator frequency at that time be the single-chip microcomputer 8031 i.e. U of 12MHZ₁₀₂, three eight rising edge d type flip flop U₁₀₃、U₁₀₄、U₁₀₅With the H stored with binary-coded decimal form in conversion tableTwo memorizer U that the address wire of value is in parallel₄₀、U₄₁, single-chip microcomputer 8031 passes through P₀Mouth extension delivery outlet, utilizes two memorizeies of three eight rising edge d type flip flops and the parallel connection of this address wire to be attached, and the concrete connection of its circuit is: the U of the 4th circuit unit₁₀Outfan 1_OUTAnd U₁₀₁The 1st foot be connected, the U of the 4th circuit unit₁₁Outfan 2_OUTAnd U₁₀₁The 2nd foot and single-chip microcomputer U₁₀₂'sI.e. U₁₀₂The 13rd foot and the 12nd circuit unit in the U of pulse-delay unit₂₁Two inputs be connected, U₁₀₁The 3rd foot and U₁₀₂'sI.e. U₁₀₂The 12nd foot be connected；null8 end feet of single-chip microcomputer P0 mouth line are ascending by number、Namely it is connected by 8 data input pin 1D～8D of the order of P0.0 to P0.7 sequentially correspondingly with the first eight rising edge d type flip flop，8 data input pin 1D～8D of 8 data output end 1Q of first eight rising edge d type flip flop～8Q correspondingly with the second eight rising edge d type flip flop are connected，8 data input pin 1D～8D parallel connections of 8 data input pin 1D～8D sequentially correspondingly with the first eight rising edge d type flip flop of the 3rd eight rising edge d type flip flops are connected，The address line end foot of 8 data output end 1Q～8Q of the 3rd eight rising edge d type flip flops and low eight of first memorizer is ascending by number、Namely sequentially it is attached correspondingly by the order of A0 to A7，1Q～5Q and the address line end foot of high five of first memorizer in 8 data output ends of second eight rising edge d type flip flop are ascending by number、Namely sequentially it is attached correspondingly by the order of A8 to A12，16th foot of single-chip microcomputer、NamelyEnd foot and the 11st foot of three eight rising edge d type flip flops, i.e. CP end foot are connected, the 1st foot of the 27th foot of single-chip microcomputer, i.e. P2.6 foot and first eight rising edge d type flip flop, namelyEnd foot is connected, and the 28th foot of single-chip microcomputer, i.e. P2.7 foot are simultaneously and the 1st foot of second and third eight rising edges d type flip flop, namelyEnd foot is connected, and the address line end foot A0～A12 of second memorizer and the address line end foot A0～A12 of first memorizer carries out the connection of parallel connection correspondingly；Set the address date of 16 bits of two bytes of single-chip microcomputer P0 mouth output be arranged in order to highest order by lowest order, point secondary, each byte deliver to 8 data input pins of eight rising edge d type flip flops, wherein first time delivers to the address that the data of first eight 8 data input pin of rising edge d type flip flop are high bytes, till this address date plays sixteen bit from the 9th of this 16 bit the, successively, the 9th corresponding to the 1D of eight 8 data input pins of rising edge d type flip flop, the tenth corresponding to 2D ... sixteen bit corresponding to 8D；Second time delivers to the address that the data of the 3rd eight 8 data input pins of rising edge d type flip flop are low bytes, till this address date plays the 8th from first of this 16 bit, first successively corresponds to 8D corresponding to the 1D of eight 8 data input pins of rising edge d type flip flop, second corresponding to 2D ... the 8th；The address end foot A0～A12 of 13 binary storage device address codes that the two byte address data that point secondary is sent arrange from low to high in order at the data output end interruption-forming one of the 3rd, second eight rising edge d type flip flops and the data-out port 1Q～8Q of the 3rd eight rising edge d type flip flops and the data-out port 1Q～5Q of second eight rising edge d type flip flop and address wire two memorizeies in parallel has annexation one to one.

Described metering type time data application module also includes that peripheral component and circuit, peripheral component and circuit include circuit that 8D latch 74LS373 with ternary output connects the off-chip program storage of extension with single-chip microcomputer 8031, frequency is the display circuit of circuit, BCD-seven-segment decoder/driver for needed for instant playback power factor data, current-limiting resistance and seven sections of common-anode LED nixie display connections that the time crystal oscillator of 12MHZ is connected with single-chip microcomputer 8031.

When described device adopts metering type time data application module, then it is made to become measurement type time data application module interlock circuit one amendment of do of this metering type time data application module: namely, to disconnect U₁₁Outfan 2_OUTWith single-chip microcomputer U₁₀₂13rd foot, namelyBetween connecting line.

This utility model adopts above technical scheme, use measurement voltage, current transformer secondary current through resistance convert to and through the quadratic sine waveshape signal input measurement device filtering sinusoidal voltage waveform signal that harmonic wave interference etc. processes, i.e. voltage transformer, current transformers of electronic circuit, eliminate wave distortion and the noise jamming of measured signal, it is ensured that sine wave-shaped signal is zero crossing accurately；By power factor calculating formula being calculated, the power factor numerical value obtained is compiled into table and the numerical value in this table being stored in memory, in using then zero passage accurate by voltage, two signals of electric current time the pulse collection that produces to correct time difference or perhaps time counting value, and directly read the method for power factor value in memorizer respective memory unit to overcome the deficiency being required for calculating, obtain power factor value again by indirectly mode in current power factor measuring method using this time difference or time counting value as storage address；The frequency of electrical network is carried out instant tracing detection, the minor shifts of its appearance is implemented correction by application single-chip microcomputer simultaneously, guarantee that the single-phase power factor of each cycle exports with numerical value accurately, by numeral method, and instant indicated horsepower factor is advanced or delayed, not only accurately but also facilitate.This utility model has obvious technical advantage, can promote developing further and producing significant social economic effect of power-factor measurement technology undoubtedly.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, this utility model is described in further details；

The structured flowchart of measurement apparatus during Fig. 1 this utility model employing measurement type time data application module；

One of circuit diagram of measurement apparatus of a kind of power factor of Fig. 2 this utility model；

The two of the circuit diagram of the measurement apparatus of a kind of power factor of Fig. 3 this utility model；

The three of the circuit diagram of the measurement apparatus of a kind of power factor of Fig. 4 this utility model；

The four of the circuit diagram of the measurement apparatus of a kind of power factor of Fig. 5 this utility model；

The waveform diagram of A, B, C, D, E, F, G each point in Fig. 6 this utility model measurement apparatus.

Detailed description of the invention

As shown in one of Fig. 1 to 6, the measurement apparatus of power factor in this utility model one, the voltage of this measurement apparatus input and the measurement voltage of electric current two signals respectively same phase, the secondary current of current transformer converts to through resistance, and through the sinusoidal voltage waveform signal filtering the process such as harmonic wave interference of electronic circuit, referred to as voltage transformer, the quadratic sine waveshape signal of current transformer, it includes first, two, three, four circuit units, 12nd circuit unit and a time data application module, 5000 in conversion table are stored with binary-coded decimal formTwo electrically erasable programmable ROMs of the address wire parallel connection of value are connected in time data application module；This time data application module has two kinds of application forms: when power-factor measurement device is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, and device is called measurement type power-factor measurement device；When the power-factor measurement device applying this utility model power-factor measurement method is applied to accuracy of measurement is required higher AC energy metering occasion, time data application module in measurement apparatus adopts metering type time data application module, and device is called metering type power-factor measurement device；

As shown in Figure 2, wherein, the circuit structure of first and second circuit unit, components and parts and parameter thereof are identical, being that the voltage of input, Current Transformer Secondary sine wave-shaped signal are converted to the circuit that the square-wave signal of Transistor-Transistor Logic level exports respectively, the voltage of its input, Current Transformer Secondary sine wave-shaped signal access via the forward voltage follower in first and second circuit unit respectively to be had the voltage comparator of open-loop gain and is followed by Transistor-Transistor Logic level conversion interface circuit.The quadratic sine waveshape signal of measurement voltage transformer is input to the 1 of the first circuit unit_INEnd, the quadratic sine waveshape signal of Verification of Measuring Current Transformer is input to the 1 of second circuit unit_INEnd；The outfan of first and second circuit unit is then divided into three tunnel outputs the square-wave signal of the Transistor-Transistor Logic level converted to respectively: the signal output of the first circuit unit is divided into three tunnels, and a road is input to the 1 of the 4th circuit unit_INEnd and U₁₀1_INEnd, a road is input to 4 feet and the U of the 4th circuit unit₁₁4 feet, also have a road be input to the depositor U in the 12nd circuit unit₁₆The 3rd foot；The signal output of second circuit unit is divided into three tunnels, and a road is input to the 2 of the 4th circuit unit_INEnd and U₁₁2_INEnd, a road is input to 3 feet and the U of the 4th circuit unit₁₀3 feet, also have a road be input to the depositor U in the 12nd circuit unit₁₆The 5th foot；

First circuit unit includes with amplifier OP-07 as forward voltage follower U₁, with OP-37 as the voltage comparator U with open-loop gain₄, resistance R₄、R₅、R₈、R₉, electric capacity C₁, diode D₁、D₂, also include U₆And U₈, U₆And U₈Being have a gate circuit in 42 input nand gate 74LS132 of Schmidt trigger respectively, its connection is, the quadratic sine waveshape signal of voltage transformer accesses U₁In-phase input end that is 1_INEnd, U₁Inverting input be connected with its outfan, U₁Outfan and resistance R₄One end be connected, R₄The other end and U₄In-phase input end be connected, resistance R₅The other end and U₄Inverting input that is 2_INEnd foot is connected, U₄Outfan and resistance R₈One end be connected, R₈The other end and R₉One end be connected, R₉The other end connect simulation ground, electric capacity C₁And R₉Parallel connection, C₁And R₉The filter capacity accessing use energy intensifier circuit in parallel, R₈The other end also and U₆Two inputs be connected, diode D₁Input and U₆Two inputs be connected, D₁Outfan connection+5V, D₂Outfan connect D₁Input, D₂Input connect digitally, U₆Outfan and U₈Two inputs be connected, U₈Outfan be the outfan of the first circuit unit, its outfan respectively with the 4th circuit unit U₁₀1_INEnd, U₁₁4 feet and the 12nd circuit unit in U₁₆The 3rd foot be connected；

Second circuit unit includes with amplifier OP-07 as forward voltage follower U₃, with OP-37 as the voltage comparator U with open-loop gain₅, resistance R₆、R₇、R₁₀、R₁₁, electric capacity C₂, diode D₃、D₄, also include U₇And U₉, U₇And U₉Being have a gate circuit in 42 input nand gate 74LS132 of Schmidt trigger respectively, its connection is, the quadratic sine waveshape signal of current transformer accesses U₃In-phase input end that is 1_INEnd, U₃Inverting input be connected with its outfan, U₃Outfan and resistance R₆One end be connected, R₆The other end and U₅In-phase input end be connected, resistance R₇The other end and U₅Inverting input that is 2_INEnd foot is connected, U₅Outfan and resistance R₁₀One end be connected, R₁₀The other end and R₁₁One end be connected, R₁₁The other end connect simulation ground, electric capacity C₂And R₁₁Parallel connection, C₂And R₁₁The filter capacity accessing use energy intensifier circuit in parallel, R₁₀The other end also and U₇Two inputs be connected, diode D₃Input and U₇Two inputs be connected, D₃Outfan connection+5V, D₄Outfan connect D₃Input, D₄Input connect digitally, U₇Outfan and U₉Two inputs be connected, U₉Outfan be the outfan of second circuit unit, its outfan respectively with the 4th circuit unit U₁₁2_INEnd, U₁₀3 feet and the 12nd circuit unit in U₁₆The 5th foot be connected；

As in figure 2 it is shown, third circuit unit is a zero-point voltage adjusts circuit unit, it includes with amplifier OP-07 as voltage follower U₂, adjustable resistance R₁, resistance R₂、R₃, its connection is, adjustable resistance R₁One end connection+15V, the other end connection-15V, R₁Adjustable end connect R₂One end, R₂The other end connect R₃One end, R₃The other end connect simulation ground, R₂The other end and U₂In-phase input end be connected, U₂Inverting input and U₂Outfan be connected, U₂Outfan be divided into two-way, a road and the first circuit unit R₅One end be connected, R₅The other end and U₄Inverting input that is 2_INIt is connected, another road and second circuit unit R₇One end be connected, R₇The other end and U₅Inverting input that is 2_INIt is connected；

As in figure 2 it is shown, the 4th circuit unit is by 42 inputs and an AND circuit U in door integrated circuit 74LS08₁₀With an OR circuit U in 42 inputs or door integrated circuit 74LS32₁₁Constituting, it has four inputs 1_IN、2_IN, 3 feet, 4 feet and two outfans 1_OUTWith 2_OUT, the 4th circuit unit input 1_INNamely it is U₁₀Input 1_IN, namely the 4th circuit unit input 3 foot is U₁₀Input 3 foot, the 4th circuit unit input 2_INNamely it is U₁₁Input 2_IN, namely the 4th circuit unit input 4 foot is U₁₁Input 4 foot, two outfan respectively U₁₀Outfan 1_OUTAnd U₁₁Outfan 2_OUT；

The connection of four inputs of the 4th circuit unit is, U₈Outfan and U₁₀Input 1_INAnd U₁₁4 feet be connected；U₉Outfan and U₁₁Input 2_INAnd U₁₀3 feet be connected；

As shown in Fig. 3 or Fig. 5, two outfans of the 4th circuit unit have two kinds of connections, as it is shown on figure 3, when the 4th circuit unit is applied in the measurement apparatus adopting measurement type time data application module, its connection is, the 4th circuit unit U₁₀Outfan 1_OUTWith four U being sequentially connected with in the 8th circuit unit₃₁、U₃₂、U₃₃、U₃₄The 11st foot, namely CP end be connected, the 4th circuit unit U₁₁Outfan 2_OUTIt is divided into three tunnels, respectively with four U being sequentially connected with in the 6th circuit unit₂₅、U₂₆、U₂₇、U₂₈The 1st foot, namelyEnd is connected, and four U being sequentially connected with in the 8th circuit unit₃₁、U₃₂、U₃₃、U₃₄The 1st foot, namelyEnd is connected, and the input of pulse-delay unit in the 12nd circuit unit, i.e. U₂₁1,2 feet be connected；

As it is shown in figure 5, when the 4th circuit unit is applied in the measurement apparatus adopting metering type time data application module, its connection is, the 4th circuit unit U₁₀Outfan 1_OUTWith a gate circuit U in 74LS86 XOR gate₁₀₁1 foot be connected, the 4th circuit unit U₁₁Outfan 2_OUTIt is divided into three tunnels, respectively and U₁₀₁2 feet be connected, and single-chip microcomputer 8031, i.e. U₁₀₂'sNamely the 13rd foot is connected, and the input of pulse-delay unit in the 12nd circuit unit, i.e. U₂₁1,2 feet be connected；

As in figure 2 it is shown, the 12nd circuit unit is one carrys out the circuit that indicated horsepower factor is advanced, delayed by LED, it mainly includes a U₁₆, i.e. two gate circuit U in 4 bidirectional shift register 74LS194,74LS04 phase inverters₁₃、U₁₄, current-limiting resistance R₁₂、R₁₃, green LED LED D that an instructed voltage is advanced₅, red light emitting diodes LED D that an indicator current is advanced₆With resistance R₁₄, electric capacity C₃And a pulse-delay unit；This pulse-delay unit is the 4th circuit unit U₁₁Outfan 2_OUTU it is input to again after the delay of the signal microsecond a little of output₁₆11 feet, i.e. CP end, namely can determine whether and make advanced or delayed lamplight pointing red, green intercepting the precedence in voltage, both electric currents signal, the components and parts of pulse-delay unit include, a gate circuit U in 42 inputs or door integrated circuit 74LS32₂₁, 74L,S02 42 inputs two gate circuit U in nor gate integrated circuit₂₃、U₂₄, a gate circuit U in 74LS04 hex inverter integrated circuit₂₂With resistance R₁₆, electric capacity C₅；The connection of pulse-delay unit is, U₁₁Outfan 2_OUTAnd U₂₁1,2 feet be connected, U₂₁Outfan 3 foot and phase inverter U₂₂Input and resistance R₁₆One end be connected, U₂₂Outfan and U₂₄2 feet be connected, R₁₆The other end and U₂₃1 foot and electric capacity C₅One end be connected, C₅The other end connect digitally, U₂₃2 feet and U₂₄Outfan 3 foot be connected, U₂₃Outfan 3 foot and U₂₄1 foot be connected, U₂₄Outfan 3 foot be the outfan of pulse-delay unit, it is connected to U₁₆11 feet, i.e. CP end；

Additionally, the U in the 12nd circuit unit₁₆3 feet and U₈Outfan be connected, U₁₆5 feet and U₉Outfan be connected, U₁₆1,9,10 feet and resistance R₁₄One end be connected, R₁₄The other end be connected with+5V, R₁₄One end also with electric capacity C₃One end be connected, C₃The other end connect digitally, U₁₆15 feet and U₁₃Input be connected, U₁₃Outfan and the advanced green LED LED D of instructed voltage₅Negative pole be connected, D₅Positive pole by resistance R₁₂It is connected with+5V, U₁₆13 feet and U₁₄Input be connected, U₁₄Outfan and the advanced red light emitting diodes LED D of indicator current₆Negative pole be connected, D₆Positive pole by resistance R₁₃It is connected with+5V；

12nd circuit unit uses LED to carry out indicated horsepower factor simplified process advanced, delayed work: shown in the oscillogram of A, D, F point in Fig. 2 and Fig. 6, U₁₁Outfan 2_OUTOutput voltage, electric current synthesis square wave after pulse-delay unit postpones a little at its outfan and U₂₄Outfan 3 foot output be the square waveform postponing only to count microsecond, when advanced voltage rectangular waveform is by U₈Outfan arrive U₁₆3 foot time, simultaneously by U₁₁Outfan 2_OUTThe square waveform of output exports U from its outfan after pulse-delay unit postpones₁₆11 feet and CP end foot, utilize the front rising edge of square waveform of this slight delay the voltage rectangular waveshape signal arrived slightly before by U₁₆3 feet deliver to U₁₆15 feet, the voltage rectangular waveshape signal of its high level makes phase inverter U₁₃Output low level, thus having lighted the green LED LED D that instructed voltage is advanced₅, although electric current rectangular waveform signal will by U after being likely to slightly late₉Outfan arrive U₁₆5 feet, but be later than U₁₆CP end foot on delay pulse, it is delayed for thus representing current power factor；When electric current is ahead of voltage, this work process is the same, but that light in circuit is red diode D₆, there is shown current power factor is advanced；

When power-factor measurement device is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, it includes the five, the six, seven, eight, nine, ten, 11 circuit units；

As it is shown on figure 3, the 5th circuit unit is 10MHZ pulses generation and very frequency circuit, this circuit unit includes 10MHZ crystal oscillator, 74LS04 hex inverter U₃₀, 74LS160 decimal scale coincidence counter U₂₉, resistance R₁₇、R₁₈、R₁₉, electric capacity C₆, its connection is, U₃₀The 1st, connect resistance R between 2 feet₁₈, the 3rd, connect R between 4 feet₁₉, the 2nd, connect C between 3 feet₆, the 1st, connect 10MHZ crystal oscillator between 4 feet, the 2nd foot and the 13rd foot are connected, the 12nd foot and decimal scale coincidence counter U₂₉The 2nd foot CP end be connected, U₂₉The 1st, 7,9 and 10 feet by resistance R₁₇Being connected with+5V power supply, the 15th foot output 10MHZ 1MHZ pulse after very frequency, namely every microsecond is 1 pulse, U₂₉The output of the 15th foot be connected to the 2nd foot of four coincidence counters of the 6th circuit unit, i.e. CP end；

As it is shown on figure 3, the 6th circuit unit is by four 74LS161 tetrad coincidence counter U₂₅、U₂₆、U₂₇、U₂₈16 binary time pulse counting circuits of be connected in sequence, its output be one by zero, be incremented by 16 bits of 1us every time, first, left side in these four enumerators, i.e. U₂₅The 14th foot be output 16 bits in lowest order, first, right side in these four enumerators, i.e. U₂₈The 11st foot be output 16 bits in highest order, its connection is, U₂₅The 15th foot connect U₂₆The 10th foot, U₂₆The 15th foot connect U₂₇The 10th foot, U₂₇The 15th foot connect U₂₈The 10th foot, the 2nd foot CP end and U of four enumerators₂₉The 15th foot be connected, the 7th of four enumerators the, 9 feet and U₂₅The 10th foot by resistance R₁₇It is connected with+5V power supply, the 1st foot of four enumeratorsEnd and the 4th circuit unit U₁₁Outfan 2_OUTBeing connected, four enumerators totally 16 data output ends connect one to one 16 data input pins of the 8th circuit unit, namely U₂₅、U₂₆、U₂₇、U₂₈The 14th of each enumerator, 13,12,11 feet one_to_one corresponding successively access U₃₁、U₃₂、U₃₃、U₃₄The 3rd of each depositor, 4,5,6 feet；

As it is shown on figure 3, the 7th circuit unit is a maintenance impulse circuit, by 74L,S08 42 input and door U₃₅In AND circuit constitute；Described maintenance impulse circuit is the time that temporary sampling time data at least keep 20ms, i.e. a cycle, and the condition of the setting of maintenance impulse circuit is,The time that pulse occurs is kept to should be between 5000us to the 10ms after time counting circuit starts counting and as far as possible near this side of 5000us,It is as far as possible few that hardware used during this maintenance pulse is set；After relatively, decimal number 5120 is selected according to aforementioned condition, its method to set up is, decimal number 5120 convert to binary number, namely 0001,0100,0000,0000, when after time counting circuit starts, the 11st of this binary number the, 13 represent that count value is decimal numeral 5120 when there is high level simultaneously；Its connection is, U₃₅1 foot and the output of the 6th circuit unit 16 bits in the 11st, i.e. U₂₇12 feet be connected, U₃₅2 feet and 16 bits in the 13rd, i.e. U₂₈14 feet be connected, U₃₅3 feet as the 7th circuit unit outfan time counting circuit start counting after 5120us time produce and export maintenance pulse, its pulse be input to the 9th four depositors of circuit unit CP end；

As it is shown on figure 3, the 8th circuit unit be four being incorporated to-and go out 74LS194 that is 4 the bidirectional shift register U that mode works₃₁、U₃₂、U₃₃、U₃₄The time data buffering circuit being in turn connected into, its 4 bidirectional shift registers can also adopt the IC chips such as eight d type flip flops to replace, its connection is, four enumerators of the 6th circuit unit totally 16 data output ends connect one to one 16 data input pins of the 8th circuit unit, namely U₂₅、U₂₆、U₂₇、U₂₈The 14th of each enumerator, 13,12,11 feet one_to_one corresponding successively access U₃₁、U₃₂、U₃₃、U₃₄The 3rd of each depositor, 4,5,6 feet；16 data input pin one_to_one corresponding of totally 16 data output ends and the 9th circuit unit of four depositors are connected, namely U₃₁、U₃₂、U₃₃、U₃₄The 15th of each depositor, 14,13,12 feet one_to_one corresponding successively access U₃₆、U₃₇、U₃₈、U₃₉The 3rd of each depositor, 4,5,6 feet；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 9th, 10 feet connect resistance R₂₀One end, resistance R₂₀The other end and+5V power supply connect, R₂₀One end by electric capacity C₇Connect digitally；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 1st footThe U of end and the 4th circuit unit₁₁Outfan 2_OUTIt is connected；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 11st foot CP end and the U of the 4th circuit unit₁₀Outfan 1_OUTIt is connected；

As it is shown on figure 3, the 9th circuit unit be four being incorporated to-and go out 74LS194 that is 4 the bidirectional shift register U that mode works₃₆、U₃₇、U₃₈、U₃₉The time data holding circuit being in turn connected into, its 4 bidirectional shift registers can also adopt the IC chips such as eight d type flip flops to replace, and its connection is, four depositor U₃₆、U₃₇、U₃₈、U₃₉The 1st footEnd, 9,10 feet and resistance R₂₀One end be connected, R₂₀The other end and+5V power supply connect, R₂₀One end by electric capacity C₇Connect digitally；11st foot CP end and the outfan of the 7th circuit unit, i.e. U of four depositors₃₅3 feet be connected；Front 13 outfans in 16 data output ends of four depositors, namely from U₃₆The 15th foot rise, according to priority, the 14th, 13,12 feet, connecing down is U₃₇The 15th, 14,13,12 feet, then to connect down be U₃₈The 15th, 14,13,12 feet, be finally U₃₉The 15th foot, respectively successively with the tenth circuit unit, i.e. first memorizer U₄₀, second memorizer U₄₁13 address wire A in parallel₀～A₁₂One_to_one corresponding is connected；

As shown in Figure 4, the tenth circuit unit is arranged to the electrically erasable programmable ROM EEPROM2864, first memorizer U of two 8K × 8 of the address wire parallel connection of read-only working method₄₀With second memorizer U₄₁13 articles of address wires in parallel and be connected with front 13 data output end sequentially one_to_one corresponding of the 9th circuit unit, two Memory Storage Units have adopted the form of four binary-decimal binary-coded decimals be stored in 5000 in conversion tableValue；Its connection is, U₄₀And U₄₁The 20th, 22 feet are by resistance R₂₁Connect digitally, U₄₀And U₄₁The 27th foot by resistance R₂₂Connect+5V power supply, U₄₀And U₄₁13 address wire A in parallel₀～A₁₂Successively with 16 data output ends of the 9th circuit unit in before 13 outfans, i.e. U₃₆、U₃₇、U₃₈15,14,13,12 foot and U₃₉15 foot one_to_one corresponding be connected, U₄₀And U₄₁The data-out port line I/O of two memorizeies₀～I/O₇Totally 16 articles are connected with the 11st circuit unit；

As shown in Figure 4, the 11st circuit unit is that the display circuit adopting the conventional device compositions such as BCD-seven-segment decoder/driver, current-limiting resistance, LED seven-segment numeric indicator carrys out the power factor that instant playback is testedValue, is by 74LS47 and BCD-seven-segment decoder/driver U in the present embodiment₄₂、U₄₃、U₄₄、U₄₅, current-limiting resistance R₂₃×7、R₂₄×7、R₂₅×7、R₂₆× 7, seven sections of common-anode LED nixie display U₄₆、U₄₇、U₄₈、U₄₉Composition digital-scroll technique circuit, its first memorizer U in parallel with two address wires of the tenth circuit unit₄₀With second memorizer U₄₁The method of attachment of data-out port line I/O be, U₄₀Data-out port line the 11st, 12,13,15 feet, i.e. I/O₀、I/O₁、I/O₂、I/O₃Successively and U₄₂7,1,2,6 feet be connected, its output and at U₄₆On be shown that in totally two storage bytes of two in parallel memorizeies of address wire first ten's digit of storage, U₄₀Data-out port line the 16th, 17,18,19 feet, i.e. I/O₄、I/O₅、I/O₆、I/O₇Successively and U₄₃7,1,2,6 feet be connected, its output and at U₄₇On be shown that in totally two storage bytes of two in parallel memorizeies of address wire second ten's digit of storage, U₄₁Data-out port line the 11st, 12,13,15 feet, i.e. I/O₀、I/O₁、I/O₂、I/O₃Successively and U₄₄7,1,2,6 feet be connected, its output and at U₄₈On be shown that in totally two storage bytes of two in parallel memorizeies of address wire the 3rd ten's digit of storage, U₄₁Data-out port line the 16th, 17,18,19 feet, i.e. I/O₄、I/O₅、I/O₆、I/O₇Successively and U₄₅7,1,2,6 feet be connected, its output and at U₄₉On be shown that in two storage bytes of two in parallel memorizeies of address wire the 4th ten's digit of storage；U₄₂、U₄₃、U₄₄、U₄₅With current-limiting resistance R₂₃×7、R₂₄×7、R₂₅×7、R₂₆× 7 and seven-segment numeric indicator U₄₆、U₄₇、U₄₈、U₄₉Connection belong to knowledge.

As shown in Fig. 2,3,4,6, the measurement apparatus of above-mentioned employing measurement type time data application module, i.e. measurement type its brief work process of power-factor measurement device be, when from the first circuit unit voltage follower U₁In-phase input end 1_INInput and again from U₁The voltage sinusoidal waveform signal A-1 of outfan output be converted into TTL rectangular waveform signal from U₈Outfan export U₁₀1_IN、U₁₁4 feet, U₁₆3 feet while, from U₁₁Outfan 2_OUTAlso output high level square-wave signal is to 1 foot of the 6th four enumerators of circuit unit, 1 foot of the 8th four depositors of circuit unit and U₂₁1,2 feet, the 6th circuit unit starts counting up, the 8th circuit unit time data keep in, the pulse-delay unit time started postpone；Subsequently from second circuit cell voltage follower U₃In-phase input end 1_INInput and again from U₃The current sinusoidal waveshape signal A-2 of outfan output be converted into TTL rectangular waveform signal from U₉Outfan export U₁₀3 feet, U₁₁2_IN、U₁₆5 feet while, from U₁₀Outfan 1_OUTOutput high level square-wave signal, to four depositor the 11st feet of the 8th circuit unit, i.e. CP end, utilizes U₁₀The front rising edge of the high level square wave of output is the 8th circuit unit U₃₁、U₃₂、U₃₃、U₃₄Totally 16 data input pins on time data deliver on its 16 data-out ports or perhaps deliver to the 9th circuit unit U₃₆、U₃₇、U₃₈、U₃₉Totally 16 data input pins on, when the 6th circuit unit, i.e. time pulse-scaling circuit start after 5120us time, the outfan of the 7th circuit unit, i.e. U₃₅3 feet output maintenances be pulsed into the 9th circuit unit U₃₆、U₃₇、U₃₈、U₃₉The 11st foot, i.e. CP end, utilize U₃₅3 feet outputs keep the front rising edge of high level of pulses the 9th circuit unit U₃₆、U₃₇、U₃₈、U₃₉Totally 16 data input pins on time data deliver on its data-out port and keep a cycle and 20ms, due to the electrically erasable programmable ROM of two 8K × 8 in parallel of the address wire being arranged to read-only working method of 13 data output ends and the tenth circuit unit before in these 16 data-out ports of the 9th circuit unit, i.e. first memorizer U₄₀With second memorizer U₄₁13 address wire sequentially one_to_one corresponding be connected, i.e. U₃₆In 15,14,13,12 feet and two memorizer U₄₀And U₄₁13 in parallel address wires in A₀、A₁、A₂、A₃Sequentially one_to_one corresponding is connected, U₃₇In 15,14,13,12 feet and parallel connection 13 address wires in A₄、A₅、A₆、A₇Sequentially one_to_one corresponding is connected, U₃₈In 15,14,13,12 feet and parallel connection 13 address wires in A₈、A₉、A₁₀、A₁₁Sequentially one_to_one corresponding is connected, U₃₉In 15 feet and A in 13 in parallel address wires₁₂Correspondence is connected, and two memorizer U₄₀And U₄₁Memory element in adopted the form of four binary-decimal binary-coded decimals to be stored in 5000 in conversion tableValue, so being kept pulse to deliver to the 9th circuit unit U₃₆、U₃₇、U₃₈、U₃₉16 data-out ports on time data just become two memorizer U that the tenth circuit unit address wire is in parallel₄₀And U₄₁Address and directly read the power factor value in its respective memory unit, it is achieved that the measurement to power factor；While almost starting working with the six, the eight circuit units, the carrying out advanced, the delayed work of indicated horsepower factor by LED and also carrying out of the 12nd circuit unit, its simplified process is as described above.Above-mentioned described is the situation of voltage leading current, if its work process is the same during the situation of electric current leading voltage, only the color of display lamp becomes redness, it was shown that the power factor when electric current leading voltage is advanced.When electrical network rated frequency 50HZ, application power factor value measured by measurement type power-factor measurement device is very accurately.

It is well known that, the mains frequency in actual motion is unlikely to be stable, and it can produce the deviation that technical specification allows.According to pertinent regulations, measurement class of accuracy be should be rated frequency f by standard frequency range_r99%～101%, i.e. 0.99f_r≤f≤1.01f_r, protection class of accuracy be should be rated frequency f_r96%～102%, i.e. 0.96f_r≤f≤1.02f_r.Therefore when skew occurs in mains frequency, application measurement type power-factor measurement device is measured power factor value and also will be produced certain error, and this error is for common instrument measurement and display and be completely adequate for on-the-spot power factor controlling and power factor compensation；But being but unallowable it is necessary to use metering type power-factor measurement device when being applied to accuracy of measurement is required higher AC energy metering occasion, the time data application module in device adopts metering type time data application module.

Mains frequency f f when skew occurs mains frequency, during skew_cy(hertz/sec) represents, T T_cyRepresenting, t (us) uses t_cy(us) represent, then the voltage of same phase and the phase contrast of electric current or phase angle difference during mains frequency skewFor:

In the formula (3) being generally noted above,

Remove the rightmost item in (3), namely have:

When mains frequency f is rated frequency f_rTime, the T in (3-1)_rBe one with the rated frequency f in (3)_rCorresponding rated value,Also it is one and f_rCorresponding rated value, therefore (3), t in (3-1) two formulas withBeing directly proportional, " the time t value with power factor value conversion table " of the present embodiment is calculated when being rated for 50HZ according to frequency and be constant just, so in the respective memory unit read with t for storage address when mains frequency is 50HZIt is worth also just accurate；

Mains frequency f in formula (5), when offseting in actual motion_cyBe not 50HZ but with rated frequency f_rWhen having the deviation that regulation allows, T_cyToo with T_rThere is deviation, thenWithBetween also have deviation, it is assumed that (3-1) and in (5)Identical, then equal on the right of two formulas:

From (3-2) formula it is clear that work asWithWhen not waiting, t and t_cyValue also unequal, now use t_cyGo in extraction table corresponding as the time t value in " time t value and the power factor value conversion table " of establishment when being 50HZ according to rated frequencyValue, still use t in other words_cyGo to read in memorizer respective memory unit as storage addressAlso it is certain to during value that error in data occurs, because the storage content in this memorizer is based on data storage when rated frequency is 50HZ in " time t value and the power factor value conversion table " of establishment.

Use following straightforward procedure can correct this mistake: the phase contrast of the same phase voltage immediately sampled and electric current or phase angle differenceRemove when rated frequency 50HZThen the t obtained is gone in extraction table corresponding as the time t value in " time t value and power factor value conversion table "Value；Or directly wushu (3-2) carries out conversion and obtains t, then go to read in the memorizer respective memory unit stored according to the data in " time t value and power factor value conversion table " using t as storage addressValue；Whether any method, its result is just as, it may be assumed that

Above formula (6) shows, obtains a phase angle when mains frequency is offsetRequired sampling time t_cyPass throughAdjustment " conversion " in other words conj.or perhaps after, just obtain an identical phase angleThe sampling time t required when mains frequency is specified, finally using this sampling time value t as storage address go to read in memorizer according to electrical network rated frequency 50HZ time " time t value and the power factor value conversion table " of establishment its data are stored in advance in respective memory unitError in data would not occur during value；In formulaIt is called conversion factor or commutation factor, works as T_cy=T_rTime, mains frequency is rated frequency, and conversion factor is equal to 1.Now give a concrete illustration, such as, the time difference sampled when mains frequency 50.5HZ is 1000us, it is possible to should carry out error correction with the aforedescribed process: (one). cycle during known 50.5HZ is 19801.9802us, and angular difference is tried to achieve in application formula (5)Being 18.18 °, cycle during known 50HZ is 20000us again, and the angle of each us is 0.018 °, this phase angle difference18.18 ° remove in 0.018 °, the t obtained is 1010us, using this 1010us as mains frequency be 50HZ time establishment " time t value and power factor value conversion table " in time t value go in extraction table correspondingThe result that value obtains is accurately, it is clear that if direct 1000us goes to extract in this tableValue will obtain the result of mistake；(2). cycle during known 50.5HZ is 19801.9802us, cycle during 50HZ is 20000us, after application formula (6) is adjusted in other words conj.or perhaps " conversion ", the t that obtains is 1010us, then using the time value t after this correction as storage address go to read in memorizer according to mains frequency for 50HZ time " time t value and the power factor value conversion table " of establishment its data are stored in advance in respective memory unitError in data would not occur during value.

What measurement apparatus of the present utility model inputted is the measurement voltage of same phase, Current Transformer Secondary electric current converts to through resistance, and through the sinusoidal voltage waveform signal filtering the process such as harmonic wave interference of electronic circuit, circuit and first is adjusted respectively through the third circuit unit in device and zero-point voltage, the process of two circuit unit waveform changing circuits, one sine wave-shaped signal is divided into equal upper, lower two half-waves also export with rectangle square wave, the high level of this rectangle square wave, i.e. positive pulse part and low level, namely zero level part is essentially equal in time, that is it is high, the low level time respectively accounts for the half of a cycle time, therefore to T cycle time in this utility model device_rAnd T_cyMeasurement all only measure the high level of its rectangle square wave, i.e. positive pulse part, with hereinafter or the computing related to just no longer is explained separately except having explanation；The standard frequency excursion allowed according to aforesaid regulation is it can be seen that its maximum frequency range is rated frequency f_r96%～102%, the time value T of its corresponding half period when mains frequency is rated frequency 50HZ_rFor 10000us, the time value T of its corresponding half period when mains frequency generation offset variation_CYAllow change maximum magnitude between 9804～10417us.Require supplementation with and any is described, t and t referred to above_cyWhen as the time value sampled or count, it is meant that equally, one time value sampled or count indicated that during rated frequency, another indicates that the time value of sampling when rated frequency offsets or counting, institute the difference is that, t also has the function representing address code in conversion table and memorizer, therefore one with without bottom right mark t represent, another with bottom right mark t_cyRepresent.

Being applied to the metering type time data application module in the power-factor measurement device requiring high field to close accuracy of measurement according to error correction method discussed above design, this module includes a gate circuit U in 42 input XOR gate integrated circuit 74LS86₁₀₁, a piece of crystal oscillator frequency at that time is the single-chip microcomputer 8031 i.e. U of 12MHZ₁₀₂, three 7,4LS,377 eight rising edge d type flip flop U₁₀₃、U₁₀₄、U₁₀₅, wherein first is U₁₀₄, second be U₁₀₅, the 3rd be U₁₀₃, 5000 in conversion table are stored with binary-coded decimal formTwo memorizer EEPROM2864 and U that the address wire of value is in parallel₄₀、U₄₁, wherein first memorizer is U₄₀, second memorizer is U₄₁, single-chip microcomputer U₁₀₂Pass through P₀Mouth extension delivery outlet, utilizes three 74LS377 and U₁₀₃、U₁₀₄、U₁₀₅Two the memorizer Us in parallel with address wire₄₀、U₄₁It is attached, here U₁₀₃、U₁₀₄、U₁₀₅It is considered the external RAM unified addressing of single-chip microcomputer, single-chip microcomputer U₁₀₂Output control signal isThe software of its use is referred to the introduction in " the 86th page of Li Hua chief editor publishing house of BJ University of Aeronautics & Astronautics of MCS-51 series monolithic Practical Interface technology in August, 1993 ", and the concrete connection of its circuit is: the 4th circuit unit U₁₀Outfan 1_OUTWith XOR gate U₁₀₁The 1st foot be connected, the U of the 4th circuit unit₁₁Outfan 2_OUTWith XOR gate U₁₀₁The 2nd foot and single-chip microcomputer U₁₀₂'sThe i.e. U of the pulse-delay unit in the 13rd foot and the 12nd circuit unit₂₁Two inputs 1,2 foot be connected, XOR gate U₁₀₁The 3rd foot and single-chip microcomputer U₁₀₂'sNamely the 12nd foot is connected, single-chip microcomputer U₁₀₂8 of P0 mouth line end feet by number ascending, namely press order sequentially correspondingly with the first eight rising edge d type flip flop U of P0.0 to P0.7₁₀₄8 data input pin 1D～8D be connected, first eight rising edge d type flip flop U₁₀₄8 data output end 1Q～8Q correspondingly with the second eight rising edge d type flip flop U₁₀₅8 data input pin 1D～8D be connected, the 3rd eight rising edge d type flip flop U₁₀₃8 data input pin 1D～8D sequentially correspondingly with the first eight rising edge d type flip flop U₁₀₄8 data input pin 1D～8D parallel connections be connected, the 3rd eight rising edge d type flip flop U₁₀₃8 data output end 1Q～8Q and first memorizer U₄₀Low eight address line end foot by number ascending, be namely sequentially attached correspondingly by the order of A0 to A7, second eight rising edge d type flip flop U₁₀₅8 data output ends in 1Q～5Q and first memorizer U₄₀High five address line end foot by number ascending, be namely sequentially attached correspondingly by the order of A8 to A12, due to memorizer U₄₀And U₄₁Its memory capacity only has 8K, second eight rising edge d type flip flop U₁₀₅8 data output ends in there remains three end foot 6Q～8Q, it is possible to vacant need not；Single-chip microcomputer U₁₀₂The 16th foot, namelyEnd foot and three eight rising edge d type flip flop U₁₀₃、U₁₀₄、U₁₀₅The 11st foot, namely CP end foot be connected, single-chip microcomputer U₁₀₂27th foot, i.e. P2.6 end foot and first eight rising edge d type flip flop U₁₀₄The 1st foot, namelyEnd foot is connected, single-chip microcomputer U₁₀₂28th foot, i.e. P2.7 end foot are simultaneously and second and third eight rising edge d type flip flop U₁₀₅、U₁₀₃The 1st foot, namelyEnd foot is connected, second memorizer U₄₁Address line end foot A0～A12 and first memorizer U₄₀Address line end foot A0～A12 carry out correspondingly parallel connection connection；Set single-chip microcomputer U₁₀₂The address date of 16 bits of two bytes of P0 mouth output be arranged in order to highest order by lowest order, point secondary, each byte deliver to 8 data input pins of eight rising edge d type flip flops, wherein first time delivers to first eight rising edge d type flip flop U₁₀₄The data of 8 data input pins be the address of high byte, till this address date plays sixteen bit from the 9th of this 16 bit the, successively, the 9th corresponding to first eight rising edge d type flip flop U₁₀₄The 1D of 8 data input pins, the tenth corresponding to 2D ... sixteen bit corresponding to 8D；Second time delivers to the 3rd eight rising edge d type flip flop U₁₀₃The data of 8 data input pins be the address of low byte, this address date from first of this 16 bit play till the 8th, successively, first corresponding to the 3rd eight rising edge d type flip flop U₁₀₃The 1D of 8 data input pins, second corresponding to 2D ... the 8th corresponding to 8D；Divide the two byte address data that secondary is sent at the three, the second eight rising edge d type flip flop U₁₀₃、U₁₀₅13 binary storage device address codes arranging in order from low to high of data output end interruption-forming one and U₁₀₃Data-out port 1Q～8Q and U₁₀₅Data-out port 1Q～5Q and in parallel two the memorizer U of address wire₄₀、U₄₁Address end foot A0～A12 have annexation one to one；This module also includes other peripheral component and circuit, the time crystal oscillator and the circuit that connects of single-chip microcomputer circuit, BCD-seven-segment decoder/driver for needed for instant playback power factor data, current-limiting resistance and the LED seven-segment numeric indicator etc. that connect that these peripheral components and circuit include circuit that 8D latch 74LS373 with ternary output connects the off-chip program storage of extension with single-chip microcomputer 8031, frequency is 12MHZ, these belong to known technological know-how, are no longer discussed in detail and draw in the drawings.

In conjunction with error correction method discussed above and the power-factor measurement device of employing metering type time data application module that connected into, and with reference to shown in one of Fig. 2,4,5,6, just can be clearly understood from, through first and second circuit unit waveform changing circuit process, again by the 4th circuit unit U₁₀Outfan 1_OUTAnd U₁₁Outfan 2_OUTIt is respectively outputted to XOR gate U₁₀₁Two inputs 1,2 foot after through U₁₀₁The sample time signal t of outfan 3 foot output_cyAccess single-chip microcomputerEnd foot, its signal width is exactly the timer/counter T0 time counting value read, simultaneously U₈Outfan output voltage rectangular ripple and U₉Outfan output electric current rectangle wavelength-division not by or door U₁₁4 feet and 2_INThrough its outfan 2 after foot input_OUTThe voltage of output, both electric currents or gate signal access single-chip microcomputerEnd foot, its signal width is exactly the timer/counter T1 time counting value read；Therefore, formula (6) becomes:

$t=t_{cy}\×\frac{T_r}{T_{cy}}=T0\×\frac{T_r}{T1-T0}---\left(7\right)$

In formula, t_cyWhen being the skew of electrical network rated frequency to the voltage of same phase, electric current sine wave-shaped signal zero passage time the time value that counts of time difference, it is exactly the count value of T0, T_cyBeing the time value in cycle during the skew of electrical network rated frequency, it is exactly the count difference value of (T1-T0)；Time counting value when t is electrical network rated frequency 50HZ, the time difference of the voltage of same phase, the sine wave-shaped signal zero passage of electric current counted；T_rIt is period time value during electrical network rated frequency 50HZ, is a known value；

Again formula (7) is simplified and obtains:

$t=T0\×\frac{T_r}{T1-T0}---\left(8\right)$

Further, by utilizing the function of the gate control position GATE of single-chip microcomputer intervalometer and using method and two timer/counters T0, T1 read required time data and apply the calculation procedure of single-chip microcomputer and realize quick, easy power-factor measurement and display, can the steps include:

Function and the using method of the gate control position GATE of application single-chip microcomputer intervalometer measure XOR gate outfan and U₁₀₁3 feet export single-chip microcomputer U₁₀₂12 feet namelyHigh level, namely positive pulse width and measure the 4th circuit unit U₁₁Outfan 2_OUTSingle-chip microcomputer U is arrived in output₁₀₂13 feet namelyHigh level, i.e. positive pulse width, and close T0 and T1 respectively after reading the count value of T0 and T1 respectively；

The value of T0 and T1 is substituted into formulaIt is calculated, after the value that the arithmetic point in acquired results is later is rounded up, obtains 16 bits of two bytes；

The high byte of 16 bits is delivered to first eight rising edge d type flip flop U₁₀₄Data output end；

The low byte of 16 bits is delivered to the 3rd eight rising edge d type flip flop U₁₀₃Data output end and simultaneously first eight rising edge d type flip flop U₁₀₄Value on data output end delivers to second eight rising edge d type flip flop U₁₀₅Data output end on, using 16 bits of this two byte as in parallel two the memorizer U of address wire₄₀、U₄₁Address directly read out the power factor numerical value in its corresponding memory element and give instant playback；

T0 and T1 is reset；

Return after T0 and T1 is put 1, wait next test loop.

Interlock circuit in metering type time data application module in above-mentioned measurement apparatus is made a simple modification will make metering type time data application module become measurement type time data application module: namely, disconnects U₁₁Outfan 2_OUTWith single-chip microcomputer U₁₀₂The 13rd foot, namelyBetween connecting line, simultaneously need not according still further to above-mentioned stepsIn formula be calculated, as long as according to above-mentioned steps after directly reading the count value of T0Carry out, return after finally only T0 being reset and again T0 put 1, wait next one test loop；This change makes measurement type power-factor measurement device more simply small and exquisite, is further added by again a kind of application mode.

Power-factor measurement device of the present utility model should be placed in the earth lead in the metallic shield casing of ground connection and on the electronic circuit board of device should by specifying appropriate ground connection in case external interference.The secondary current of two of measurement apparatus input signal respectively measurement voltage transformer and Verification of Measuring Current Transformer through resistance convert to and filter, through electronic circuit, the sine wave-shaped signal that harmonic wave interference etc. processes, its waveforms amplitude is proportional to primary current, the quadratic sine waveshape signal of these two the quadratic sine waveshape signal summation current transformers inputting signal, i.e. voltage transformers should use the signal shielding cable of shielding layer grounding and aviation connection-peg to be respectively connected to the first circuit unit forward voltage follower U of measurement apparatus₁In-phase input end 1_INWith second circuit unit forward voltage follower U₃In-phase input end 1_IN.The signal of the second circuit unit forward voltage follower being input in this power-factor measurement device recommend the cable punching full-shield electronic current transducer secondary side that Authorization Notice No. is CN204558230U through electronic circuit filter harmonic wave and interference etc. process after output quadratic sine waveshape signal；The signal of the first circuit unit forward voltage follower being input in this power-factor measurement device recommends the signal of ceramic electronic voltage transformer secondary side, this secondary side signal is need to filter the quadratic sine waveshape signal of output after harmonic wave and interference etc. process through electronic circuit equally, and the electronic circuit that should be used for ceramic electronic voltage transformer secondary side signal is filtered the process such as harmonic wave and interference is the same with the electronic circuit used in cable punching full-shield electronic current transducer secondary side.

In the circuit of this utility model device, amplifier U₁、U₂、U₃、U₄、U₅Positive and negative power end all meet ± 15V working power, R₃The other end, R₉The other end, R₁₁The other end be all connected with simulation ground；In addition, the positive supply termination+5V working power of other integrated circuits, its negative power end or ground connection terminate digitally；In the circuit of this utility model device, R₄=R₅=R₆=R₇, R₈=R₁₀, R₉=R₁₁, R₁₈=R₁₉, C₁=C₂。

The simple signal table of time t value and power factor value conversion table is presented herein below.During as needed a complete conversion table, the power factor in available this utility model literary composition calculates formula (4) and calculates voluntarily.

Claims (3)

1. the measurement apparatus of a power factor, the voltage of this measurement apparatus input and the measurement voltage of electric current two signals respectively same phase, current transformer secondary current through resistance convert to and filter, through electronic circuit, the sinusoidal voltage waveform signal that harmonic wave interference etc. processes, quadratic sine waveshape signal referred to as voltage transformer, current transformer, it is characterized in that: it includes first, second, third and fourth circuit unit, 12nd circuit unit and a time data application module, store H in conversion table with binary-coded decimal formTwo electrically erasable programmable ROMs of the address wire parallel connection of value are connected in time data application module；

Wherein, the circuit structure of first and second circuit unit, components and parts and parameter thereof are identical, are that the voltage of input, Current Transformer Secondary sine wave-shaped signal are converted to the circuit that the square-wave signal of Transistor-Transistor Logic level exports respectively,

First circuit unit includes with amplifier OP-07 as forward voltage follower U₁, with OP-37 as the voltage comparator U with open-loop gain₄, resistance R₄、R₅、R₈、R₉, electric capacity C₁, diode D₁, diode D₂, also include U₆And U₈, U₆And U₈Being have a gate circuit in 42 input nand gate 74LS132 of Schmidt trigger respectively, its connection is, the quadratic sine waveshape signal of voltage transformer accesses U₁In-phase input end that is 1_IN, U₁Inverting input and U₁Outfan be connected, U₁Outfan and resistance R₄One end be connected, resistance R₄The other end and U₄In-phase input end be connected, resistance R₅The other end and U₄Inverting input that is 2_INIt is connected, U₄Outfan and resistance R₈One end be connected, R₈The other end and R₉One end be connected, R₉The other end connect simulation ground, electric capacity C₁And R₉Parallel connection, R₈The other end and U₆Two inputs be connected, diode D₁Input and U₆Two inputs be connected, D₁Outfan connection+5V, diode D₂Outfan connect D₁Input, D₂Input connect digitally, U₆Outfan and U₈Two inputs be connected, U₈Outfan be the outfan of the first circuit unit, the rectangular wave pulse signal of its output high level；

Second circuit unit includes with amplifier OP-07 as forward voltage follower U₃, with OP-37 as the voltage comparator U with open-loop gain₅, resistance R₆、R₇、R₁₀、R₁₁, electric capacity C₂, diode D₃, diode D₄, also include U₇And U₉, U₇And U₉Being have a gate circuit in 42 input nand gate 74LS132 of Schmidt trigger respectively, its connection is, the quadratic sine waveshape signal of current transformer accesses U₃In-phase input end that is 1_IN, U₃Inverting input and U₃Outfan be connected, U₃Outfan and resistance R₆One end be connected, resistance R₆The other end and U₅In-phase input end be connected, resistance R₇The other end and U₅Inverting input that is 2_INIt is connected, U₅Outfan and resistance R₁₀One end be connected, R₁₀The other end and R₁₁One end be connected, R₁₁The other end connect simulation ground, electric capacity C₂And R₁₁Parallel connection, R₁₀The other end and U₇Two inputs be connected, diode D₃Input and U₇Two inputs be connected, D₃Outfan connection+5V, diode D₄Outfan connect D₃Input, D₄Input connect digitally, U₇Outfan and U₉Two inputs be connected, U₉Outfan be the outfan of second circuit unit, the rectangular wave pulse signal of its output high level；

Third circuit unit is that a zero-point voltage adjusts circuit unit, and it includes with amplifier OP-07 as voltage follower U₂, adjustable resistance R₁, resistance R₂、R₃, its connection is, adjustable resistance R₁One end connection+15V, other end connection-15V, adjustable resistance R₁Adjustable end connect resistance R₂One end, R₂The other end connect resistance R₃One end, R₃The other end connect simulation ground, R₂The other end and U₂In-phase input end be connected, U₂Inverting input and U₂Outfan be connected, U₂The output of outfan be divided into two-way, the resistance R of a road and the first circuit unit₅One end be connected, R₅The other end and U₄Inverting input that is 2_INIt is connected, the resistance R of another road and second circuit unit₇One end be connected, R₇The other end and U₅Inverting input that is 2_INIt is connected；

4th circuit unit is by 42 inputs and an AND circuit U in door integrated circuit 74LS08₁₀With an OR circuit U in 42 inputs or door integrated circuit 74LS32₁₁Constituting, its connection is, U₈Outfan connect U₁₀Input 1_INAnd U₁₁Input 4 end foot；U₉Outfan connect U₁₁Input 2_INAnd U₁₀Input 3 end foot；

12nd circuit unit is one and carrys out the circuit that indicated horsepower factor is advanced, delayed by LED, and it includes a U₁₆, i.e. two gate circuit U in 4 bidirectional shift register 74LS194,74LS04 phase inverters₁₃、U₁₄, current-limiting resistance R₁₂、R₁₃, green LED LED D that an instructed voltage is advanced₅, red light emitting diodes LED D that an indicator current is advanced₆With resistance R₁₄, electric capacity C₃And a pulse-delay unit；U₁₁Outfan 2_OUTThe signal of output is input to U after the delay of this pulse-delay unit microsecond a little₁₆11 feet, i.e. CP end, namely can determine whether and make advanced or delayed lamplight pointing red, green intercepting the precedence in voltage, both electric currents signal, the components and parts of pulse-delay unit include a gate circuit U in 42 inputs or door integrated circuit 74LS32₂₁, 74L,S02 42 inputs two gate circuit U in nor gate integrated circuit₂₃、U₂₄, a gate circuit U in 74LS04 hex inverter integrated circuit₂₂With resistance R₁₆, electric capacity C₅；The connection of pulse-delay unit is, U₁₁Outfan 2_OUTConnect U respectively₂₁Two inputs 1,2 foot, U₂₁Outfan 3 foot and resistance R₁₆One end be connected, R₁₆The other end respectively with U₂₃Input 1 foot and electric capacity C₅One end be connected, C₅The other end connect digitally, U₂₃Another input 2 foot and U₂₄Outfan 3 foot be connected, U₂₃Outfan 3 foot and U₂₄Input 1 foot be connected, phase inverter U₂₂Input and U₂₁Outfan 3 foot be connected, U₂₂Outfan and U₂₄Another input 2 foot be connected, U₂₄Outfan be the outfan of pulse-delay unit, U₂₄Outfan 3 foot be connected to U₁₆11 feet, i.e. CP end；

U in 12nd circuit unit₁₆3 feet and U₈Outfan be connected, U₁₆5 feet and U₉Outfan be connected, U₁₆1,9,10 feet and resistance R₁₄One end be connected, R₁₄The other end be connected with+5V, R₁₄One end also with electric capacity C₃One end be connected, C₃The other end connect digitally, U₁₆15 feet and U₁₃Input be connected, U₁₃Outfan and the advanced green LED LED D of instructed voltage₅Negative pole be connected, D₅Positive pole by resistance R₁₂It is connected with+5V, U₁₆13 feet and U₁₄Input be connected, U₁₄Outfan and the advanced red light emitting diodes LED D of indicator current₆Negative pole be connected, D₆Positive pole by resistance R₁₃It is connected with+5V；

One time data application module, this time data application module has two kinds of application forms: when the power-factor measurement device applying power-factor measurement method is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, and device is called measurement type power-factor measurement device；When power-factor measurement device is applied to accuracy of measurement is required higher AC energy metering occasion, the time data application module in measurement apparatus adopts metering type time data application module, and device is called metering type power-factor measurement device；

When power-factor measurement device is applied to that accuracy of measurement is required relatively low common survey occasion, time data application module in measurement apparatus adopts measurement type time data application module, it includes the five, the six, seven, eight, nine, ten, 11 circuit units；

5th circuit unit is 10MHZ pulses generation and very frequency circuit, and the 1MHZ pulse of its output is input to the 6th circuit unit, and described 5th circuit unit includes 10MHZ crystal oscillator, 74LS04 hex inverter U₃₀, 74LS160 decimal scale coincidence counter U₂₉, resistance R₁₇、R₁₈、R₁₉, electric capacity C₆, its connection is, 74LS04 hex inverter U₃₀The 1st, connect resistance R between 2 feet₁₈, U₃₀The 3rd, connect R between 4 feet₁₉, U₃₀The 2nd, connect C between 3 feet₆, U₃₀The 1st, connect 10MHZ crystal oscillator, U between 4 feet₃₀The 2nd foot and the 13rd foot be connected, U₃₀The 12nd foot and 74LS160 decimal scale coincidence counter U₂₉The 2nd foot CP end be connected, U₂₉The 1st, 7,9 and 10 feet by resistance R₁₇It is connected with+5V power supply, U₂₉The 15th foot output 10MHZ 1MHZ pulse after very frequency, namely every microsecond is 1 pulse；

6th circuit unit is by four 74LS161 tetrad coincidence counter U₂₅、U₂₆、U₂₇、U₂₈16 binary time pulse counting circuits of be connected in sequence, its output be one by zero, be incremented by 16 bits of 1us every time, first, left side in these four enumerators, i.e. U₂₅The 14th foot be output 16 bits in lowest order, first, right side in these four enumerators, i.e. U₂₈The 11st foot be output 16 bits in highest order, its connection is, U₂₅The 15th foot connect U₂₆The 10th foot, U₂₆The 15th foot connect U₂₇The 10th foot, U₂₇The 15th foot connect U₂₈The 10th foot, the 2nd foot CP end and U of four enumerators₂₉The 15th foot be connected, the 7th of four enumerators the, 9 feet and U₂₅The 10th foot by resistance R₁₇It is connected with+5V power supply, the 1st foot of four enumeratorsThe U of end and the 4th circuit unit₁₁Outfan 2_OUTIt is connected；

7th circuit unit is a maintenance impulse circuit, by 74L,S08 42 input and door integrated circuit U₃₅In AND circuit constitute, its connection is, U₃₅1 foot and the output of the 6th circuit unit 16 bits in the 11st, i.e. U₂₇12 feet be connected, U₃₅2 feet and 16 bits in the 13rd, i.e. U₂₈14 feet be connected, U₃₅3 feet as the 7th circuit unit outfan time counting circuit start counting after 5120us time produce and export maintenance pulse, its pulse is input to the CP end of four bidirectional shift registers of the 9th circuit unit；

8th circuit unit be four being incorporated to-and go out 74LS194 that is 4 the bidirectional shift register U that mode works₃₁、U₃₂、U₃₃、U₃₄The time data buffering circuit being in turn connected into, its connection is, four enumerators of the 6th circuit unit totally 16 data output ends connect one to one 16 data input pins of the 8th circuit unit, namely U₂₅、U₂₆、U₂₇、U₂₈The 14th of each enumerator, 13,12,11 feet one_to_one corresponding successively access U₃₁、U₃₂、U₃₃、U₃₄The 3rd of each depositor, 4,5,6 feet；16 data input pin one_to_one corresponding of totally 16 data output ends and the 9th circuit unit of four depositors are connected, namely U₃₁、U₃₂、U₃₃、U₃₄The 15th of each depositor, 14,13,12 feet one_to_one corresponding successively access U₃₆、U₃₇、U₃₈、U₃₉The 3rd of each depositor, 4,5,6 feet；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 9th, 10 feet connect resistance R₂₀One end, resistance R₂₀The other end and+5V power supply connect, R₂₀One end by electric capacity C₇Connect digitally；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 1st footThe U of end and the 4th circuit unit₁₁Outfan 2_OUTIt is connected；Four depositor U₃₁、U₃₂、U₃₃、U₃₄The 11st foot CP end and the U of the 4th circuit unit₁₀Outfan 1_OUTIt is connected；

9th circuit unit be four being incorporated to-and go out 74LS194 that is 4 the bidirectional shift register U that mode works₃₆、U₃₇、U₃₈、U₃₉The time data holding circuit being in turn connected into, its connection is, four depositor U₃₆、U₃₇、U₃₈、U₃₉The 1st footEnd, 9,10 feet and resistance R₂₀One end be connected, R₂₀The other end and+5V power supply connect, R₂₀One end by electric capacity C₇Connect digitally；11st foot CP end and the outfan of the 7th circuit unit, i.e. U of four depositors₃₅3 feet be connected；Front 13 outfans in 16 data output ends of four depositors, namely from U₃₆The 15th foot rise, according to priority, the 14th, 13,12 feet, connecing down is U₃₇The 15th, 14,13,12 feet, then to connect down be U₃₈The 15th, 14,13,12 feet, be finally U₃₉The 15th foot, respectively successively with the tenth circuit unit, i.e. first memorizer U₄₀, second memorizer U₄₁13 address wire A in parallel₀～A₁₂One_to_one corresponding is connected；

Tenth circuit unit is arranged to two electrically erasable programmable ROM EEPROM2864, i.e. first memorizer U of 8K × 8 of the address wire parallel connection of read-only working method₄₀With second memorizer U₄₁13 articles of address wires in parallel and be connected with front 13 data output end sequentially one_to_one corresponding of the 9th circuit unit, two electrically erasable programmable ROM memory element have adopted the H that the form of four binary-decimal binary-coded decimals is stored in conversion table individualValue；Its connection is, first memorizer U₄₀With second memorizer U₄₁The 20th, 22 feet are by resistance R₂₁Connect digitally, first memorizer U₄₀With second memorizer U₄₁The 27th foot by resistance R₂₂Connect+5V power supply, first memorizer U₄₀With second memorizer U₄₁13 address wire A in parallel₀～A₁₂Successively with 16 data output ends of the 9th circuit unit in before 13 outfans, i.e. U₃₆、U₃₇、U₃₈15,14,13,12 foot and U₃₉15 foot one_to_one corresponding be connected, first memorizer U₄₀With second memorizer U₄₁Data-out port line I/O₀～I/O₇Totally 16 articles are connected with the 11st circuit unit；

11st circuit unit is used to the power factor that instant playback is testedValue, it includes BCD-seven-segment decoder/driver U₄₂、U₄₃、U₄₄、U₄₅；Current-limiting resistance R₂₃×7、R₂₄×7、R₂₅×7、R₂₆×7；Seven sections of common-anode LED nixie display U₄₆、U₄₇、U₄₈、U₄₉；The data-out port line I/O of two electrically erasable programmable ROMs of the input of the 11st circuit unit and the address wire parallel connection of the tenth circuit unit connects；Its method of attachment is, first memorizer U₄₀Data-out port line the 11st, 12,13,15 feet, i.e. I/O₀、I/O₁、I/O₂、I/O₃Successively and U₄₂7,1,2,6 feet be connected, its output and at U₄₆On be shown that in totally two storage bytes of two in parallel electrically erasable programmable ROMs of address wire first ten's digit of storage, first memorizer U₄₀Data-out port line the 16th, 17,18,19 feet, i.e. I/O₄、I/O₅、I/O₆、I/O₇Successively and U₄₃7,1,2,6 feet be connected, its output and at U₄₇On be shown that in totally two storage bytes of two in parallel electrically erasable programmable ROMs of address wire second ten's digit of storage, second memorizer U₄₁Data-out port line the 11st, 12,13,15 feet, i.e. I/O₀、I/O₁、I/O₂、I/O₃Successively and U₄₄7,1,2,6 feet be connected, its output and at U₄₈On be shown that in totally two storage bytes of two in parallel electrically erasable programmable ROMs of address wire the 3rd ten's digit of storage, second memorizer U₄₁Data-out port line the 16th, 17,18,19 feet, i.e. I/O₄、I/O₅、I/O₆、I/O₇Successively and U₄₅7,1,2,6 feet be connected, its output and at U₄₉On be shown that in two storage bytes of two in parallel electrically erasable programmable ROMs of address wire the 4th ten's digit of storage；U₄₂、U₄₃、U₄₄、U₄₅9～15 feet and current-limiting resistance R₂₃×7、R₂₄×7、R₂₅×7、R₂₆× 7 and seven-segment numeric indicator U₄₆、U₄₇、U₄₈、U₄₉Connect to realize digital-scroll technique accordingly；

When power-factor measurement device is applied to accuracy of measurement is required higher AC energy metering occasion, time data application module in measurement apparatus adopts metering type time data application module, and this module includes a gate circuit U in 42 input XOR gate integrated circuit 74LS86₁₀₁, a piece of crystal oscillator frequency at that time is the single-chip microcomputer 8031 i.e. U of 12MHZ₁₀₂, three eight rising edge d type flip flop 74LS377 and U₁₀₃、U₁₀₄、U₁₀₅With the H stored with binary-coded decimal form in conversion tableTwo electrically erasable programmable ROM EEPROM2864 i.e. first memorizer U that the address wire of value is in parallel₄₀, second memorizer U₄₁, single-chip microcomputer 8031 passes through P₀Mouth extension delivery outlet, utilizes two electrically erasable programmable ROMs of three eight rising edge d type flip flop 74LS377 and the parallel connection of this address wire to be attached, and the concrete connection of its circuit is: the U of the 4th circuit unit₁₀Outfan 1_OUTWith XOR gate U₁₀₁The 1st foot be connected, the U of the 4th circuit unit₁₁Outfan 2_OUTWith XOR gate U₁₀₁The 2nd foot and single-chip microcomputer 8031I.e. U₁₀₂The 13rd foot and the 12nd circuit unit in the U of pulse-delay unit₂₁Two inputs 1,2 foot be connected, XOR gate U₁₀₁The 3rd foot and single-chip microcomputer 8031I.e. U₁₀₂The 12nd foot be connected；8 of single-chip microcomputer P0 mouth line end feet by number ascending, namely press order sequentially correspondingly with the first eight rising edge d type flip flop U of P0.0 to P0.7₁₀₄8 data input pin 1D～8D be connected, first eight rising edge d type flip flop U₁₀₄8 data output end 1Q～8Q correspondingly with the second eight rising edge d type flip flop U₁₀₅8 data input pin 1D～8D be connected, the 3rd eight rising edge d type flip flop U₁₀₃8 data input pin 1D～8D sequentially correspondingly with the first eight rising edge d type flip flop U₁₀₄8 data input pin 1D～8D parallel connections be connected, the 3rd eight rising edge d type flip flop U₁₀₃8 data output end 1Q～8Q and first memorizer U₄₀Low eight address line end foot by number ascending, be namely sequentially attached correspondingly by the order of A0 to A7, second eight rising edge d type flip flop U₁₀₅8 data output ends in 1Q～5Q and first memorizer U₄₀High five address line end foot by number ascending, be namely sequentially attached correspondingly by the order of A8 to A12, single-chip microcomputer U₁₀₂The 16th foot, namelyEnd foot and three eight rising edge d type flip flop U₁₀₃、U₁₀₄、U₁₀₅The 11st foot, namely CP end foot be connected, single-chip microcomputer U₁₀₂The 27th foot, i.e. P2.6 foot and first eight rising edge d type flip flop U₁₀₄The 1st foot, namelyEnd foot is connected, single-chip microcomputer U₁₀₂The 28th foot, namely P2.7 foot is simultaneously and second eight rising edge d type flip flop U₁₀₅, the 3rd eight rising edge d type flip flop U₁₀₃The 1st foot, namelyEnd foot is connected, second memorizer U₄₁Address line end foot A0～A12 and first memorizer U₄₀Address line end foot A0～A12 carry out correspondingly parallel connection connection；Set single-chip microcomputer U₁₀₂The address date of 16 bits of two bytes of its P0 mouth output be arranged in order to highest order by lowest order, point secondary, each byte deliver to 8 data input pins of eight rising edge d type flip flops, wherein first time delivers to first eight rising edge d type flip flop U₁₀₄The data of 8 data input pins be the address of high byte, till this address date plays sixteen bit from the 9th of this 16 bit the, successively, the 9th corresponding to the 1D of eight 8 data input pins of rising edge d type flip flop, the tenth corresponding to 2D ... sixteen bit corresponding to 8D；Second time delivers to the 3rd eight rising edge d type flip flop U₁₀₃The data of 8 data input pins be the address of low byte, till this address date plays the 8th from first of this 16 bit, first successively corresponds to 8D corresponding to the 1D of eight 8 data input pins of rising edge d type flip flop, second corresponding to 2D ... the 8th；Divide the two byte address data that secondary is sent at the 3rd eight rising edge d type flip flop U₁₀₃, second eight rising edge d type flip flop U₁₀₅13 binary storage device address codes arranging in order from low to high of data output end interruption-forming one and the 3rd eight rising edge d type flip flop U₁₀₃Data-out port 1Q～8Q and second eight rising edge d type flip flop U₁₀₅Data-out port 1Q～5Q and two address wires, first memorizer U in parallel₄₀, second memorizer U₄₁Address end foot A0～A12 have annexation one to one.

2. the measurement apparatus of a kind of power factor according to claim 1, it is characterized in that: described metering type time data application module also includes peripheral component and circuit, peripheral component and circuit include the circuit that the off-chip program storage of extension is connected of the 8D latch 74LS373 with ternary output with single-chip microcomputer 8031, the circuit that the time crystal oscillator that frequency is 12MHZ is connected with single-chip microcomputer 8031, needed for instant playback power factor data, BCD-seven-segment decoder/driver, the display circuit that current-limiting resistance and LED seven-segment numeric indicator are connected.

3. the measurement apparatus of a kind of power factor according to claim 2, it is characterized in that: when described device adopts metering type time data application module, it is then made to become measurement type time data application module interlock circuit one amendment of do of this metering type time data application module: namely, to disconnect U₁₁Outfan 2_OUTWith single-chip microcomputer U₁₀₂13rd foot, namelyBetween connecting line.