CN205140977U - Power MOS field effect transistor of integrated depletion type starter - Google Patents
Power MOS field effect transistor of integrated depletion type starter Download PDFInfo
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- CN205140977U CN205140977U CN201520890627.9U CN201520890627U CN205140977U CN 205140977 U CN205140977 U CN 205140977U CN 201520890627 U CN201520890627 U CN 201520890627U CN 205140977 U CN205140977 U CN 205140977U
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- 230000005669 field effect Effects 0.000 title claims abstract description 77
- 239000007858 starting material Substances 0.000 title claims abstract description 17
- 210000000746 body region Anatomy 0.000 claims description 18
- 238000002955 isolation Methods 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 230000000903 blocking effect Effects 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 238000005530 etching Methods 0.000 description 4
- 238000005265 energy consumption Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000019771 cognition Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The utility model relates to a power MOS field effect transistor of integrated depletion type starter, including enhancement mode MOS field effect transistor, depletion type MOS field effect transistor and POLY resistance, enhancement mode MOS field effect transistor and depletion type MOS field effect transistor common drain are connected, depletion type MOS field effect transistor's grid and source electrode have concatenated POLY resistance within a definite time, draw forth the drain electrode of regarding as power MOS field effect transistor with enhancement mode MOS field effect transistor and depletion type MOS field effect transistor common drain, draw forth enhancement mode MOS field effect transistor's grid at the first grid electrode of regarding as power MOS field effect transistor, draw forth enhancement mode MOS field effect transistor's source electrode the first source electrode of regarding as power MOS field effect transistor, draw forth the second source electrode of regarding as power MOS field effect transistor with depletion type MOS field effect transistor's source electrode with the link of POLY resistance, draw forth the second gate electrode of regarding as power MOS field effect transistor with depletion type MOS field effect transistor's grid with the link of POLY resistance. Design complexity and reduce cost have been simplified in the low -power consumption of whole power MOS field effect transistor.
Description
Technical field
The utility model relates to a kind of semiconductor power device, particularly relates to a kind of MOS field effect tube, specifically a kind of MOS field effect tube of integrated depletion type starter.
Background technology
As shown in Figure 1, the start-up circuit 101 in AC-DC Switching Power Supply and pwm circuit 102 integrate the control circuit forming power supply to the structured flowchart of tradition AC-DC Switching Power Supply, and adopt power switch pipe M1 as output stage connecting valve SW.When the circuit is operating, control circuit output drive signal controls the switch of power switch pipe M1.In most cases, start-up circuit 101 on power supply in control circuit and be for start-up circuit 101 is powered by starting resistance R1 between AC power ACIN, but because starting resistance R1 is in system standby process, there is energy consumption always, cause system standby power dissipation ratio comparatively large, the efficiency requirement of increasingly stringent cannot be met.Low-energy-efficiency requirement is met in order to make AC-DC switch power supply system, in prior art, the high-pressure MOS field effect transistor M2 that adopts replaces traditional high energy consumption starting resistance R1 for (shown in accompanying drawing 2) between AC power ACIN and start-up circuit 101 more, and adopt high pressure integrated technique to be integrated in control circuit by high-pressure MOS field effect transistor (high voltage startup pipe) M2, while reducing circuit power consumption, increase circuit level.But the high pressure integrated technique more complicated that this kind of method adopts, and cost is high, indirectly adds the production cost of AC-DC Switching Power Supply, reduces the economic benefit of AC-DC Switching Power Supply production firm.Therefore, a kind of energy consumption of exigence is low and production technology simple semiconductor power starter overcomes above-mentioned technical problem.
Utility model content
The utility model is just for the technical problem existed in prior art, a kind of MOS field effect tube of integrated depletion type starter is provided, depletion mode MOSFET is integrated in MOS field effect tube, for while opening AC-DC Switching Power Supply start-up circuit also for output switch, realize the stand-by power consumption originally reducing AC-DC switch power supply system with lower one-tenth.
To achieve these goals, the technical solution adopted in the utility model is, a kind of MOS field effect tube of integrated depletion type starter, comprise enhancement mode MOSFET, depletion mode MOSFET and POLY resistance, described enhancement mode MOSFET is connected with depletion mode MOSFET common drain, POLY resistance is serially connected with between the grid of described depletion mode MOSFET and source electrode, enhancement mode MOSFET and depletion mode MOSFET common drain are drawn the drain electrode as MOS field effect tube, the grid of enhancement mode MOSFET is drawn the first grid electrode as MOS field effect tube, the source electrode of enhancement mode MOSFET is drawn the first source electrode as MOS field effect tube, the link of the source electrode of depletion mode MOSFET and POLY resistance is drawn the second source electrode as MOS field effect tube, the link of the grid of depletion mode MOSFET and POLY resistance is drawn the second gate electrode as MOS field effect tube.
Improve as one of the present utility model, described enhancement mode MOSFET adopts P-channel enhancement type metal-oxide-semiconductor field effect transistor, and described depletion mode MOSFET adopts P channel depletion type metal-oxide-semiconductor field effect transistor.
A kind of MOS field effect tube of integrated depletion type starter, this MOS field effect tube specifically comprises N+ substrate, N-epitaxial loayer, multiple P body region (p-body), the first source region, the second source region, first grid region, second grid region and POLY resistance, described N-epitaxial loayer is formed on N+ substrate, and N+ substrate draws drain electrode; In N-epitaxial loayer, be provided with multiple P body region, in P body region, be formed with PN junction, the first source region and the second source region all contact with PN junction, and draw the first source electrode and the second source electrode respectively from the first source region and the second source region; N-epitaxial loayer between two PN junctions that first source region contacts is provided with first grid region, N-epitaxial loayer between two PN junctions that second source region contacts is provided with second grid region, the bottom in described first grid region and second grid region is provided with silicon dioxide insulating layer, draws first grid electrode and second gate electrode respectively from first grid region and second grid region; N-epitaxial loayer outside the P body region contacted with the second source region is provided with POLY resistance.The deviation of POLY resistance is little, and temperature coefficient can control, and does not need independent island simultaneously.
Improve as one of the present utility model, be also provided with DVT lithography layer in the below in second grid region, to ensure that its threshold voltage can reach designing requirement.
Improve as one of the present utility model, the level that can exist in the course of the work in the first source electrode due to this MOS field effect tube is 0V, and the level in the second source electrode may reach 30V, therefore need between the first source region and the second source region, insert at least one P body region and form isolation structure, the number of the P body region that isolation structure inserts and the length of isolation structure directly determine it and isolate withstand voltage size.
Improve as one of the present utility model, in order to save area, described POLY resistance is placed on the top of isolation structure.
Improve as one of the present utility model; when encapsulating this MOS field effect tube; depletion mode MOSFET and POLY resistance are placed on one jiao of enhancement mode MOSFET; POLY resistance ring adopts isolation structure and enhancement mode MOSFET to carry out insulation blocking around depletion mode MOSFET after one week; and adopt guard ring (Ring) around meeting VDD after enhancement mode MOSFET, depletion mode MOSFET and POLY resistance one week, and then avoid this MOS field effect tube to there is latch-up as far as possible.
Relative to prior art, the utility model, by greatly reducing the power consumption of circuit in the mode of the inner integrated high voltage depletion mode MOSFET of enhancement mode MOSFET, has met the high energy efficiency requirement of AC-DC switch power supply system; Also greatly simplify the semiconductor fabrication process of half-bridge drive circuit, the high voltage half-bridge technique of complex and expensive need not be used, simplify complex circuit designs degree, add circuit level, and reduce circuit layout area, reduce circuit production cost; The mode that whole MOS field effect tube adopts constant current to drive, can realize low circuit power consumption, and simplify circuit design, enhance the stability of AC-DC switch power supply system.
Accompanying drawing explanation
Fig. 1 is the AC-DC switching power circuit structured flowchart of existing employing starting resistance.
Fig. 2 is the AC-DC switching power circuit structured flowchart of existing employing high voltage startup pipe.
Fig. 3 is the circuit theory diagrams of the MOS field effect tube that the utility model proposes.
Fig. 4 is the structural representation of the MOS field effect tube that the utility model proposes.
Fig. 5 is the encapsulation schematic diagram of the MOS field effect tube that the utility model proposes.
Fig. 6 is the AC-DC switching power circuit structured flowchart adopting the MOS field effect tube that the utility model proposes.
Embodiment
In order to deepen understanding and cognition of the present utility model, below in conjunction with accompanying drawing the utility model be further described and introduce.
As shown in Figure 3, a kind of MOS field effect tube of integrated depletion type starter, comprise enhancement mode MOSFET M1, depletion mode MOSFET M2 and POLY resistance R1, described enhancement mode MOSFET M1 is connected with depletion mode MOSFET M2 common drain, POLY resistance R1 is serially connected with between the grid of described depletion mode MOSFET M2 and source electrode, enhancement mode MOSFET M1 and depletion mode MOSFET M2 common drain are drawn the drain electrode D as MOS field effect tube, the grid of enhancement mode MOSFET M1 is drawn the first grid electrode G1 as MOS field effect tube, the source electrode of enhancement mode MOSFET M1 is drawn the first source electrode S1 as MOS field effect tube, the link of the source electrode of depletion mode MOSFET M2 and POLY resistance R1 is drawn the second source electrode S2 as MOS field effect tube, the link of the grid of depletion mode MOSFET M2 and POLY resistance R1 is drawn the second gate electrode G2 as MOS field effect tube.
As shown in Figure 3, preferably, described enhancement mode MOSFET M1 adopts P-channel enhancement type metal-oxide-semiconductor field effect transistor M1, and described depletion mode MOSFET M2 adopts P channel depletion type metal-oxide-semiconductor field effect transistor M2.
As shown in Figure 4, adopt the MOS field effect tube of above-mentioned fabrication process, structure specifically comprises N+ substrate, N-epitaxial loayer, four P body region (p-body), the first source region, the second source region, first grid region, second grid region and POLY resistance R1, described N-epitaxial loayer is formed on N+ substrate, and N+ substrate is drawn drain electrode D; Four P body region are provided with in N-epitaxial loayer, PN junction is formed in P body region, first source region and the second source region all contact with PN junction, and draw the first source electrode S1 and the second source electrode S2 respectively from the first source region and the second source region; N-epitaxial loayer between two PN junctions that first source region contacts is provided with first grid region, N-epitaxial loayer between two PN junctions that second source region contacts is provided with second grid region, the bottom in described first grid region and second grid region is provided with silicon dioxide insulating layer, draws first grid electrode G1 and second gate electrode G2 from first grid region and second grid region respectively; N-epitaxial loayer outside the P body region contacted with the second source region is provided with POLY resistance R1.
As shown in Figure 4, preferably, DVT lithography layer is also provided with in the below in second grid region, to ensure that its threshold voltage can reach designing requirement.
As shown in Figure 4, still more preferably, the level that can exist in the course of the work on the first source electrode S1 due to this MOS field effect tube is 0V, and the level on the second source electrode S2 may reach 30V, therefore need between the first source region and the second source region, insert multiple P body region and form isolation structure, the number of the P body region that isolation structure inserts and the length (size L1, L2, L3) of isolation structure directly determine it and isolate withstand voltage size.
As shown in Figure 4, still more preferably, in order to save area, described POLY resistance R1 is placed on the top of isolation structure, and can be produced the resistance of different size resistance by the injection zone of control NSD.
Realize the MOS field effect tube that above-mentioned integrated depletion mode MOSFET M2 and POLY resistance R1 is formed in enhancement mode MOSFET M1, need to carry out improvement adjustment to the manufacturing process of traditional MOS field effect tube, need to increase Pbody and DVT photoetching level.Therefore, the complete technological process manufacturing the MOS field effect tube of described integrated depletion type starter is as follows: oxidation → terminal photoetching → terminal injection → field oxygen → active area photoetching → Pbody photoetching → Pbody injection → DVT photoetching → DVT injection → polycrystalline deposition → polycrystalline photoetching → polycrystal etching → NSD photoetching → NSD injection → contact hole photoetching → contact hole etching → PSD injection → Metal deposit → Metal photoetching → Metal etching → passivation layer deposit → passivation layer photoetching → passivation layer etching.
As shown in Figure 5; when encapsulating above-mentioned MOS field effect tube; depletion mode MOSFET M2 and POLY resistance R1 is placed on one jiao of enhancement mode MOSFET M1; POLY resistance R1 adopts isolation structure and enhancement mode MOSFET M1 to carry out insulation blocking around depletion mode MOSFET M2 after mono-week; and adopt Ring around meeting VDD after enhancement mode MOSFET M1, depletion mode MOSFET M2 and POLY resistance R1 mono-week, and then avoid above-mentioned MOS field effect tube to there is latch-up as far as possible.
As shown in Figure 6, enhancement mode MOSFET in MOS field effect tube 204 is connected with depletion mode MOSFET common drain, POLY resistance R1 is serially connected with between the grid of described depletion mode MOSFET and source electrode, the drain electrode connecting valve SW of above-mentioned MOS field effect tube, first source electrode ground connection, first grid Electrode connection start-up circuit 201 and pwm circuit 202 are integrated in one piece of control circuit 203, second source electrode formed and are all connected with start-up circuit 201 with second gate electrode.This kind of structure achieves the stand-by power consumption originally reducing AC-DC switch power supply system with lower one-tenth, and also improves the stability of system.
It should be noted that above-described embodiment, be not used for limiting protection range of the present utility model, equivalents done on the basis of technique scheme or the alternative scope all falling into the utility model claim and protect.In the claims, word " comprises " and does not get rid of existence and do not arrange element in the claims or step.First, second use of word does not represent any order, can be title by these word explanations.
Claims (7)
1. the MOS field effect tube of an integrated depletion type starter, it is characterized in that: comprise enhancement mode MOSFET, depletion mode MOSFET and POLY resistance, described enhancement mode MOSFET is connected with depletion mode MOSFET common drain, POLY resistance is serially connected with between the grid of described depletion mode MOSFET and source electrode, the drain electrode as MOS field effect tube is drawn in the total drain electrode of enhancement mode MOSFET and depletion mode MOSFET, the grid of enhancement mode MOSFET is drawn the first grid electrode as MOS field effect tube, the source electrode of enhancement mode MOSFET is drawn the first source electrode as MOS field effect tube, the link of the source electrode of depletion mode MOSFET and POLY resistance is drawn the second source electrode as MOS field effect tube, the link of the grid of depletion mode MOSFET and POLY resistance is drawn the second gate electrode as MOS field effect tube.
2. the MOS field effect tube of a kind of integrated depletion type starter as claimed in claim 1, it is characterized in that, described enhancement mode MOSFET adopts P-channel enhancement type metal-oxide-semiconductor field effect transistor, and described depletion mode MOSFET adopts P channel depletion type metal-oxide-semiconductor field effect transistor.
3. the MOS field effect tube of a kind of integrated depletion type starter as claimed in claim 2, it is characterized in that, described MOS field effect tube comprises N+ substrate, N-epitaxial loayer, multiple P body region, the first source region, the second source region, first grid region, second grid region and POLY resistance, described N-epitaxial loayer is formed on N+ substrate, and N+ substrate draws drain electrode; In N-epitaxial loayer, be provided with multiple P body region, in P body region, be formed with PN junction, the first source region and the second source region all contact with PN junction, and draw the first source electrode and the second source electrode respectively from the first source region and the second source region; N-epitaxial loayer between two PN junctions that first source region contacts is provided with first grid region, N-epitaxial loayer between two PN junctions that second source region contacts is provided with second grid region, the bottom in described first grid region and second grid region is provided with silicon dioxide insulating layer, draws first grid electrode and second gate electrode respectively from first grid region and second grid region; N-epitaxial loayer outside the P body region contacted with the second source region is provided with POLY resistance.
4. the MOS field effect tube of a kind of integrated depletion type starter as claimed in claim 3, is characterized in that, be also provided with DVT lithography layer in the below in second grid region.
5. the MOS field effect tube of a kind of integrated depletion type starter as claimed in claim 3, it is characterized in that, between the first source region and the second source region, insert at least one P body region form isolation structure, the number of the P body region that isolation structure inserts and the length of isolation structure directly determine the withstand voltage size of isolation.
6. the MOS field effect tube of a kind of integrated depletion type starter as claimed in claim 3, it is characterized in that, described POLY resistance is placed on the top of isolation structure.
7. the MOS field effect tube of a kind of integrated depletion type starter as described in claim 1 or 3; it is characterized in that; when encapsulating described MOS field effect tube; depletion mode MOSFET and POLY resistance are placed on one jiao of enhancement mode MOSFET; POLY resistance ring adopts isolation structure and enhancement mode MOSFET to carry out insulation blocking after depletion mode MOSFET one week, and adopts guard ring around enhancement mode MOSFET, depletion mode MOSFET and POLY resistance one week afterwards and meet VDD.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520890627.9U CN205140977U (en) | 2015-11-09 | 2015-11-09 | Power MOS field effect transistor of integrated depletion type starter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520890627.9U CN205140977U (en) | 2015-11-09 | 2015-11-09 | Power MOS field effect transistor of integrated depletion type starter |
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| CN205140977U true CN205140977U (en) | 2016-04-06 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105304627A (en) * | 2015-11-09 | 2016-02-03 | 苏州锴威特半导体有限公司 | Power MOS field effect transistor integrated with depletion startup device |
| CN108155187A (en) * | 2018-01-16 | 2018-06-12 | 上海南麟电子股份有限公司 | Switching power circuit, semiconductor power device and preparation method thereof |
-
2015
- 2015-11-09 CN CN201520890627.9U patent/CN205140977U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105304627A (en) * | 2015-11-09 | 2016-02-03 | 苏州锴威特半导体有限公司 | Power MOS field effect transistor integrated with depletion startup device |
| CN105304627B (en) * | 2015-11-09 | 2019-06-04 | 苏州锴威特半导体有限公司 | A kind of MOS field effect tube of integrated depletion type starter |
| CN108155187A (en) * | 2018-01-16 | 2018-06-12 | 上海南麟电子股份有限公司 | Switching power circuit, semiconductor power device and preparation method thereof |
| CN108155187B (en) * | 2018-01-16 | 2024-01-19 | 上海南麟电子股份有限公司 | Switching power supply circuit, semiconductor power device and preparation method thereof |
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Address after: 215600 Shazhou Lake Science Park Building A1, 9 Floors, Yangshe Town, Zhangjiagang City, Suzhou City, Jiangsu Province Patentee after: Suzhou Covette Semiconductor Co., Ltd. Address before: 511, building 1, building B, science and Technology Pioneer Park, 215600 Cathay Pacific Road, Zhangjiagang economic and Technological Development Zone, Suzhou, Jiangsu, China Patentee before: Iron of fine quality Witter, Suzhou Semiconductor Co., Ltd |