CN204886694U - High precision low power dissipation charge pump circuit - Google Patents
High precision low power dissipation charge pump circuit Download PDFInfo
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- CN204886694U CN204886694U CN201520682625.0U CN201520682625U CN204886694U CN 204886694 U CN204886694 U CN 204886694U CN 201520682625 U CN201520682625 U CN 201520682625U CN 204886694 U CN204886694 U CN 204886694U
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- charge pump
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Abstract
The utility model discloses a high precision low power dissipation charge pump circuit, include: voltage testing for output voltage to the charge pump detects, and output enable signal to charge pump, the counter, it is right to be used for enable signal's messenger can time the phase, and adjustment waveform generator produces pulse signal's frequency when making the ability phase be less than or being higher than the setting value, waveform generator produces pulse signal refreshes voltage detection circuit to voltage detection circuit test frequency, the charge pump is used for export target voltage under enable signal's the control. The embodiment of the utility model provides an increased and refreshed the frequency control function, can reckon by time the phase to enable signal's messenger through the counter, can be less than the phase or adjustment waveform generator produced pulse signal when being higher than the setting value frequency when making, and then refreshed the self -adjusting to voltage testing's test frequency, under the prerequisite of guaranteeing stabilization of output, the waste of furthest reduction consumption.
Description
Technical field
The utility model embodiment relates to circuit engineering field, particularly relates to a kind of charge pump circuit.
Background technology
Charge pump circuit, as the basic module of flash storage, determines the program/erase speed of Flash to a great extent.Along with the development of integrated circuit, based on the consideration of low-power consumption, low cost, charge pump circuit application is in integrated circuits more and more extensive.
The basic functional principle of charge pump be by electric capacity to the build-up effect of electric charge the output voltage of lifting charge pump.Due to the existence of leakage current, charge pump needs testing circuit to detect output voltage, when output voltage is started working lower than charge pump during target voltage, output voltage is lifted to target voltage.Often pair of output voltage detects a capital and extracts electric current from output voltage terminal, if carry out detecting the waste that will cause very large power consumption to output voltage continually, if but every just detecting once to output voltage for a long time, it is very large that output voltage will depart from target voltage, makes output voltage very unstable.
In sum, in order under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption, need to control the detection frequency of testing circuit.
Utility model content
The utility model provides a kind of charge pump circuit, to realize, under the prerequisite ensureing output voltage stabilization, farthest reducing the waste of power consumption.
The utility model embodiment provides a kind of charge pump circuit, comprising: voltage detection module, and for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working; Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point; Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter; Charge pump, for exporting target voltage under the control of described enable signal.
Described charge pump is positive voltage charge pump.
Described voltage detecting circuit is made up of the first resistance, the second resistance, a comparator and an enable switch; Wherein said first resistance is connected with described enable switch with one end after the second resistant series, and the other end is connected with described electric charge delivery side of pump; The in-phase input end input reference voltage of described comparator, inverting input is connected between described first resistance and the second resistance, output output enable signal.
The charge pump circuit that the utility model embodiment provides, add refreshing frequency controlling functions, timing is carried out by the enable phase of counter to enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point, and then refreshing self-adjusting is carried out to the detection frequency of voltage detection module, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption.
Accompanying drawing explanation
Fig. 1 is a kind of charge pump circuit block diagram that the utility model embodiment one provides;
Fig. 2 is the wave form varies figure of pulse signal RF_EN and PUMP_EN of the output voltage VouT that provides of the utility model embodiment one and correspondence;
Fig. 3 is the circuit diagram of the voltage detecting circuit that the utility model embodiment two provides.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail.Be understandable that, specific embodiment described herein only for explaining the utility model, but not to restriction of the present utility model.It also should be noted that, for convenience of description, illustrate only the part relevant to the utility model in accompanying drawing but not entire infrastructure.
Embodiment one
A kind of charge pump circuit block diagram that Fig. 1 provides for the utility model embodiment one, the present embodiment is applicable in the integrated circuit of low-power consumption.A kind of charge pump circuit block diagram that the present embodiment provides, as shown in Figure 1, comprise voltage detection module, for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working; Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point; Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter; Charge pump, for exporting target voltage under the control of described enable signal.
Wherein, described charge pump is preferably positive voltage charge pump.
Due to the existence of leakage current (Ileak), the output voltage of charge pump as shown in Figure 1 VouT constantly can decline from target voltage, so charge pump needs voltage detecting circuit to detect output voltage, output voltage VouT carries out work lower than charge pump during target voltage Vtarg, and VouT is lifted to target voltage again.During each detection, voltage detecting circuit needs to extract electric current from VouT, causes the waste of power consumption, in order to reduce circuit power consumption, can flush mechanism be adopted, with certain frequency cut-in voltage testing circuit, often open once, VouT is detected once, VouT is lifted back target voltage again.Open frequency is lower, and the power wastage that voltage detecting circuit causes is less, but voltage drop value is larger simultaneously, causes output voltage unstable.Suppose that voltage detecting circuit is opened once every time t0, then voltage drop value V0=Ileak*t0/Cld, wherein Ileak is transistor drain current, cannot avoid also cannot measuring, if t0 is set to fixed value, then V0 value cannot be estimated, and when leakage current Ileak is excessive, may to depart from target voltage excessively far away for the output voltage VouT of charge pump.So need the open frequency constantly adjusting voltage detecting circuit according to the output voltage of charge pump, under not only ensureing the prerequisite of output voltage stabilization, do not cause the significant wastage of power consumption.
For achieving the above object, suppose that charge pump provides the ability of electric current to be Ipump, then output voltage VouT is lifted back the time t1=V0*Cld/Ipump that target voltage needs, namely the enable phase of the enable signal of starting resistor testing circuit is t1, suppose that t1 corresponding V0 in interval [Tmin, Tmax] scope is design load.With counter, t1 is detected, if t1>Tmax, then accelerate the frequency that waveform generator produces pulse (RF_EN), and then accelerate the detection frequency of voltage detecting circuit, constantly start charge pump in order to reduce the drop-out value V0 of output voltage, if t1<Tmin, then reduce the frequency that waveform generator produces pulse (RF_EN), and then reduce the detection frequency of voltage detecting circuit, in order to reduce power consumption.
It should be noted that, in Fig. 1, Cld represents the ability that charge pump provides electric charge.
In order to clearly understand the course of work of above-mentioned charge pump circuit, Fig. 2 gives the wave form varies figure of pulse signal RF_EN and PUMP_EN of output voltage VouT and correspondence, in figure, V0 and V2 represents that output voltage VouT departs from the value of target voltage, and V0 is greater than V2; T1 and t3 represents the pulsewidth of enable signal PUMP_EN, and t1 is greater than t3; T0 and t2 represents the sense cycle of voltage detecting circuit.
The technical scheme of the present embodiment, timing is carried out by the enable phase of counter to enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point, and then refreshing self-adjusting is carried out to the detection frequency of voltage detection module, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption
Embodiment two
On the basis of above-described embodiment, as a preferred embodiment, Fig. 3 gives the physical circuit figure of described voltage detecting circuit, as shown in Figure 3: described voltage detecting circuit is made up of the first resistance R0, the second resistance R1, an a comparator D1 and enable switch KM_EN; After wherein said first resistance R0 connects with the second resistance R2, one end is connected with described enable switch KM_EN, and the other end is connected with the output end vo uT of described charge pump; The in-phase input end input reference voltage Vref of described comparator D1, inverting input is connected to Vin between described first resistance and the second resistance, output output enable signal PUMP_EN.
Wherein, reference voltage Vref is set point, described enable switch KM_EN is normal open switch, ground connection after only having when voltage detecting circuit starts to detect output voltage described enable switch KM_EN closed, when Vin is less than Vref, output enable signal PUMP_EN starts charge pump and starts working output voltage is raised to target voltage.
The technical scheme of the present embodiment, by voltage detecting circuit, detection output enable signal PUMP_EN startup charge pump is carried out to the output voltage of charge pump and output voltage is raised to target voltage, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption.
Note, above are only preferred embodiment of the present utility model and institute's application technology principle.Skilled person in the art will appreciate that the utility model is not limited to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and protection range of the present utility model can not be departed from.Therefore, although be described in further detail the utility model by above embodiment, but the utility model is not limited only to above embodiment, when not departing from the utility model design, can also comprise other Equivalent embodiments more, and scope of the present utility model is determined by appended right.
Claims (3)
1. a charge pump circuit, is characterized in that, this circuit comprises:
Voltage detection module, for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working;
Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point;
Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter;
Charge pump, for exporting target voltage under the control of described enable signal.
2. circuit according to claim 1, is characterized in that, described charge pump is positive voltage charge pump.
3. circuit according to claim 1, is characterized in that, described voltage detecting circuit is made up of the first resistance, the second resistance, a comparator and an enable switch; Wherein said first resistance is connected with described enable switch with one end after the second resistant series, and the other end is connected with described electric charge delivery side of pump; The in-phase input end input reference voltage of described comparator, inverting input is connected between described first resistance and the second resistance, output output enable signal.
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CN201520682625.0U CN204886694U (en) | 2015-09-06 | 2015-09-06 | High precision low power dissipation charge pump circuit |
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CN201520682625.0U CN204886694U (en) | 2015-09-06 | 2015-09-06 | High precision low power dissipation charge pump circuit |
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CN204886694U true CN204886694U (en) | 2015-12-16 |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105119485A (en) * | 2015-09-06 | 2015-12-02 | 北京兆易创新科技股份有限公司 | Charge pump circuit |
CN105895159A (en) * | 2016-04-20 | 2016-08-24 | 北京兆易创新科技股份有限公司 | Voltage detection circuit and FLASH memorizer |
CN105913874A (en) * | 2016-04-20 | 2016-08-31 | 合肥格易集成电路有限公司 | Voltage detection circuit and FLASH memory |
EP3291430A1 (en) * | 2016-08-29 | 2018-03-07 | ELMOS Semiconductor Aktiengesellschaft | Loading plan for generating an output voltage by multiplying a dc operating voltage |
CN110956985A (en) * | 2018-09-21 | 2020-04-03 | 合肥格易集成电路有限公司 | Memory control circuit and method and nonvolatile memory |
-
2015
- 2015-09-06 CN CN201520682625.0U patent/CN204886694U/en not_active Withdrawn - After Issue
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105119485A (en) * | 2015-09-06 | 2015-12-02 | 北京兆易创新科技股份有限公司 | Charge pump circuit |
CN105895159A (en) * | 2016-04-20 | 2016-08-24 | 北京兆易创新科技股份有限公司 | Voltage detection circuit and FLASH memorizer |
CN105913874A (en) * | 2016-04-20 | 2016-08-31 | 合肥格易集成电路有限公司 | Voltage detection circuit and FLASH memory |
CN105913874B (en) * | 2016-04-20 | 2019-11-29 | 合肥格易集成电路有限公司 | A kind of voltage detecting circuit and FLASH memory |
CN105895159B (en) * | 2016-04-20 | 2020-01-21 | 北京兆易创新科技股份有限公司 | Voltage detection circuit and FLASH memory |
EP3291430A1 (en) * | 2016-08-29 | 2018-03-07 | ELMOS Semiconductor Aktiengesellschaft | Loading plan for generating an output voltage by multiplying a dc operating voltage |
CN107800290A (en) * | 2016-08-29 | 2018-03-13 | 艾尔默斯半导体股份公司 | For producing the charge pump of output voltage by doubling DC operating voltages |
CN107800290B (en) * | 2016-08-29 | 2021-01-08 | 艾尔默斯半导体欧洲股份公司 | Charge pump for generating an output voltage by multiplying a DC operating voltage |
CN110956985A (en) * | 2018-09-21 | 2020-04-03 | 合肥格易集成电路有限公司 | Memory control circuit and method and nonvolatile memory |
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Legal Events
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
AV01 | Patent right actively abandoned | ||
AV01 | Patent right actively abandoned |
Granted publication date: 20151216 Effective date of abandoning: 20180403 |