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CN204576478U - A kind of high speed hard-disk based on Dram - Google Patents

A kind of high speed hard-disk based on Dram Download PDF

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Publication number
CN204576478U
CN204576478U CN201520189513.1U CN201520189513U CN204576478U CN 204576478 U CN204576478 U CN 204576478U CN 201520189513 U CN201520189513 U CN 201520189513U CN 204576478 U CN204576478 U CN 204576478U
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CN
China
Prior art keywords
dram
chip
hard
disk
hard disk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201520189513.1U
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Chinese (zh)
Inventor
邹汪平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chizhou Vocational and Technical College
Original Assignee
Chizhou Vocational and Technical College
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Filing date
Publication date
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Priority to CN201520189513.1U priority Critical patent/CN204576478U/en
Application granted granted Critical
Publication of CN204576478U publication Critical patent/CN204576478U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)

Abstract

The utility model relates to a kind of high speed hard-disk based on Dram, this high speed hard-disk comprises can resolve SATA serial line interface and the SATA interface chip of data communication, the hard disk controlling chip controlling hard disk operational state, Dram control chip, Dram array and standby power supply circuit composition, described SATA interface chip is connected with described hard disk controlling chip, described hard disk controlling chip is then connected with described Dram control chip and standby power supply circuit respectively, and described Dram control chip is then connected with described Dram array.Because the access speed of Dram is fast, therefore the theory of the high speed hard-disk based on Dram of the present utility model just can reach the peak velocity of SATA interface, thus significantly improves the access speed of hard disk.The high speed hard-disk realized based on Dram of the present utility model can realize superfast read or write speed, is 100 times of standard machinery hard disk, solid state hard disc 20 times.

Description

A kind of high speed hard-disk based on Dram
[technical field]
The utility model relates to hard disc of computer, particularly a kind of high speed hard-disk based on Dram.
[background technology]
Along with the development of computer technology, active computer CPU speed goes is fast, and memory size and speed have and significantly promotes.Although hard disc of computer capacity is in continuous increasing, access speed slower development.In the computing machine of reality uses, hard disk was accessed also becomes computer run inefficiency slowly really, the principal element of even stuck case.Os starting, when opening large software, when running a large amount of disk read-write program, now the occupancy of CPU is not high in frequent flicker for hard disk indication lamp, and hard disk becomes the short slab of limiting computer performance.Although the appearance of solid state hard disc alleviates this problem to a certain extent, expensive, and serviceable life is shorter, cannot meet the user demand of a large amount of disk read-write.
[utility model content]
The utility model middle hard disk that is intended to solve the problem is shorter for serviceable life, cannot meet the user demand of a large amount of disk read-write, and provide a kind of high speed hard-disk based on Dram that significantly can improve access speed.
For achieving the above object, the utility model provides a kind of high speed hard-disk based on Dram, it is characterized in that, this high speed hard-disk comprises can resolve SATA serial line interface and the SATA interface chip of data communication, control the hard disk controlling chip of hard disk operational state, Dram control chip, Dram array and standby power supply circuit composition, described SATA interface chip is connected with described hard disk controlling chip, described hard disk controlling chip is then connected with described Dram control chip and standby power supply circuit respectively, described Dram control chip is then connected with described Dram array.
Described Dram array comprises the Dram chip of polylith same size.
Favorable attributes of the present utility model is, it efficiently solves the problems referred to above.Because the access speed of Dram is fast, therefore the theory of the high speed hard-disk based on Dram of the present utility model just can reach the peak velocity of SATA interface, thus significantly improves the access speed of hard disk.The high speed hard-disk realized based on Dram of the present utility model can realize superfast read or write speed, is 100 times of standard machinery hard disk, solid state hard disc 20 times.Because the entity storing data is internal memory, so there is not the problem in serviceable life.
[accompanying drawing explanation]
Fig. 1 is structured flowchart of the present utility model.
[embodiment]
The following example is to further explanation of the present utility model and supplements, and does not constitute any limitation the utility model.
As shown in Figure 1, the high speed hard-disk based on Dram of the present utility model forms primarily of SATA interface chip 1, hard disk controlling chip 2, Dram control chip 3, Dram array 4 and standby power supply circuit 5.For ease of illustrating, " hard disk " described in embodiment all refers to the high speed hard-disk based on Dram of the present utility model.
Described SATA interface chip 1 is responsible for SATA serial interface protocol and is resolved and data communication, and it can select known SATA interface chip 1, or by those skilled in the art by arranging corresponding hardware circuit to realize.
Described hard disk controlling chip 2 is the major control chip of hard disk, it is responsible for the control of hard disk operational state, hard disk access protocal and the function such as internal memory operation protocol conversion and data check, it can select known hard disk controlling chip 2, or is realized by corresponding hardware circuit by those skilled in the art.
Described Dram control chip 3 is responsible for the control to described Dram array 4, and it comprises the functions such as the power supply of Dram chip 41 and clock control, reading and writing data, Refresh Data and data address mapping.
Described Dram array 4 comprises the Dram chip 41 of polylith same size.Described Dram chip 41 can select known Dram chip.
Described standby power supply circuit 5 is the power supplies additionally increased to preserve hard disc data in computer shutdown situation.Described standby power supply circuit 5 comprises battery and charge-discharge control circuit, and described battery can select known lithium battery etc., and described charge-discharge control circuit can be arranged according to existing charge-discharge control circuit.
As shown in Figure 1, described SATA interface chip 1 is connected with described hard disk controlling chip 2, described hard disk controlling chip 2 is connected with described Dram control chip 3 and standby power supply circuit 5 respectively, and described Dram control chip 3 is connected with described Dram array 4.By this, the high speed hard-disk based on Dram of the present utility model is just defined.Be below the principle of work of the high speed hard-disk based on Dram of the present utility model:
When its work, the SATA interface data read-write requests of hard disk is passed to described hard disk controlling chip 2 by described SATA interface chip 1, hard disk controlling chip 2 is resolved this read-write operation and is converted into the read-write operation of Dram, thus driving Dram control chip 3, Dram control chip 3 is by controlling one or more Dram chip 41 complete operations in Dram array 4 thereafter.Computing machine is when carrying out hard disk write operation, the flow direction of data is as follows: serial data is converted to parallel data and passes to hard disk controlling chip 2 by SATA interface chip 1, hard disk controlling chip 2 pairs of data increase effect code and send to Dram control chip 3, and Dram control chip 3 drives specifies Dram chip 41 to complete data write activity.
When computing machine normally runs, the high speed hard-disk based on Dram of the present utility model is by external power source, i.e. the Power supply of computing machine, external power source charges to described standby power supply circuit 5 simultaneously.Now, of the present utility modelly normal operating conditions is in based on chips all in the high speed hard-disk of Dram.
When computing machine closedown/accident power-off, the high speed hard-disk based on Dram of the present utility model is in low power consumption data hold mode; Now powered by described standby power supply circuit 5, described SATA interface chip 1 is in closed condition, and first described hard disk controlling chip 2 controls to enter low power consumpting state after Dram control chip 3 enters low power consumpting state.Dram control chip 3 suitably turns down Dram voltage, reduces Dram clock and Refresh Data frequency, makes Dram array 4 be in lowest power consumption state.
Although disclosed the utility model by above embodiment, but scope of the present utility model is not limited thereto, under the condition not departing from the utility model design, above each component can be replaced with the similar or equivalent element that art personnel understand.

Claims (2)

1. the high speed hard-disk based on Dram, it is characterized in that, this high speed hard-disk comprises can resolve SATA serial line interface and the SATA interface chip (1) of data communication, control the hard disk controlling chip (2) of hard disk operational state, Dram control chip (3), Dram array (4) and standby power supply circuit (5) composition, described SATA interface chip (1) is connected with described hard disk controlling chip (2), described hard disk controlling chip (2) is connected with described Dram control chip (3) and described standby power supply circuit (5) respectively, described Dram control chip (3) is connected with described Dram array (4).
2., as claimed in claim 1 based on the high speed hard-disk of Dram, it is characterized in that, described Dram array (4) comprises the Dram chip (41) of polylith same size.
CN201520189513.1U 2015-03-31 2015-03-31 A kind of high speed hard-disk based on Dram Expired - Fee Related CN204576478U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520189513.1U CN204576478U (en) 2015-03-31 2015-03-31 A kind of high speed hard-disk based on Dram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520189513.1U CN204576478U (en) 2015-03-31 2015-03-31 A kind of high speed hard-disk based on Dram

Publications (1)

Publication Number Publication Date
CN204576478U true CN204576478U (en) 2015-08-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520189513.1U Expired - Fee Related CN204576478U (en) 2015-03-31 2015-03-31 A kind of high speed hard-disk based on Dram

Country Status (1)

Country Link
CN (1) CN204576478U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106126126A (en) * 2016-06-30 2016-11-16 联想(北京)有限公司 Memory device, electronic equipment and data processing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106126126A (en) * 2016-06-30 2016-11-16 联想(北京)有限公司 Memory device, electronic equipment and data processing method

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GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150819

Termination date: 20160331