CN204558466U - Adopt the imageing sensor of deep trench isolation - Google Patents

Abstract

The utility model provides an image sensor adopting deep trench isolation, comprising: a substrate; a plurality of isolation structures located on the substrate, and the isolation structures isolate pixel units; an epitaxial monocrystalline silicon layer covering the isolation structure; Part of the image sensor device in the epitaxial single crystal silicon layer. In the technical solution of the present utility model, a deep trench isolation structure is formed before the image sensor device is formed, the surface shape of the isolation structure is better, and the defect is less, and it can be repaired by an epitaxial high-temperature process, and the influence of the defect is further eliminated, so that The interface of the isolation structure is more excellent. Since the deep trench isolation structure is formed before the device, the selectivity of process means and environment is wide, and there is no need to consider the damage to the device. The epitaxial single crystal silicon layer used to form the device is formed before the isolation structure. Post-growth, the high-temperature process ensures that no stress will be conducted into the silicon device area, ensuring the performance of the image sensor device.

Description

Image sensor with deep trench isolation

technical field

The utility model relates to the field of image sensors, in particular to an image sensor adopting deep trench isolation.

Background technique

Image sensors can be classified into complementary metal oxide (CMOS) image sensors and charge-coupled device (CCD) image sensors. The advantage of the CCD image sensor is that it has high image sensitivity and low noise, but it is difficult to integrate the CCD image sensor with other devices, and the power consumption of the CCD image sensor is relatively high. In contrast, CMOS image sensors have the advantages of simple process, easy integration with other devices, small size, light weight, low power consumption, and low cost. Therefore, with the development of technology, CMOS image sensors are increasingly used in various electronic products instead of CCD image sensors. At present, CMOS image sensors have been widely used in still digital cameras, camera phones, digital video cameras, medical imaging devices (such as gastroscopes), and automotive imaging devices.

In the manufacturing process of the existing CMOS image sensor, the pixel units arranged in an array in the pixel area need to be physically isolated and electrically isolated through trenches. In the prior art, the image sensor device is often made first and then the deep trench isolation structure method, but this method will cause the defects of the deep trench isolation structure to be difficult to remove. If a high-temperature thermal oxidation process is used to remove them, since the heating temperature is often higher than 800 degrees Celsius, it will cause functional damage to the image sensor device and affect the quality of the image sensor device. . In order to improve the sensitivity (Sensitivity) and electron saturation (range) of photodiodes, the traditional method is to deepen the depth of photodiodes and provide high-energy particle injection, which will introduce large injection defects. In addition, CMOS image sensor manufacturing methods are also seeking solutions to improve carrier transfer efficiency, prevent dark current, and improve signal-to-noise ratio.

Contents of the invention

The purpose of this utility model is to provide an image sensor using deep trench isolation to solve the problem that the deep trench isolation is difficult to remove. If it is removed by high temperature thermal oxidation process, the heating temperature is often higher than 800 degrees Celsius, which will cause the image sensor The functional damage of the device affects the quality of the image sensor device.

In order to solve the above problems, the utility model provides an image sensor using deep trench isolation, comprising: a substrate; a plurality of isolation structures located on the substrate, the isolation structures isolate pixel units; an epitaxial cell covering the isolation structure A crystalline silicon layer; a part of the image sensor device located in the epitaxial single crystalline silicon layer.

Preferably, the isolation structure includes several deep trenches in the substrate, and dielectric and conductive materials filled in the deep trenches.

Preferably, the isolation structure includes several deep trenches in the epitaxial single crystal silicon layer, and dielectric and conductive materials filled in the deep trenches.

Preferably, the conductive material in the isolation structure is connected to a preset voltage.

Preferably, the depth of the deep groove is 1 micron to 5 microns.

Preferably, the critical dimension of the deep trench is 0.01 micron to 1 micron.

Preferably, the silicon in the region surrounded by the isolation structure has a doped layer with a concentration gradient distribution from the interface to the center of the silicon.

Compared with the prior art, the technical solution of the utility model has the following advantages:

In the technical solution of the present utility model, a deep trench isolation structure is formed before the image sensor device is formed, the surface shape of the isolation structure is better, and the defect is less, and it can be repaired by an epitaxial high-temperature process, and the influence of the defect is further eliminated, so that The interface of the isolation structure is more excellent. Since the deep trench isolation structure is formed before the device, the selectivity of process means and environment is wide, and there is no need to consider the damage to the device. The epitaxial single crystal silicon layer used to form the device is formed before the isolation structure. Post-growth, the high-temperature process ensures that no stress will be conducted into the silicon device area, ensuring the performance of the image sensor device.

Description of drawings

Other features and advantages of the utility model will become clear or be more specifically explained through the accompanying drawings and the specific implementation methods used to illustrate some principles of the utility model together with the accompanying drawings.

Fig. 1 is the flow chart of the steps of the manufacturing method of the image sensor adopting the deep trench isolation of the utility model;

2 to 9 are structural schematic diagrams corresponding to some steps of the manufacturing method of the image sensor using deep trench isolation provided by the first embodiment of the present invention;

2 to 13 are structural schematic diagrams corresponding to some steps of the manufacturing method of the image sensor using deep trench isolation provided by the second embodiment of the present invention;

Figures 14 to 18, Figures 19A, 20A, 21A, 22A, 23A, 24A, 25A, 26A, 27A, and Figures 28 to 30 are images of the image sensor using deep trench isolation provided by the third embodiment of the present invention. Schematic diagram of the structure corresponding to each step of the manufacturing method;

Figures 14 to 18, Figures 19B, 20B, 21B, 22B, 23B, 24B, 25B, 26B, and Figures 28 to 30 are the manufacturing method of the image sensor using deep trench isolation provided by the fourth embodiment of the present invention Schematic diagram of the structure corresponding to some steps;

Figures 14 to 18, Figures 19A, 20A, 21A, 22A, 23A, 24A, 25A, 26A, 27A, and Figures 31 to 35 are images of the image sensor using deep trench isolation provided by the fifth embodiment of the present invention. Schematic diagram of the structure corresponding to each step of the manufacturing method;

Fig. 14 to Fig. 18, Fig. 19B, 20B, 21B, 22B, 23B, 24B, 25B, 26B, Fig. 31 to Fig. 35 are the manufacturing method of the image sensor using deep trench isolation provided by the sixth embodiment of the present invention Schematic diagram of the structure corresponding to some steps;

36 to 39 are structural schematic diagrams corresponding to some steps of the manufacturing method of the image sensor using deep trench isolation provided by the seventh and eighth embodiments of the present invention;

40A and 40B are schematic structural diagrams of a step in the manufacturing method of the image sensor using deep trench isolation provided by the ninth and tenth embodiments of the present invention, respectively.

Detailed ways

In the existing image sensor manufacturing process, the deep trench isolation structure is fabricated after the image sensor device is completed. Since the key devices have been formed, various factors such as temperature and environment need to be considered in the subsequent formation of the deep trench isolation structure. , it is necessary to ensure the good interface of the surface of the isolation structure and prevent damage to the device. Because surface defects are brought about during the formation of the isolation structure, the surface defects will lead to the attachment of carriers and increase the noise. Repairing such defects generally requires a variety of special environments such as high temperature, which will affect or even damage the performance of image sensor devices. .

Therefore, the utility model proposes an image sensor using deep trench isolation, and an isolation structure is pre-formed before forming an image sensor device. The surface shape of the isolation structure is better, and there are fewer defects, and it can be repaired by an epitaxial high-temperature process. The influence of defects is further eliminated, so that the interface of the isolation structure is more excellent. In addition, before the formation of the deep trench isolation structure, the choice of process means and environment is wide, and there is no need to consider the damage to the device. The epitaxial single crystal silicon layer used to form the device is grown after the formation of the isolation structure, and the high temperature process It is ensured that stress will not be conducted into the silicon device region, and the performance of the image sensor device is guaranteed.

The utility model is described in detail below in conjunction with the accompanying drawings of the specification of the utility model and the following several embodiments.

As shown in Figure 1, the method for manufacturing an image sensor using deep trench isolation of the present invention includes the following steps: providing a substrate; forming an isolation structure for isolating pixel units on the substrate; An epitaxial single crystal silicon layer covering the isolation structure; forming part of devices of the image sensor in the epitaxial single crystal silicon layer.

Wherein, in a preferred embodiment of the present invention, the step of forming the isolation structure may be: forming several deep trenches on the substrate, and filling the deep trenches with dielectric and conductive material to form the isolation structure.

In another preferred embodiment of the present invention, the step of forming the isolation structure may also be: forming a dielectric layer on the substrate, and etching the dielectric layer to form several raised isolation structures.

2 to 9 are structural diagrams corresponding to each step of the method for manufacturing an image sensor using deep trench isolation provided by the first embodiment of the present invention.

Referring to FIG. 2 , firstly, a substrate 100 is provided. The substrate 100 is a carrier for manufacturing an image sensor device, and either an epitaxial wafer or an SOI wafer can be used. In this embodiment, a substrate 100 with a base layer 1002 and an epitaxial layer 1001 is used, wherein the base layer 1002 is P-type, and the epitaxial layer 1001 is N-type or P-type; or the base layer 1002 is N-type, and the epitaxial layer 1001 It is P-type or N-type. The substrate 100 has a first surface A close to the epitaxial layer 1001 and a second surface B close to the base layer 1002 .

3 and 4, an oxide layer 106, a silicon nitride layer 107, and a photoresist layer (not shown) are sequentially formed on the first surface A of the substrate 100, and are formed in the epitaxial layer 1001 through exposure, development, and etching steps. Some deep trenches 108, the depth of deep trenches 108 is: 1 micron ~ 5 microns (this embodiment is: 2.5 microns); critical dimension is 0.01 micron ~ 1 micron (this embodiment is 0.1 micron), then remove photoresist layer and clean the surface of the substrate. In addition, thermal oxidation, etching, and thermal processes can also be used to repair the deep trench 108. The surface of the deep trench 108 formed at this time is the surface of the isolation structure formed in the subsequent process. The surface of the isolation structure can be repaired without considering the influence of the environment and temperature on the device.

Referring to FIG. 5 to FIG. 7, a dielectric layer 109 is formed next to cover the bottom and sidewalls of the deep trench 108, the deep trench 108 is filled with a conductive material layer 110 until the deep trench 108 is filled, and the conductive material layer is etched back. 110 so that the upper surface of the conductive material layer 110 is lower than the first surface A of the substrate 100, a dielectric layer 109 is formed again to cover the conductive material layer 110, and the layers located between the deep trenches 108 are sequentially removed by chemical mechanical grinding or etching. The outer dielectric layer 109, silicon nitride layer 107, and oxide layer 106 are used to expose the first surface A of the substrate 100, and the dielectric layer 109 located in the deep trench 108 is thinned to its upper surface and the substrate 100. Align the first surface A of the first surface A, thereby forming an isolation structure ( FIG. 7 ) in which the dielectric layer 109 and the conductive material layer 110 are filled in the deep trench 108 and the dielectric layer 109 completely surrounds the conductive material layer 110 ( FIG. 7 ), which is used to isolate pixels unit. Among them, the dielectric layer 109 is preferably an oxide layer, and the conductive material layer 110 is preferably polysilicon, metal or a combination of polysilicon and metal, and N-type doped polysilicon is used in this embodiment.

Preferably, the base layer 1002 and the dielectric layer 109 in the isolation structure can also be pre-doped, so that through self-doping, the silicon in the area surrounded by the isolation structure has a doped layer with a concentration gradient distribution from the interface to the center of the silicon, For example, forming a partial region of the photodiode 116, the doping of the partial region of the photodiode 116 is more uniform, and forming this region before the device is formed, can dope the partial region of the photodiode 116 deeper, and the process control degree of freedom is very large, The doping concentration of the pattern formed by doping has a gradient irregular distribution. The depth of the photodiode is: 1 micron to 5 microns, 2.8 microns in this embodiment; the concentration is 1e14CM ³ to 5e17CM ³ , 1e16 CM ³ in this embodiment.

Referring to FIG. 8 , a selective epitaxial process is performed on the substrate 100 to form an epitaxial single crystal silicon layer 111 covering the isolation structure. Specifically, extending upward from the first surface A of the substrate 100 , selective epitaxy is performed on silicon, using N-type doped epitaxy at the beginning, and non-doped epitaxy at the end. In addition, in the selective epitaxy step, the epitaxial monocrystalline silicon layer 111 formed in the same crystal direction is selected for epitaxy, and the crystal lattice of the epitaxial single crystal silicon layer 111 is better, and the conductive material doped in the subsequent process steps can be better distributed. After selective epitaxy, the silicon surface is polished and cleaned.

Referring to FIG. 9, some devices (not shown) of the image sensor are formed in the epitaxial single crystal silicon layer 111, and several shallow trench isolation regions and/or doped isolation regions 112 corresponding to the isolation structure are formed, and the epitaxial single crystal A metal interconnection layer 118 , a color filter layer (not shown), a microlens layer (not shown) and other structures are sequentially formed on the silicon layer 111 to complete the fabrication of the front-illuminated image sensor.

For a front-illuminated image sensor, the conductive material layer 110 can be connected to a preset voltage directly from the first surface A of the substrate 100 through silicon vias, for example, the conductive material layer 110 can be connected to a negative pressure to deplete the inner surface of the deep trench 108 Form a pinning layer to effectively reduce defects. A pixel array of an image sensor generally includes effective pixel units located in a central area and dummy pixel units located in an edge area, preferably connected to a preset voltage through the conductive material layer 110 in the isolation structure of the dummy pixel units.

2 to 13 are structural schematic diagrams corresponding to each step of the manufacturing method of the image sensor using deep trench isolation provided by the second embodiment of the present invention.

In this embodiment, the steps shown in FIG. 2 to FIG. 9 are exactly the same as those in the first embodiment. Referring to FIG. 10, after the metal interconnection layer 118 is formed, it is bonded to the support wafer 400 from the direction of the first surface A of the substrate 100, and the bonded substrate 100 and the support wafer 400 are turned over. The final structure is shown in FIG. 11 , and then thinned from the second surface B of the substrate 100 (ie, the side away from the epitaxial monocrystalline silicon layer 111 ) and stops on the surface of the isolation structure ( FIG. 12 ). The thinning method can be carried out by chemical mechanical polishing, physical mechanical polishing, and combined with etching. Referring to FIG. 13 , an isolation dielectric layer, a charged dielectric layer, and an anti-reflection layer 113 are sequentially deposited on the second surface B of the substrate 100, wherein the isolation dielectric layer can use a silicon dioxide layer to isolate the surface of the substrate 100 The effect with the upper layer; the charged dielectric layer adopts a hafnium dioxide layer and a tantalum oxide layer. Since the charged dielectric layer has a negative charge, the inner surface of the substrate 100 can be depleted to form a pinning layer, which can effectively prevent defects on the interface surface ;Anti-reflection layer prevents crosstalk of light. Subsequently, the metal grid layer 114 , the color filter layer 117 , and the microlens layer 115 are further formed to complete the fabrication of the back-illuminated image sensor.

For a back-illuminated image sensor, the conductive material layer 110 can be connected through the metal grid layer 114 and connected to a preset voltage from the second surface B of the substrate 100, for example, the conductive material layer 110 can be connected to negative pressure to deplete the deep trench A pinning layer is formed on the inner surface of 108 to effectively reduce defects. A pixel array of an image sensor generally includes effective pixel units located in a central area and dummy pixel units located in an edge area, preferably connected to a preset voltage through the conductive material layer 110 in the isolation structure of the dummy pixel units.

Figures 14 to 18, Figures 19A, 20A, 21A, 22A, 23A, 24A, 25A, 26A, 27A, and Figures 28 to 30 are images of the image sensor using deep trench isolation provided by the third embodiment of the present invention. Schematic diagram of the structure corresponding to each step of the manufacturing method.

Referring to FIG. 14 , first, a substrate 100 is provided. The substrate 100 is a carrier for manufacturing an image sensor device, and either an epitaxial wafer or an SOI wafer can be used. In this embodiment, a substrate 100 with a base layer 1002 and an epitaxial layer 1001 is used, wherein the base layer 1002 is P-type, and the epitaxial layer 1001 is N-type or P-type; or the base layer 1002 is N-type, and the epitaxial layer 1001 It is P-type or N-type. The substrate 100 has a first surface A close to the epitaxial layer 1001 and a second surface B close to the base layer 1002 .

Referring to FIG. 15 , a dielectric layer 200 is formed on the first surface A of the substrate 100. Since the subsequent process needs to be processed by selective epitaxy, the dielectric layer 200 plays the role of an epitaxial isolation layer. Through chemical vapor deposition and physical vapor deposition The dielectric layer 200 is formed by a thin-film process, and the dielectric layer 200 can be made of silicon dioxide, silicon nitride or aluminum oxide; the thickness of the dielectric layer is between 1 micron and 5 microns, and in this embodiment, it is 2.5 microns.

Referring to FIGS. 16 to 18, an etch stop layer 300 is laid on the surface of the dielectric layer 200. The etch stop layer 300 can be a hard mask or a photoresist layer, and a silicon nitride layer or a silicon dioxide layer can be used; the etch stop layer The thickness of the layer 300 is: between 0.05 microns and 2 microns, in this embodiment, it is 0.2 microns; if the etch stop layer 300 is a hard mask, another layer of photoresist layer 301 is laid on its surface, and through exposure , develop, and etch the patterned dielectric layer 200 and stop on the first surface A of the substrate. At this time, several isolation structures 101 are formed, and the isolation structures 101 protrude from the first surface A of the substrate 100 in the peripheral region. In FIG. 19A, the photoresist layer 301 is removed, and the substrate surface is cleaned. In addition, thermal oxidation, etching, and thermal processes can also be used to repair the surface of the isolation structure 101. Since the surface of the structure is formed before the image sensor device is formed, the surface can be repaired without considering the influence of the environment and temperature on the device. .

Referring to FIG. 20A , a selective epitaxial process is performed on the substrate 100 to form an epitaxial single crystal silicon layer 105 covering the isolation structure 101 . Extend upward from the first surface A of the substrate 100, and carry out selective epitaxy on silicon, adopt N-type doped epitaxy at the beginning, and adopt non-doped epitaxy at the end, select the same crystal orientation in the selective epitaxy step direction, the formed epitaxial single crystal silicon layer 105 has a better crystal lattice, and the conductive material doped in the subsequent process steps can be better distributed, and the well region can be doped according to requirements, before the selective epitaxial substrate 100 , the substrate 100 and the dielectric layer 200 are pre-doped, so that after the selective epitaxial substrate 100 is self-doped, the silicon in the area surrounded by the isolation structure 101 has a doped layer with a concentration gradient distribution from the interface to the center of the silicon. , for example: forming a partial region of the photodiode 102, the doping of the partial region of the photodiode 102 is more uniform, and forming this region before the device is formed, the partial region of the photodiode 102 can be doped deeper, and the process control degree of freedom is very high Large, the doping concentration of the pattern formed by doping has a gradient irregular distribution; the partial area selective epitaxy of the photodiode 102 finally covers the isolation structure 101, and the depth of the photodiode is: between 1 micron and 5 microns. In this implementation In the example, it is 2.8 microns; the concentration is: 1e14CM ³ to 5e17 CM ³ , in this embodiment, 1e16 CM ³ is used. The photodiode method in the existing practice: high-energy ion implantation of N-type or P-type doping, and high-temperature annealing process for doping ion activation and defect repair treatment. In addition, the selective epitaxy can protect the isolation structure 101 and avoid damage to the surface of the isolation structure 101 in subsequent process steps. In FIG. 21A, the silicon surface after selective epitaxy is ground and cleaned.

In FIG. 22A , some devices (not shown) of the image sensor and several shallow trench isolation regions 103 corresponding to the isolation structure 101 are formed in the epitaxial single crystal silicon layer 105 , and a metal interconnection layer is formed.

Please refer to FIGS. 23A, 24A, 25A, 26A, and 27A at the same time. Bond the substrate 100 with the support wafer 400 in the direction of the first surface A of the substrate 100, and flip the bonded substrate 100 and support wafer 400 over. , from the second side B of the substrate 100 (that is, the side away from the epitaxial single crystal silicon layer 105), the thinning method can be performed by chemical mechanical polishing, physical mechanical polishing, and combined with etching , and finally thinned to expose the surface of the isolation structure 101 . The material of the dielectric layer 200 of the isolation structure 101 is removed by etching (such as wet etching), and the etching stopper layer 300 is further removed, so that several opening structures are formed in the epitaxial single crystal silicon layer 105. The opening structures It is the deep trench 101B, the depth of the deep trench is: 1 micron to 5 microns (in this embodiment: 2.5 microns); the critical dimension is 0.01 micron to 1 micron (0.1 micron in this embodiment), because the dielectric layer The material of the 200 is different from that of the peripheral selective epitaxial silicon, and still maintains the goodness of the opening interface. In this embodiment, the optional shallow trench isolation region 103 can be connected and conducted with the deep trench 101B.

Please continue to refer to FIG. 28 to FIG. 30 to sequentially deposit the first dielectric layer 500, the charged dielectric layer 600, and the anti-reflection layer 700 to cover the surface of the substrate 100 and fill the deep trench 101B; the first dielectric layer 500 can be The silicon dioxide layer plays the role of isolating the surface of the substrate 100 from the upper layer. The charged dielectric layer 600 adopts a hafnium dioxide layer and a tantalum oxide layer. The pinning layer can be formed to effectively prevent defects on the interface surface; the anti-reflection layer prevents crosstalk of light. A metal grid layer 800 is further formed; a color filter layer 900 and a microlens layer 1000 are formed to complete the fabrication of the back-illuminated image sensor.

Figures 14 to 18, Figures 19B, 20B, 21B, 22B, 23B, 24B, 25B, 26B, and Figures 28 to 30 are the manufacturing method of the image sensor using deep trench isolation provided by the fourth embodiment of the present invention Schematic diagram of the structure corresponding to some steps.

In this embodiment, the steps shown in Fig. 14 to Fig. 18 are exactly the same as those in the third embodiment. In FIG. 19B , after removing the photoresist layer 301 , the etch stop layer 300 is further removed; subsequent process steps are the same as those of the third embodiment, only the etch stop layer 300 is not included in the whole process.

Referring to FIG. 20B , a selective epitaxial process is performed on the substrate 100 to form an epitaxial single crystal silicon layer 105 covering the isolation structure 101 . Extending upward from the first surface A of the substrate 100, silicon is selectively epitaxy, N-type doped epitaxy is used at the beginning, and non-doped epitaxy is used at the end; in the selective epitaxy step, the same crystal orientation is selected direction, the formed epitaxial single crystal silicon layer 105 has a better crystal lattice, and the conductive material doped in the subsequent process steps can be better distributed, and the well region can be doped according to requirements, before the selective epitaxial substrate 100 , the substrate 100 and the dielectric layer 200 are pre-doped, so that after the selective epitaxial substrate 100 is self-doped, the silicon in the area surrounded by the isolation wall 101 has a doped layer with a concentration gradient distribution from the interface to the center of the silicon. , for example: forming a partial region of the photodiode 102, the doping of the partial region of the photodiode 102 is more uniform, and forming this region before the device is formed, the partial region of the photodiode 102 can be doped deeper, and the process control degree of freedom is very high Large, the doping concentration of the pattern formed by doping has a gradient irregular distribution; the partial area selective epitaxy of the photodiode 102 finally covers the isolation structure 101, and the depth of the photodiode is: between 1 micron and 5 microns. In this implementation In the example, it is 2.8 microns; the concentration is: 1e14CM ³ to 5e17 CM ³ , in this embodiment, 1e16 CM ³ is used. The photodiode method in the existing practice: high-energy ion implantation of N-type or P-type doping, and high-temperature annealing process for doping ion activation and defect repair treatment. In addition, the selective epitaxy can protect the isolation structure 101 and avoid damage to the surface of the isolation structure 101 in subsequent process steps. In FIG. 21B, the silicon surface after selective epitaxy is ground and cleaned.

In FIG. 22B , some devices (not shown) of the image sensor and several shallow trench isolation regions 103 corresponding to the isolation structure 101 are formed in the epitaxial single crystal silicon layer 105 , and a metal interconnection layer is formed.

Please refer to FIGS. 23B, 24B, 25B, and 26B at the same time. The substrate 100 is bonded to the support wafer 400 in the direction of the first surface A of the substrate 100, and the bonded substrate 100 and the support wafer 400 are turned over. The second side B of the substrate 100 (that is, the side away from the epitaxial single crystal silicon layer 105) is thinned, and the method of thinning can be performed by chemical mechanical polishing, physical mechanical polishing, combined with etching, and finally thinned until the surface of the isolation structure 101 is exposed. The material of the dielectric layer 200 of the isolation structure 101 is removed by etching (such as wet etching), so that several opening structures are formed in the epitaxial single crystal silicon layer 105, and the opening structures are deep trenches 101B. The depth of the trench is: 1 micron to 5 microns (in this embodiment: 2.5 microns); the critical dimension is 0.01 micron to 1 micron (0.1 micron in this embodiment), because the material of the dielectric layer 200 and the surrounding selective epitaxy The material of the silicon is not the same, and the goodness of the opening interface is still maintained. The shallow trench isolation region 103 in this embodiment is not connected to the deep trench 101B.

Please continue to refer to FIG. 28 to FIG. 30 to sequentially deposit the first dielectric layer 500, the charged dielectric layer 600, and the anti-reflection layer 700 to cover the surface of the substrate 100 and fill the deep trench 101B; the first dielectric layer 500 can be The silicon dioxide layer plays the role of isolating the surface of the substrate 100 from the upper layer. The charged dielectric layer 600 adopts a hafnium dioxide layer and a tantalum oxide layer. The pinning layer can be formed to effectively prevent defects on the interface surface; the anti-reflection layer prevents crosstalk of light. A metal grid layer 800 is further formed; a color filter layer 900 and a microlens layer 1000 are formed to complete the fabrication of the back-illuminated image sensor.

Figures 14 to 18, Figures 19A, 20A, 21A, 22A, 23A, 24A, 25A, 26A, 27A, and Figures 31 to 35 are images of the image sensor using deep trench isolation provided by the fifth embodiment of the present invention. Schematic diagram of the structure corresponding to each step of the manufacturing method.

In this embodiment, the steps shown in FIGS. 14 to 18 , and FIGS. 19A , 20A, 21A, 22A, 23A, 24A, 25A, 26A, and 27A are exactly the same as those in the third embodiment.

Please continue to refer to FIG. 31 to deposit a second dielectric layer (not marked) to cover the surface of the substrate 100. The second dielectric layer also covers the deep trench 101B. A conductive material layer 1100 is deposited on the second dielectric layer. The conductive material layer 1100 The material is: polysilicon, metal or a combination of polysilicon and metal. In this embodiment, N-type doped polysilicon is used; the conductive material layer 1100 fills the deep trench 101B, and the conductive material layer 1100 is ground to expose the surface of the substrate 100 .

Please refer to FIG. 32 and FIG. 33 , sequentially depositing a third dielectric layer (not marked), a charged dielectric layer 600 , and an anti-reflection layer 700 covering the surface of the substrate 100 and filling the deep trench 101B; in one embodiment After depositing the third dielectric layer, the charged dielectric layer 600 , and the anti-reflection layer 700 covering the surface of the substrate 100 , etch the upper layer regions corresponding to the deep trenches 101B and expose the conductive material layer 1100 .

Please refer to FIGS. 34 and 35 , further paving and forming a metal grid layer 800 ; forming a color filter layer 900 and a microlens layer 1000 , and completing the fabrication of a back-illuminated image sensor. The conductive material layer 1100 can provide a specific voltage, and a part of the conductive material layer 1100 in the pixel area can be connected to negative pressure to deplete the inner surface of the deep trench 101B to form a pinning layer, effectively reducing defects, and part of the conductive material layer 1100 in the peripheral area can be grounded GND plays the role of isolation; the charged dielectric layer 600 adopts a hafnium dioxide layer and a tantalum oxide layer. Since the charged dielectric layer 600 has a negative charge, the inner surface of the substrate 100 can be depleted to form a pinning layer, which can effectively Prevents defects on the interface surface; the anti-reflection layer prevents crosstalk of light. In this embodiment, the optional shallow trench isolation region 103 can be connected and conducted with the deep trench 101B.

Fig. 14 to Fig. 18, Fig. 19B, 20B, 21B, 22B, 23B, 24B, 25B, 26B, Fig. 31 to Fig. 35 are the manufacturing method of the image sensor using deep trench isolation provided by the sixth embodiment of the present invention Schematic diagram of the structure corresponding to some steps.

In this embodiment, the steps shown in FIGS. 14 to 18 , and FIGS. 19B , 20B, 21B, 22B, 23B, 24B, 25B, and 26B are exactly the same as those in the fourth embodiment.

Please continue to refer to FIG. 31 to deposit a second dielectric layer (not marked) to cover the surface of the substrate 100. The second dielectric layer also covers the deep trench 101B. A conductive material layer 1100 is deposited on the second dielectric layer. The conductive material layer 1100 The material is: polysilicon, metal or a combination of polysilicon and metal. In this embodiment, N-type doped polysilicon is used; the conductive material layer 1100 fills the deep trench 101B, and the conductive material layer 1100 is ground to expose the surface of the substrate 100 .

Please refer to FIG. 32 and FIG. 33 , sequentially depositing a third dielectric layer (not marked), a charged dielectric layer 600 , and an anti-reflection layer 700 covering the surface of the substrate 100 and filling the deep trench 101B; in one embodiment After depositing the third dielectric layer, the charged dielectric layer 600 , and the anti-reflection layer 700 covering the surface of the substrate 100 , etch the upper layer regions corresponding to the deep trenches 101B and expose the conductive material layer 1100 .

Please refer to FIGS. 34 and 35 , further paving and forming a metal grid layer 800 ; forming a color filter layer 900 and a microlens layer 1000 , and completing the fabrication of a back-illuminated image sensor. The conductive material layer 1100 can provide a specific voltage. Connecting the negative pressure to the part of the conductive material layer 500B in the pixel area can deplete the inner surface of the deep trench 101B to form a pinning layer, which can effectively reduce defects. Part of the conductive material layer 1100 in the peripheral area can be grounded GND plays the role of isolation; the charged dielectric layer 600 adopts a hafnium dioxide layer or a tantalum oxide layer. Since the charged dielectric layer 600 has a negative charge, the inner surface of the substrate 100 can be depleted to form a pinning layer, which can effectively Prevents defects on the interface surface; the anti-reflection layer prevents crosstalk of light.

36 to 39 are structural schematic diagrams corresponding to some steps of the manufacturing method of the image sensor using deep trench isolation provided by the seventh and eighth embodiments of the present invention.

In the previous process steps, the method of the third embodiment or the fourth embodiment can be used to form the deep trench 101B first; please continue to refer to FIG. 36 to FIG. 39 to deposit the first dielectric layer on the surface of the deep trench 101B and the surrounding area in sequence 500, the charged dielectric layer 600, and the antireflection layer 700. At this time, after the first dielectric layer 500, the charged dielectric layer 600, and the antireflection layer 700 are deposited, the deep trench 101B is still depressed on the surrounding surface, and the deep trench is not filled. Groove 101B; the first dielectric layer 500 can use a silicon dioxide layer to isolate the surface of the substrate 100 from the upper layer, and the charged dielectric layer 600 uses a hafnium dioxide layer and a tantalum oxide layer, because the charged dielectric layer 600 has a negative charge , the inner surface of the substrate 100 can be depleted to form a pinning layer, which can effectively prevent defects on the interface surface; the anti-reflection layer prevents crosstalk of light. Further form a metal grid layer 800, the metal grid layer 800 is filled in the deep groove 101B and protrudes from the surrounding surface, the metal grid layer 800 can be connected to a control voltage; further form a color filter layer 900, a microlens layer 1000 , to complete the fabrication of the back-illuminated image sensor.

40A and 40B are structural schematic diagrams of a step in the manufacturing method of the image sensor using deep trench isolation provided by the ninth and tenth embodiments of the present invention, respectively. In the ninth embodiment shown in FIG. 40A , the shallow trench isolation region 103 is formed after the step in FIG. 21A or the step in FIG. 21B , and the periphery of the shallow trench isolation region 103 is doped to form a doped isolation region surrounding it. 104. In this embodiment, P-type doping is adopted. In the tenth embodiment shown in FIG. 40B , the shallow trench isolation region 103 can be optionally not formed, and the doped isolation region 104 is directly doped to the corresponding region where the shallow trench isolation region 103 should be formed. In this embodiment In the use of P-type doping.

In the utility model, the deep trench isolation structure is formed before the image sensor device is formed, the surface shape of the isolation structure is better, and the defect is less, and it can be repaired through the epitaxial high-temperature process, and the influence of the defect is further eliminated, so that the isolation structure The interface is more excellent. Since the deep trench isolation structure is formed before the device, the selectivity of process means and environment is wide, and there is no need to consider the damage to the device. The epitaxial single crystal silicon layer used to form the device grows after the isolation structure is formed. The high-temperature process ensures that there will be no stress conduction into the silicon device area, ensuring the performance of the image sensor device.

Although the utility model is disclosed as above, the utility model is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present utility model, so the protection scope of the present utility model should be based on the scope defined in the claims.

Claims (7)

1. An image sensor adopting deep trench isolation, characterized in that, comprising: Substrate; a plurality of isolation structures located on the substrate, the isolation structures isolate pixel units; an epitaxial monocrystalline silicon layer covering the isolation structure; Part of the image sensor device located in the epitaxial single crystal silicon layer. 2. The image sensor employing deep trench isolation according to claim 1, wherein the isolation structure comprises several deep trenches in the substrate, and a medium filled into the deep trenches and conductive materials. 3. The image sensor employing deep trench isolation as claimed in claim 1, wherein the isolation structure comprises several deep trenches located in the epitaxial monocrystalline silicon layer, and the deep trenches are filled into the deep trenches. Medium and conductive materials. 4. The image sensor using deep trench isolation according to claim 2 or 3, wherein the conductive material in the isolation structure is connected to a preset voltage. 5 . The image sensor using deep trench isolation according to claim 2 or 3 , wherein the depth of the deep trench is 1 micron to 5 microns. 6. The image sensor using deep trench isolation according to claim 2 or 3, wherein the critical dimension of the deep trench is 0.01 micron to 1 micron. 7 . The image sensor using deep trench isolation according to claim 1 , wherein the silicon in the region surrounded by the isolation structure has a doped layer with a concentration gradient distribution from the interface to the center of the silicon.