CN204305035U - A kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment - Google Patents

Abstract

The utility model belongs to the technical field of shortwave communication equipment control terminals, in particular to a multifunctional digital bus control terminal suitable for shortwave communication equipment. This multifunctional digital bus control terminal includes: FPGA, ARM processor, CPLD, display screen, described FPGA is provided with RS485 interface, and FPGA is electrically connected to the RS485 bus of shortwave communication equipment through RS485 interface; Described FPGA is electrically connected respectively through data bus an ARM processor and a CPLD, and the CPLD is electrically connected to the display screen. The utility model can simplify the control means of the short-wave communication equipment, optimize the test environment, and improve the efficiency of the debugging of the tested equipment and the test of main performance indicators. The staff can directly and accurately observe the information content of the sent data and received data through the display screen, grasp the working status of the device under test in real time, and complete the control of the device under test.

Description

A multifunctional digital bus control terminal suitable for shortwave communication equipment

technical field

The utility model belongs to the technical field of short-wave communication equipment control terminals, in particular to a multifunctional digital bus control terminal suitable for short-wave communication equipment.

Background technique

With the increasingly extensive and in-depth application of microcomputer and microcomputer network technology, the communication technology has been continuously matured and perfected. With the change of communication technology, the interface bus technology has developed rapidly and has become a direct influence on the communication system function. Therefore, People have also put forward higher requirements for the speed, reliability and transmission distance of information transmission. At present, the state control, query, debugging, and main performance index test of short-wave communication equipment are relatively complicated, and the workload of testers is relatively large.

Utility model content

The purpose of the utility model is to propose a multifunctional digital bus control terminal suitable for short-wave communication equipment.

In order to achieve the above-mentioned technical purpose, the utility model adopts the following technical solutions to realize.

A kind of multifunctional digital bus control terminal suitable for shortwave communication equipment includes: FPGA, ARM processor, CPLD, display screen, described FPGA is provided with RS485 interface, FPGA is electrically connected to the RS485 bus of shortwave communication equipment through RS485 interface; The FPGA is respectively electrically connected to the ARM processor and the CPLD through the data bus, and the CPLD is electrically connected to the display screen.

Characteristic of the present utility model and further improvement are:

The data bus is an ISA bus or an I2C bus.

The multifunctional digital bus control terminal suitable for short-wave communication equipment also includes a keyboard, and the CPLD is electrically connected to the keyboard.

The multifunctional digital bus control terminal suitable for short-wave communication equipment also includes a power supply module, which is used to provide DC power to FPGA, ARM processor and CPLD respectively.

The model of described FPGA is LFXP6C, the model of described ARM processor is Intel PXA255 processor, the model of described CPLD is XC3S1000.

Described FPGA is used for completing the data interaction between short-wave communication equipment and ARM processor, and described ARM processor is used for carrying out agreement analysis to the data from FPGA, and the data after agreement analysis is sent to CPLD, and described CPLD uses The data that will be analyzed by the protocol is displayed on the control screen. The CPLD is used to realize keyboard detection and display screen interface control.

The beneficial effects of the utility model are: the utility model can simplify the control means of short-wave communication equipment, optimize the test environment, improve the stability and reliability of data transmission, and greatly improve the efficiency of the debugging of the tested equipment and the test of main performance indicators . Since the terminal has a display screen, the staff can directly and accurately observe the information content of the sent data and received data, grasp the working status of the device under test in real time, and complete the control of the device under test. The utility model also reduces the man-hours in the development and testing process of the short-wave communication equipment, and also reduces the cost of development and production of the short-wave communication equipment. The development and production cycle is shortened.

Description of drawings

Fig. 1 is a structural schematic diagram of a multifunctional digital bus control terminal suitable for shortwave communication equipment of the present invention.

Detailed ways

Below in conjunction with accompanying drawing, the utility model is further described:

Referring to FIG. 1 , it is a structural schematic diagram of a multifunctional digital bus control terminal suitable for short-wave communication equipment of the present invention. In the utility model, the multifunctional digital bus control terminal adopts the synchronous 485 bus as the communication mode, and is mainly composed of a panel unit, a main control unit and a chassis. The panel unit is divided into two parts: power management and button/display; the main control adopts a general control platform with Intel PXA255 as the processor.

As an independent whole, the panel unit is composed of a color liquid crystal display, a power switch, a PTT key, and 21 keys (collectively referred to as a keyboard). The panel unit mainly completes the keyboard interface, display, drive, power supply and PTT control; at the same time, it completes the unified management of the panel and exchanges information with the main control unit. The display screen of the panel unit adopts a large-capacity color liquid crystal display, which can display various information such as the selected channel number, channel frequency, working mode, and the working status of the short-wave communication module. At the same time, various controls of the short-wave communication module can be performed according to Chinese prompts operate. The power switch is used to control the power on and off of the multifunctional digital bus control terminal. The PTT key is used to control the receiving/sending conversion of the controlled device.

In the embodiment of the utility model, the main control unit is the central controller of the equipment, which mainly completes the panel management and various controls of the multifunctional digital bus control terminal, including external communication, control, and monitoring of the control box through the synchronous serial port. The main control unit includes FPGA, ARM processor, CPLD, FLASH memory, SDRAM memory. The FPGA is provided with an RS485 interface, and the FPGA is electrically connected to the RS485 bus of the short-wave communication device through the RS485 interface, so that the FPGA can send data to the short-wave communication device, and can also receive data from the short-wave communication device, and the FPGA is electrically connected to the ARM processor through the data bus and a CPLD, and the CPLD is electrically connected to the display screen. The model of CPLD is XC3S1000, and CPLD is used to realize keyboard detection and display interface control. The display screen is a liquid crystal display (LCD). Above-mentioned data bus is ISA bus or I2C bus, and the model of FPGA is LFXP6C, is used for completing the data interaction between short-wave communication equipment and ARM processor, and the main function of FPGA is the data conversion between RS485 bus and the internal bus interface of the utility model , Complete the functions of RS485 bus dedicated ICD data receiving and packaging processing, packet sending and transport layer ACK mechanism between bus ports. Specifically, after the FPGA receives the data from the short-wave communication device, it packs it and obtains the corresponding receiving FIFO, and then sends the packed data to the ARM processor according to the receiving FIFO (first-in-first-out queue) middle. When the FPGA receives the data from the ARM processor, it obtains the corresponding sending FIFO. According to the sending FIFO, the FPGA performs packet processing on the data from the ARM processor and sends it to the RS485 bus.

In the embodiment of the present invention, the ARM processor is used for protocol analysis of the data from the FPGA, and the data after the protocol analysis is sent to the CPLD, and the CPLD is used for controlling the display screen to display the data after the protocol analysis. Specifically, the model of the ARM processor is Intel PXA255 processor, and its main function is to complete multi-bus data analysis processing, display control, and data storage. In the utility model embodiment, also be provided with FLASH memory and SDRAM memory, FLASH memory is used for storing the required program data of ARM processor, and SDRAM memory is mainly used for providing data cache to ARM processor, and the model of FLASH memory is S29GI512N, SDRAM memory is 32M cache chip or 64M cache chip, for example, the model of SDRAM memory is IS42SI160160B. The main control part of the utility model adopts an ARM XScale embedded system, uses an Intel PXA255 processor, and uses a FLASH memory (NOR FLASH disk) to store programs and core data.

The main control platform of the utility model is built based on ARM XScale. The main control platform has hardware interfaces such as RS485 synchronous data bus serial port and display screen, which can be cut or increased according to needs. This platform uses FPGA to increase the flexibility of the system. It is convenient to add new interfaces. The main frequency of the ARM processor can be changed to reduce power consumption, and the main frequency of the ARM processor can be reduced in low-power systems.

In the embodiment of the utility model, the main control platform further includes a power supply module, and the power supply module is respectively used to provide DC power to the FPGA, the ARM processor, and the CPLD. The power module includes modules such as the first power management chip, the second power management chip, SRAM memory and real-time clock. The model of the first power management chip is BQ2201, the model of SRAM memory is M68A031, the model of real-time clock is PCF85631, and the The model of the management chip is TPS65022. The first power management chip is electrically connected to the SRAM memory and the real-time clock respectively, the SRAM memory and the real-time clock are respectively connected to the BUS bus in the main control platform, and the second power management chip is used to receive external power and is electrically connected to the BUS in the main control platform bus. In the embodiment of the utility model, the level of each digital interface in the main control platform is 3.3VCMOS level, and the amplitude range of the analog signal received by the main control platform is 0 to 6V.

In the embodiment of the utility model, the short-wave communication equipment is a short-wave power amplifier or a short-wave antenna tuner, and the main control platform can complete the front-end interface control of the short-wave power amplifier or short-wave antenna tuner under the CNI architecture, BIT status query (including function BIT, module BIT and status BIT), query device identity information (such as name, model, serial number, software version number, manufacturer, etc.), can monitor the working status of shortwave power amplifier or shortwave antenna tuner in real time, and feed back product information and status to the operation through the display screen so that the operator can accurately grasp the working status of the product, which is convenient for the test, maintenance and inspection of shortwave power amplifiers and shortwave antenna tuners.

In the embodiment of the utility model, the main control unit is packaged in the case, and the design of the case follows the design principles of small size, light weight, few structural parts, convenient use and easy disassembly, and its external dimension is 210.5 (length) × 120 ( High) * 28 (wide), the weight of the utility model is about 1.0kg. The box structure of the chassis is mainly made of hard aluminum, which ensures the precision and firmness of the box. The connection screw holes between the modules are reinforced with steel wire gong sleeves, which reduces the impact of scratches caused by multiple twists; the selection of connectors The corrosion-resistant materials and the surface of the casing are painted with three anti-paints to meet the requirements of mold and salt spray tests. In order to make the utility model meet the electromagnetic compatibility design, in the printed board in the chassis, the modules with large interference are partially shielded by the shielding frame, each device adopts a sealed structure, and conductive rubber strips are added to the connection of the structural parts to ensure electromagnetic compatibility. sex. The cabinet of the utility model includes a panel, a light guide plate, a pressing plate, a rear shell, a bracket and the like.

The working process of the present utility model is described below.

Complete the initialization work, the initialization content includes the initialization of the terminal hardware, liquid crystal display, and universal bus controller. The multi-functional digital bus control terminal suitable for short-wave communication equipment of the utility model can simultaneously monitor the sending function and the receiving function. When performing sending function monitoring, press the sending function monitoring switch, when it is detected that the corresponding switch button has an action to perform, the corresponding function operation will be completed, and the action will be displayed and displayed on the LCD screen; at the same time, the action will be displayed The representative data information is sent to the tested product through the universal bus controller. When monitoring the receiving function, the RS485 Xingxian receiving status is monitored in real time. When the input of status data information is detected, the information is sent to the ARM processor to complete the protocol analysis of the data information. After the protocol analysis is completed, the data information is in After display processing, it can be displayed on the LCD screen for the staff to check.

The utility model has the advantages of long transmission distance, high reliability, strong anti-interference ability, and can carry multiple loads; secondly, the RS485 interface network structure is simple, the wiring cost is low, and it has a high performance-price ratio. It can control, query and manage two or more external short-wave communication devices at the same time. Due to the use of LED color display, the terminal can directly display sending instructions and return information. Easy to operate and easy to read.

Obviously, those skilled in the art can make various changes and modifications to the utility model without departing from the spirit and scope of the utility model. In this way, if these modifications and variations of the utility model fall within the scope of the claims of the utility model and equivalent technologies thereof, the utility model is also intended to include these modifications and variations.

Claims (5)

1. one kind is applicable to the multifunctional digital bus marco terminal of short wave communication equipment, it is characterized in that, comprise: FPGA, arm processor, CPLD, display screen, described FPGA is provided with RS485 interface, and FPGA is by the RS485 bus of RS485 interface electrical connection short wave communication equipment; Described FPGA is electrically connected arm processor and CPLD respectively by data bus, and described CPLD is electrically connected display screen.

2. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, described data bus is isa bus or I2C bus.

3. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, is characterized in that, also comprise keyboard, and described CPLD is electrically connected keyboard.

4. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, also comprise power module, described power module is respectively used to provide direct supply to FPGA, arm processor, CPLD.

5. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, the model of described FPGA is LFXP6C, and the model of described arm processor is Intel PXA255 processor, and the model of described CPLD is XC3S1000.