CN203675077U - Touch learning switch - Google Patents
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- CN203675077U CN203675077U CN201320799849.0U CN201320799849U CN203675077U CN 203675077 U CN203675077 U CN 203675077U CN 201320799849 U CN201320799849 U CN 201320799849U CN 203675077 U CN203675077 U CN 203675077U
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- 230000003287 optical effect Effects 0.000 claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 12
- 239000010703 silicon Substances 0.000 claims abstract description 12
- 239000003990 capacitor Substances 0.000 claims description 90
- 230000008878 coupling Effects 0.000 claims description 13
- 238000010168 coupling process Methods 0.000 claims description 13
- 238000005859 coupling reaction Methods 0.000 claims description 13
- FGRBYDKOBBBPOI-UHFFFAOYSA-N 10,10-dioxo-2-[4-(N-phenylanilino)phenyl]thioxanthen-9-one Chemical compound O=C1c2ccccc2S(=O)(=O)c2ccc(cc12)-c1ccc(cc1)N(c1ccccc1)c1ccccc1 FGRBYDKOBBBPOI-UHFFFAOYSA-N 0.000 claims description 3
- TVEXGJYMHHTVKP-UHFFFAOYSA-N 6-oxabicyclo[3.2.1]oct-3-en-7-one Chemical compound C1C2C(=O)OC1C=CC2 TVEXGJYMHHTVKP-UHFFFAOYSA-N 0.000 claims description 3
- 230000000694 effects Effects 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 230000007547 defect Effects 0.000 abstract description 3
- 230000006641 stabilisation Effects 0.000 abstract 2
- 238000011105 stabilization Methods 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000005341 toughened glass Substances 0.000 description 1
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Abstract
The utility model provides a touch learning switch, which solves the defect that signals of remote control switches in the prior art are liable to interfere with each other. The switch comprises a mainboard and an auxiliary board. The mainboard includes a switch power supply, a silicon controlled rectifier module, an optical coupler module, an input circuit, a power voltage stabilization module, a second interface, and a reception module. The auxiliary board includes a master control chip, a touch module, an indicator light, and a first interface. The input circuit is electrically connected to the switch power supply. The optical coupler module, the silicon controlled rectifier module and the power voltage stabilization module are all electrically connected to the input circuit. The second interface is movably connected to the optical coupler module. The reception module is movably connected to the first interface and the second interface separately. The master control chip is electrically connected to the indicator light and the touch module. The touch module is electrically connected to the optical coupler module. The first interface is movably connected to the master control chip and the touch module separately. The switch is low in power consumption, highly resistant to interference, high in stability, and sensitive in transmission and reception.
Description
Technical field
The utility model relates to a kind of learn switch, particularly a kind of single live wire capacitance touch learn switch.
Background technology
Existing mechanical switch has following shortcoming: mechanical loss die causes the life-span short; Therefore non-radio control can not Long-distance Control; Mechanical contact is easily subject to environmental impact and the loss of getting rusty, therefore be subject to the impact of surrounding environment humiture; Mechanical type panel-switch lay down location has limited to panel designs, therefore panel designs pattern is not attractive in appearance less; Zero live wire product needed access zero line and live wire could normally use, and the user of traditional switch can not use existing zero live wire product substitution; Very little, the close easy interference of frequency, therefore the mutual interference of the easy signal phase of common remote control switch for signal code value.
Make up above-mentioned defect therefore be necessary to research and develop a kind of learn switch that touches.
Utility model content
The utility model proposes a kind of learn switch that touches, solved the defect of the easy signal phase of remote control switch mutual interference in prior art.The utility model is low in energy consumption, strong anti-interference performance, stability are high, transmission receives sensitive.
The technical solution of the utility model is achieved in that
A kind of learn switch that touches, it comprises mainboard and subplate, described mainboard comprises Switching Power Supply, silicon controlled module, optical coupling module, input circuit, power regulator module, the second interface and receiver module; Described subplate comprises main control chip, touch modules, indicator light and first interface; Described input circuit is electrically connected with described Switching Power Supply; Described optical coupling module, described silicon controlled module, described power regulator module are all electrically connected with described input circuit; Described the second interface is flexibly connected with described optical coupling module; Described receiver module is connected with described first interface, the second interface activity respectively; Described main control chip is all electrically connected with described indicator light, described touch modules; Described touch modules is electrically connected with described optical coupling module; Described first interface is flexibly connected with described main control chip, described touch modules respectively.
Further, described Switching Power Supply comprises chip, transformer, inductance, multiple electric capacity, multiple resistance and multiple diode; Multiple described electric capacity comprises capacitor C 3, capacitor C 4, capacitor C 5, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9; Multiple described resistance comprises resistance R 13, resistance R 14, resistance R 15, resistance R 16 and resistance R 17; Multiple described diodes comprise diode D9, diode D10, diode D11 and diode D12; Described transformer is provided with first input end, the second input, the first output, the second output, the 3rd output and the 4th output; Described the second input is electrically connected the 4th pin of described chip; Described first input end is electrically connected described diode D11, and described diode D11 is electrically connected described input circuit; Between described first input end and described diode D11, be provided with the 11 node and the 12 node; Described inductance is connected electrically on the 5th pin of described diode D11 and described chip, between described inductance and described diode D11, is provided with the 14 node, between described inductance and described diode D11, is provided with the 13 node; Described capacitor C 6 is connected electrically between described the 12 node and described the 14 node; Described capacitor C 4 is connected electrically between described the 11 node and described the 13 node; Described resistance R 16 one end are connected electrically between described capacitor C 6 and described the 14 node, and its other end is connected electrically between described capacitor C 4 and described the 13 node; The 6th pin of described chip, the 7th pin, the 8th pin are all connected electrically on described the 13 node; Described capacitor C 9 one end are electrically connected the first pin of described chip, its other end is electrically connected described diode D12, the described diode D12 other end is electrically connected Sohu of Soviet Union the first output, between described capacitor C 9 and described diode D12, be provided with the 16 node and the 17 node, between the first pin of described chip and described capacitor C 9, be provided with the 15 node; Described capacitor C 7 one end are electrically connected described the 17 node, and its other end is electrically connected described the second output; Described resistance R 15 one end are electrically connected described the 15 node, and its other end is electrically connected described diode D10, and the described diode D10 other end is electrically connected described the 18 node; The second pin of described chip is connected electrically between described resistance R 14 and described resistance R 17; Described resistance R 14 one end are electrically connected described the 18 node, and its other end is electrically connected described resistance R 17, and described resistance R 17 other ends are electrically connected described the 17 node; Described capacitor C 8 one end are connected electrically between described resistance R 14 and described resistance R 17, and its other end is connected electrically between described the 16 node and described the 17 node; Described the 3rd output head grounding, described the 4th output is electrically connected described power regulator module, and described diode D9 is connected electrically between described the 4th output and described power regulator module; Described resistance R 13 one end are connected electrically between described the 4th output and described diode D9, and its other end is electrically connected described capacitor C 3, and described capacitor C 3 other ends are connected electrically between described diode D9 and described power regulator module; Described capacitor C 5 one end are electrically connected described the 3rd output, and its other end is connected electrically between described diode D9 and described power regulator module.
Further, described touch modules comprises touch chip, multiple resistance, multiple electric capacity and multiple main control chip input; Described touch chip comprises the first pin, the second pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the tenth pin, the 11 pin, the 12 pin, the 13 pin and the 14 pin; Multiple described resistance comprises resistance R S0, resistance R S1, resistance R S2, resistance R S3, resistance R B, resistance R O1, resistance R O2, resistance R O3 and resistance R O4; Multiple described electric capacity comprises capacitor C S0, capacitor C S1, capacitor C S2, capacitor C S3, capacitor C B and capacitor C VDD; Multiple described main control chip inputs comprise the first main control chip input, the second main control chip input, the 3rd main control chip input and the 4th main control chip input; Described the first pin, described the 8th pin, the equal ground connection of described the 12 pin; Described the second pin is electrically connected described first interface; Described the 3rd pin is provided with first node and Section Point, and described constant volume CB one end is electrically connected described first node, and its other end is electrically connected described first interface; Described resistance R B is connected electrically between described first node and described Section Point; Described Section Point ground connection; Described capacitor C VDD one end is electrically connected described first interface, and its other end is electrically connected described Section Point; Described resistance R S1 one end is electrically connected described the first main control chip input, and its other end is electrically connected described the 4th pin, and is provided with the 3rd node between described resistance R S1 and described the 4th pin; Described capacitor C S0 one end is electrically connected described the 3rd node, its other end ground connection; Described resistance R S2 one end is electrically connected described the second main control chip input, and its other end is electrically connected described the 5th pin, and is provided with the 4th node between described resistance R S2 and described the 5th pin; Described capacitor C S1 one end is electrically connected described the 4th node, its other end ground connection; Described resistance R S3 one end is electrically connected described the 3rd main control chip input, and its other end is electrically connected described the 6th pin, and is provided with the 5th node between described resistance R S3 and described the 6th pin; Described capacitor C S2 one end is electrically connected described the 5th node, its other end ground connection; Described the 7th pin is electrically connected described first interface; Described resistance R S3 one end is electrically connected described the 4th main control chip input, and its other end is electrically connected described the 9th pin, and between described the 9th pin and described resistance R S3, is provided with the 6th node; Described capacitor C S3 one end is electrically connected described the 6th node, its other end ground connection; Described the tenth pin, described the 11 pin, described the 13 pin, described the 14 pin are all electrically connected on described main control chip; Between described the tenth pin and described main control chip, be provided with the 7th node, between described the 11 pin and described main control chip, be provided with the 8th node, between described the 13 pin and described main control chip, be provided with the 9th node, between described the 14 pin and described main control chip, be provided with protelum point; Described resistance R O1 one end is electrically connected described the 7th node, and its other end is electrically connected described first interface; Described resistance R O2 one end is electrically connected described the 8th node, and its other end is electrically connected described first interface; Described resistance R O3 one end is electrically connected described the 9th node, and its other end is electrically connected described first interface; Described resistance R O4 one end is electrically connected described protelum point, and its other end is electrically connected described first interface.
Compared with prior art, tool has the following advantages the utility model:
1, the setting of touch modules, makes to the utlity model has the advantage of high noise immunity, low-power consumption, high stability, sensitive automatical calibration.
2, the setting of receiver module 3.3V super low-power consumption, fully reduces the stand-by power consumption of switch panel.
3, the setting of silicon controlled module, makes the utility model safety and stability, and antisurge is high.
4, the setting of Switching Power Supply, makes that the utility model is stable, wide voltage, safe and reliable, efficiency is high, stand-by power consumption is low.
5, the setting of main control chip, makes the utlity model has the advantage of low-power consumption, high stability.
Brief description of the drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the circuit diagram of the utility model mainboard;
Fig. 2 is the circuit diagram of the utility model subplate.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtaining under creative work prerequisite, all belong to the scope of the utility model protection.
With reference to Fig. 1 and Fig. 2, a kind of learn switch that touches, it comprises mainboard 1 and subplate 2, described mainboard 1 comprises Switching Power Supply 3, silicon controlled module 4, optical coupling module 5, input circuit 6, power regulator module 7, the second interface 8 and receiver module 9; Described subplate 2 comprises main control chip 10, touch modules 11, indicator light 12 and first interface 13; Described input circuit is electrically connected with described Switching Power Supply; Described optical coupling module, described silicon controlled module, described power regulator module are all electrically connected with described input circuit; Described the second interface is flexibly connected with described optical coupling module; Described receiver module is connected with described first interface, the second interface activity respectively; Described main control chip is all electrically connected with described indicator light, described touch modules; Described touch modules is electrically connected with described optical coupling module; Described first interface is flexibly connected with described main control chip, described touch modules respectively.
Further, described Switching Power Supply comprises chip, transformer, inductance, multiple electric capacity, multiple resistance and multiple diode; Multiple described electric capacity comprises capacitor C 3, capacitor C 4, capacitor C 5, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9; Multiple described resistance comprises resistance R 13, resistance R 14, resistance R 15, resistance R 16 and resistance R 17; Multiple described diodes comprise diode D9, diode D10, diode D11 and diode D12; Described transformer is provided with first input end, the second input, the first output, the second output, the 3rd output and the 4th output; Described the second input is electrically connected the 4th pin of described chip; Described first input end is electrically connected described diode D11, and described diode D11 is electrically connected described input circuit; Between described first input end and described diode D11, be provided with the 11 node and the 12 node; Described inductance is connected electrically on the 5th pin of described diode D11 and described chip, between described inductance and described diode D11, is provided with the 14 node, between described inductance and described diode D11, is provided with the 13 node; Described capacitor C 6 is connected electrically between described the 12 node and described the 14 node; Described capacitor C 4 is connected electrically between described the 11 node and described the 13 node; Described resistance R 16 one end are connected electrically between described capacitor C 6 and described the 14 node, and its other end is connected electrically between described capacitor C 4 and described the 13 node; The 6th pin of described chip, the 7th pin, the 8th pin are all connected electrically on described the 13 node; Described capacitor C 9 one end are electrically connected the first pin of described chip, its other end is electrically connected described diode D12, the described diode D12 other end is electrically connected Sohu of Soviet Union the first output, between described capacitor C 9 and described diode D12, be provided with the 16 node and the 17 node, between the first pin of described chip and described capacitor C 9, be provided with the 15 node; Described capacitor C 7 one end are electrically connected described the 17 node, and its other end is electrically connected described the second output; Described resistance R 15 one end are electrically connected described the 15 node, and its other end is electrically connected described diode D10, and the described diode D10 other end is electrically connected described the 18 node; The second pin of described chip is connected electrically between described resistance R 14 and described resistance R 17; Described resistance R 14 one end are electrically connected described the 18 node, and its other end is electrically connected described resistance R 17, and described resistance R 17 other ends are electrically connected described the 17 node; Described capacitor C 8 one end are connected electrically between described resistance R 14 and described resistance R 17, and its other end is connected electrically between described the 16 node and described the 17 node; Described the 3rd output head grounding, described the 4th output is electrically connected described power regulator module, and described diode D9 is connected electrically between described the 4th output and described power regulator module; Described resistance R 13 one end are connected electrically between described the 4th output and described diode D9, and its other end is electrically connected described capacitor C 3, and described capacitor C 3 other ends are connected electrically between described diode D9 and described power regulator module; Described capacitor C 5 one end are electrically connected described the 3rd output, and its other end is connected electrically between described diode D9 and described power regulator module.
Further, described touch modules comprises touch chip, multiple resistance, multiple electric capacity and multiple main control chip input; Described touch chip comprises the first pin, the second pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the tenth pin, the 11 pin, the 12 pin, the 13 pin and the 14 pin; Multiple described resistance comprises resistance R S0, resistance R S1, resistance R S2, resistance R S3, resistance R B, resistance R O1, resistance R O2, resistance R O3 and resistance R O4; Multiple described electric capacity comprises capacitor C S0, capacitor C S1, capacitor C S2, capacitor C S3, capacitor C B and capacitor C VDD; Multiple described main control chip inputs comprise the first main control chip input, the second main control chip input, the 3rd main control chip input and the 4th main control chip input; Described the first pin, described the 8th pin, the equal ground connection of described the 12 pin; Described the second pin is electrically connected described first interface; Described the 3rd pin is provided with first node and Section Point, and described constant volume CB one end is electrically connected described first node, and its other end is electrically connected described first interface; Described resistance R B is connected electrically between described first node and described Section Point; Described Section Point ground connection; Described capacitor C VDD one end is electrically connected described first interface, and its other end is electrically connected described Section Point; Described resistance R S1 one end is electrically connected described the first main control chip input, and its other end is electrically connected described the 4th pin, and is provided with the 3rd node between described resistance R S1 and described the 4th pin; Described capacitor C S0 one end is electrically connected described the 3rd node, its other end ground connection; Described resistance R S2 one end is electrically connected described the second main control chip input, and its other end is electrically connected described the 5th pin, and is provided with the 4th node between described resistance R S2 and described the 5th pin; Described capacitor C S1 one end is electrically connected described the 4th node, its other end ground connection; Described resistance R S3 one end is electrically connected described the 3rd main control chip input, and its other end is electrically connected described the 6th pin, and is provided with the 5th node between described resistance R S3 and described the 6th pin; Described capacitor C S2 one end is electrically connected described the 5th node, its other end ground connection; Described the 7th pin is electrically connected described first interface; Described resistance R S3 one end is electrically connected described the 4th main control chip input, and its other end is electrically connected described the 9th pin, and between described the 9th pin and described resistance R S3, is provided with the 6th node; Described capacitor C S3 one end is electrically connected described the 6th node, its other end ground connection; Described the tenth pin, described the 11 pin, described the 13 pin, described the 14 pin are all electrically connected on described main control chip; Between described the tenth pin and described main control chip, be provided with the 7th node, between described the 11 pin and described main control chip, be provided with the 8th node, between described the 13 pin and described main control chip, be provided with the 9th node, between described the 14 pin and described main control chip, be provided with protelum point; Described resistance R O1 one end is electrically connected described the 7th node, and its other end is electrically connected described first interface; Described resistance R O2 one end is electrically connected described the 8th node, and its other end is electrically connected described first interface; Described resistance R O3 one end is electrically connected described the 9th node, and its other end is electrically connected described first interface; Described resistance R O4 one end is electrically connected described protelum point, and its other end is electrically connected described first interface.
The utility model Switching Power Supply adopts the power circuit of high efficiency low standby power loss; Touch modules adopts ADS to touch chip, highly sensitive, by the optimization of program, can realize high-sensitive switch; Receiver module adopts the module of 3.3V super low-power consumption, fully reduces the stand-by power consumption of switch panel.
The utility model silicon controlled module is not only the main body of Switching Power Supply, or the key component of power taking; Controllable silicon power taking coordinates Switching Power Supply power supply, for whole control system provides stable, sufficient energy supply.Silicon controlled module and Switching Power Supply are opened and are worked alone separately with off-state and cooperation mutually at electrical appliance, for one wire system product provides reliable support.The utility model arranges the Switching Power Supply of ultra-micro power consumption, and it possesses the antisurge impact capacity of 700V, and power consumption only has 3mw under standby mode, therefore greatly reduce energy consumption of the present utility model.
The utility model touch modules adopts capacitance touch module, capacitance touch module provides very high sensitive touch to detect, possess according to the function of plate thickness automatic calibration sensitivity, when finger touch is during at toughened glass panel, due to people's bulk electric field, user and touch screen surface form with a coupling capacitance, for high-frequency current, electric capacity is direct conductor, so finger siphons away a very little electric current from contact point, this electric current divides in the electrode four jiaos from touch-screen and flows out, and the electric current of these four electrodes of flowing through is directly proportional to the distance of four jiaos to finger, controller is by the accurate Calculation to these four current ratios, draw the position of touch point.
The utility model receiver module adopts the wireless transmission frequency of 315MHZ, and it is ultra-micro power consumption module, can detect in real time the signal of reception, and can receive the data of sending to the remote controller of corresponding frequency; What it adopted is simplex radio data transfer mode, and the data that encode on remote controller or main frame are sent after received module reception, and single-chip microcomputer is decoded, and identifies the other side's instruction and does next step processing.
What the utility model main control chip adopted is 8 single-chip microcomputers, single-chip microcomputer is to carrying out signal decoding the processing instruction to receiver module and touch modules, single-chip microcomputer has been opened house dog and under-voltage reset function, to deal with the situation that causes the possible deadlock of single-chip microcomputer under the environment changing in complexity.In addition, the utlity model has power-off hold function, to still preserving after the remote controller having matched or main frame power-off.
According to the actual requirements, those skilled in the art are by adjusting the connection line of touch modules and main control chip, keep motherboard circuit inconvenience, only adjust the connected mode that touches chip the tenth pin, the 11 pin, the 13 pin and the 14 pin and main control chip, can obtain the touch learn switch with the utility model principle of uniformity.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all within spirit of the present utility model and principle, any amendment of doing, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model.
Claims (3)
1. touch a learn switch, it is characterized in that, it comprises mainboard and subplate, and described mainboard comprises Switching Power Supply, silicon controlled module, optical coupling module, input circuit, power regulator module, the second interface and receiver module; Described subplate comprises main control chip, touch modules, indicator light and first interface;
Described input circuit is electrically connected with described Switching Power Supply; Described optical coupling module, described silicon controlled module, described power regulator module are all electrically connected with described input circuit; Described the second interface is flexibly connected with described optical coupling module; Described receiver module is connected with described first interface, the second interface activity respectively;
Described main control chip is all electrically connected with described indicator light, described touch modules; Described touch modules is electrically connected with described optical coupling module; Described first interface is flexibly connected with described main control chip, described touch modules respectively.
2. touch learn switch as claimed in claim 1, is characterized in that, described Switching Power Supply comprises chip, transformer, inductance, multiple electric capacity, multiple resistance and multiple diode;
Multiple described electric capacity comprises capacitor C 3, capacitor C 4, capacitor C 5, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9;
Multiple described resistance comprises resistance R 13, resistance R 14, resistance R 15, resistance R 16 and resistance R 17;
Multiple described diodes comprise diode D9, diode D10, diode D11 and diode D12;
Described transformer is provided with first input end, the second input, the first output, the second output, the 3rd output and the 4th output; Described the second input is electrically connected the 4th pin of described chip; Described first input end is electrically connected described diode D11, and described diode D11 is electrically connected described input circuit; Between described first input end and described diode D11, be provided with the 11 node and the 12 node; Described inductance is connected electrically on the 5th pin of described diode D11 and described chip, between described inductance and described diode D11, is provided with the 14 node, between described inductance and described diode D11, is provided with the 13 node; Described capacitor C 6 is connected electrically between described the 12 node and described the 14 node; Described capacitor C 4 is connected electrically between described the 11 node and described the 13 node; Described resistance R 16 one end are connected electrically between described capacitor C 6 and described the 14 node, and its other end is connected electrically between described capacitor C 4 and described the 13 node; The 6th pin of described chip, the 7th pin, the 8th pin are all connected electrically on described the 13 node; Described capacitor C 9 one end are electrically connected the first pin of described chip, its other end is electrically connected described diode D12, the described diode D12 other end is electrically connected Sohu of Soviet Union the first output, between described capacitor C 9 and described diode D12, be provided with the 16 node and the 17 node, between the first pin of described chip and described capacitor C 9, be provided with the 15 node; Described capacitor C 7 one end are electrically connected described the 17 node, and its other end is electrically connected described the second output; Described resistance R 15 one end are electrically connected described the 15 node, and its other end is electrically connected described diode D10, and the described diode D10 other end is electrically connected described the 18 node; The second pin of described chip is connected electrically between described resistance R 14 and described resistance R 17; Described resistance R 14 one end are electrically connected described the 18 node, and its other end is electrically connected described resistance R 17, and described resistance R 17 other ends are electrically connected described the 17 node; Described capacitor C 8 one end are connected electrically between described resistance R 14 and described resistance R 17, and its other end is connected electrically between described the 16 node and described the 17 node; Described the 3rd output head grounding, described the 4th output is electrically connected described power regulator module, and described diode D9 is connected electrically between described the 4th output and described power regulator module; Described resistance R 13 one end are connected electrically between described the 4th output and described diode D9, and its other end is electrically connected described capacitor C 3, and described capacitor C 3 other ends are connected electrically between described diode D9 and described power regulator module; Described capacitor C 5 one end are electrically connected described the 3rd output, and its other end is connected electrically between described diode D9 and described power regulator module.
3. touch learn switch as claimed in claim 1 or 2, is characterized in that, described touch modules comprises touch chip, multiple resistance, multiple electric capacity and multiple main control chip input;
Described touch chip comprises the first pin, the second pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the tenth pin, the 11 pin, the 12 pin, the 13 pin and the 14 pin;
Multiple described resistance comprises resistance R S0, resistance R S1, resistance R S2, resistance R S3, resistance R B, resistance R O1, resistance R O2, resistance R O3 and resistance R O4;
Multiple described electric capacity comprises capacitor C S0, capacitor C S1, capacitor C S2, capacitor C S3, capacitor C B and capacitor C VDD;
Multiple described main control chip inputs comprise the first main control chip input, the second main control chip input, the 3rd main control chip input and the 4th main control chip input;
Described the first pin, described the 8th pin, the equal ground connection of described the 12 pin; Described the second pin is electrically connected described first interface; Described the 3rd pin is provided with first node and Section Point, and described constant volume CB one end is electrically connected described first node, and its other end is electrically connected described first interface; Described resistance R B is connected electrically between described first node and described Section Point; Described Section Point ground connection; Described capacitor C VDD one end is electrically connected described first interface, and its other end is electrically connected described Section Point; Described resistance R S1 one end is electrically connected described the first main control chip input, and its other end is electrically connected described the 4th pin, and is provided with the 3rd node between described resistance R S1 and described the 4th pin; Described capacitor C S0 one end is electrically connected described the 3rd node, its other end ground connection; Described resistance R S2 one end is electrically connected described the second main control chip input, and its other end is electrically connected described the 5th pin, and is provided with the 4th node between described resistance R S2 and described the 5th pin; Described capacitor C S1 one end is electrically connected described the 4th node, its other end ground connection; Described resistance R S3 one end is electrically connected described the 3rd main control chip input, and its other end is electrically connected described the 6th pin, and is provided with the 5th node between described resistance R S3 and described the 6th pin; Described capacitor C S2 one end is electrically connected described the 5th node, its other end ground connection; Described the 7th pin is electrically connected described first interface; Described resistance R S3 one end is electrically connected described the 4th main control chip input, and its other end is electrically connected described the 9th pin, and between described the 9th pin and described resistance R S3, is provided with the 6th node; Described capacitor C S3 one end is electrically connected described the 6th node, its other end ground connection; Described the tenth pin, described the 11 pin, described the 13 pin, described the 14 pin are all electrically connected on described main control chip; Between described the tenth pin and described main control chip, be provided with the 7th node, between described the 11 pin and described main control chip, be provided with the 8th node, between described the 13 pin and described main control chip, be provided with the 9th node, between described the 14 pin and described main control chip, be provided with protelum point; Described resistance R O1 one end is electrically connected described the 7th node, and its other end is electrically connected described first interface; Described resistance R O2 one end is electrically connected described the 8th node, and its other end is electrically connected described first interface; Described resistance R O3 one end is electrically connected described the 9th node, and its other end is electrically connected described first interface; Described resistance R O4 one end is electrically connected described protelum point, and its other end is electrically connected described first interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320799849.0U CN203675077U (en) | 2013-12-06 | 2013-12-06 | Touch learning switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320799849.0U CN203675077U (en) | 2013-12-06 | 2013-12-06 | Touch learning switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203675077U true CN203675077U (en) | 2014-06-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320799849.0U Expired - Fee Related CN203675077U (en) | 2013-12-06 | 2013-12-06 | Touch learning switch |
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| Country | Link |
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| CN (1) | CN203675077U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112885070A (en) * | 2017-05-27 | 2021-06-01 | 广东易百珑智能科技有限公司 | Ultramicro power consumption signal transmitting device and application thereof |
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2013
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112885070A (en) * | 2017-05-27 | 2021-06-01 | 广东易百珑智能科技有限公司 | Ultramicro power consumption signal transmitting device and application thereof |
| CN112885070B (en) * | 2017-05-27 | 2022-05-31 | 广东易百珑智能科技有限公司 | Ultramicro power consumption signal transmitting device and application thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140625 Termination date: 20161206 |