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CN203193607U - Source follower based on PMOS transistor - Google Patents

Source follower based on PMOS transistor Download PDF

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CN203193607U
CN203193607U CN 201320108592 CN201320108592U CN203193607U CN 203193607 U CN203193607 U CN 203193607U CN 201320108592 CN201320108592 CN 201320108592 CN 201320108592 U CN201320108592 U CN 201320108592U CN 203193607 U CN203193607 U CN 203193607U
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source
pmos transistor
source follower
terminal
drain
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刘松
杨飞琴
吴柯
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Core Front Kuantai Technology (beijing) Co Ltd
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Hong Kong China Analog Technologies Co ltd
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Abstract

The utility model provides a source follower based on PMOS transistor belongs to source follower technical field. The source follower comprises a current source and a PMOS transistor serving as an input device, wherein a body terminal of the PMOS transistor is connected with an input terminal of the source followerin) Is connected so as to make the voltage (V) between the source and the bulk of the N-well NMOS transistorsb) Remains substantially constant in the event of input signal variations. The source follower has small distortion and good linearity, and is particularly suitable for being applied to high-speed and heavy-load occasions.

Description

基于PMOS晶体管的源极跟随器Source follower based on PMOS transistor

技术领域 technical field

本实用新型属于源极跟随器技术领域,涉及基于PMOS晶体管的源极跟随器。  The utility model belongs to the technical field of source followers and relates to a source follower based on a PMOS transistor. the

背景技术 Background technique

基于MOS器件(即MOSFET,也即MOS晶体管)的源极跟随器被广泛应用于各种功能电路中。例如,源极跟随器通常可以用作高速输入缓冲,它电路结构简单,源极跟随器可以提供高输入阻抗、低输出阻抗和宽信号带宽;相比于基于闭环驱动的运算放大器,源极跟随器不存在稳定性问题。因此,源极跟随器非常适用于缓冲器和驱动电路。  Source followers based on MOS devices (that is, MOSFETs, that is, MOS transistors) are widely used in various functional circuits. For example, the source follower can usually be used as a high-speed input buffer, its circuit structure is simple, the source follower can provide high input impedance, low output impedance and wide signal bandwidth; compared with the operational amplifier based on closed-loop drive, the source follower There are no stability issues with the device. Therefore, source followers are well suited for buffer and driver circuits. the

图1所示为传统PMOS晶体管的截面结构示意图,图2所示为图1的传统PMOS晶体管的等效电路示意图。图3所示为基于图1所示的PMOS晶体管所形成的传统源极跟随器的电路示意图。  FIG. 1 is a schematic diagram of a cross-sectional structure of a conventional PMOS transistor, and FIG. 2 is a schematic diagram of an equivalent circuit of the conventional PMOS transistor of FIG. 1 . FIG. 3 is a schematic circuit diagram of a conventional source follower formed based on the PMOS transistor shown in FIG. 1 . the

如图1所示,传统PMOS晶体管选择在P型衬底或基片111上形成,其包括N阱113、源区121、漏区122、体端(Bulk,以下简称为B)132、源极(Source,以下简称为S)133、栅极(Gate,以下简称为G)134、漏极(Drain,以下简称为D)135和栅介质层140。其中, N阱113可以为N导电类型,其可以通过对P型衬底111构图N型掺杂形成,用来形成PMOS晶体管;在N阱113中,构图掺杂形成源区121和漏区122,二者可以同时掺杂形成,也可以分步掺杂形成,并且二者同为P导电类型,其具体掺杂浓度不是限制性的,在源区121和漏区122之间,可以栅偏压的控制下可以形成沟道;源极133可以从源区121引出金属电极形成,漏极135可以从漏区122引出金属电极形成;体端132从N阱113中引出形成;栅介质层140具体可以但不限于为SiO2,其可以通过对硅材料的衬底111的表面构图氧化形成,栅极134形成在源极133和漏极135之间。为避免上述寄生二极管正向偏置,P型衬底111偏置接地信号GND。  As shown in Figure 1, the traditional PMOS transistor is selected to be formed on a P-type substrate or substrate 111, which includes an N well 113, a source region 121, a drain region 122, a bulk terminal (Bulk, hereinafter referred to as B) 132, a source (Source, hereinafter referred to as S) 133 , gate (Gate, hereinafter referred to as G) 134 , drain (Drain, hereinafter referred to as D) 135 and gate dielectric layer 140 . Wherein, the N well 113 can be of N conductivity type, which can be formed by patterning N-type doping to the P-type substrate 111 to form a PMOS transistor; in the N well 113, the source region 121 and the drain region 122 are formed by patterning doping , the two can be formed by doping at the same time, or can be formed by doping in steps, and both are of the P conductivity type, and the specific doping concentration is not limiting. Between the source region 121 and the drain region 122, the gate bias can be A channel can be formed under the control of the voltage; the source 133 can be formed by drawing a metal electrode from the source region 121, and the drain 135 can be formed by drawing a metal electrode from the drain region 122; the body terminal 132 can be formed by drawing a metal electrode from the N well 113; the gate dielectric layer 140 Specifically, but not limited to, it can be SiO 2 , which can be formed by patterning and oxidizing the surface of the substrate 111 made of silicon material, and the gate 134 is formed between the source 133 and the drain 135 . In order to avoid the above parasitic diodes from being forward biased, the P-type substrate 111 is biased to the ground signal GND.

按照以上实施例形成如图1所示的PMOS晶体管的同时,该PMOS晶体管中通常会形成寄生电容Csb 、Cdb和Cb,其中,Csb为源区121与N阱 113之间形成的二极管(如图1中所示)的结电容,Cdb为漏区122与N阱 113之间形成的二极管(如图1中所示)的结电容,Cb为N阱 113与P型衬底111之间形成的二极管(如图1中所示)的结电容。  While forming the PMOS transistor shown in FIG. 1 according to the above embodiment, parasitic capacitances C sb , C db and C b are usually formed in the PMOS transistor, wherein C sb is formed between the source region 121 and the N well 113 The junction capacitance of the diode (as shown in Figure 1), Cdb is the junction capacitance of the diode (as shown in Figure 1) formed between the drain region 122 and the N well 113, and Cb is the junction capacitance of the N well 113 and the P-type substrate The junction capacitance of the diode (as shown in Figure 1) formed between the bottom 111.

现有的基于图1所示的PMOS晶体管形成的源极跟随器中,不可避免地至少存在Csb 、Cdb和Cb三个寄生电容。由于PMOS晶体管存在增益Gain会随输出信号的电压的变化而变化的特性,即存在电压依赖性,因此,现有的基于PMOS晶体管的源极跟随器在输入信号摆幅较大时容易发生较大失真,从而容易线性失真,线性度差。  In the existing source follower formed based on the PMOS transistor shown in FIG. 1 , at least three parasitic capacitances C sb , C db and C b inevitably exist. Since the PMOS transistor has the characteristic that the gain Gain will change with the voltage of the output signal, that is, there is a voltage dependence. Therefore, the existing source follower based on the PMOS transistor is prone to large fluctuations when the input signal swing is large. Distortion, thus easy linear distortion, poor linearity.

并且,由于Csb 、Cdb和Cb三个寄生电容的存在,其容易对基于PMOS晶体管的源极跟随器的高频性能产生影响,因此,现有的PMOS晶体管的源极跟随器高频或高速应用时,容易产生动态失真。  Moreover, due to the existence of three parasitic capacitances C sb , C db and C b , it is easy to affect the high-frequency performance of the source follower based on the PMOS transistor. Therefore, the high-frequency performance of the source follower of the existing PMOS transistor Or high-speed applications, prone to dynamic distortion.

有鉴于此,有必要提出一种新型的源极跟随器。  In view of this, it is necessary to propose a new type of source follower. the

实用新型内容 Utility model content

本实用新型的目的之一在于,提高源极跟随器的线性度。  One of the purposes of the present invention is to improve the linearity of the source follower. the

本实用新型的又一目的在于,减小源极跟随器的输出信号的线性失真和动态失真。  Another object of the present invention is to reduce the linear distortion and dynamic distortion of the output signal of the source follower. the

为实现以上目的或者其他目的,本实用新型提供一种基于PMOS晶体管的源极跟随器,包括电流源和用作输入器件的PMOS晶体管,其中,所述PMOS晶体管的栅极被定义为所述源极跟随器的输入端(Vin),所述PMOS晶体管的源极被定义为所述源极跟随器的输出端(Vout),所述PMOS晶体管的漏极连接接地信号(GND),高电平信号(VDD)从所述电流源的一端接入,并且所述电流源的另一端输出电流至所述源极;  To achieve the above or other objectives, the utility model provides a source follower based on a PMOS transistor, including a current source and a PMOS transistor used as an input device, wherein the gate of the PMOS transistor is defined as the source The input terminal of the pole follower (V in ), the source of the PMOS transistor is defined as the output terminal of the source follower (V out ), the drain of the PMOS transistor is connected to the ground signal (GND), high A level signal (V DD ) is connected from one end of the current source, and the other end of the current source outputs current to the source;

其中,所述PMOS晶体管的体端(B)与所述输入端(Vin)连接,以至于使所述源极与所述体端之间的电压(Vsb)在输入信号变化的情况下基本保持恒定。 Wherein, the body terminal (B) of the PMOS transistor is connected to the input terminal (V in ), so that the voltage (V sb ) between the source and the body terminal changes under the condition of input signal change remain essentially constant.

按照本实用新型一实施例的源极跟随器,其中,所述PMOS晶体管包括:  According to the source follower of an embodiment of the present utility model, wherein, the PMOS transistor comprises:

P型衬底; P-type substrate;

在所述P型衬底中构图掺杂形成的N阱; Patterning an N well formed by doping in the P-type substrate;

从所述N阱中引出的体端(B); the bulk terminal (B) drawn from the N-well;

在所述N阱中构图掺杂形成的源区和漏区; Patterning a source region and a drain region formed by doping in the N well;

从所述漏区中引出的源极(S); a source (S) derived from said drain region;

从所述漏区中引出的漏极(D);以及 a drain (D) derived from said drain region; and

栅极(G)。 Gate (G).

在一实施例中,所述PMOS晶体管中,存在所述源区与所述N阱之间形成的二极管所导致的第一寄生电容(Csb)、所述漏区与所述N阱之间形成的二极管所导致的第二寄生电容(Cdb)、所述N阱与所述P型衬底之间形成的二极管所导致的第三寄生电容(Cb)。  In an embodiment, in the PMOS transistor, there is a first parasitic capacitance (C sb ) caused by a diode formed between the source region and the N well, and between the drain region and the N well The second parasitic capacitance (C db ) caused by the formed diode, and the third parasitic capacitance (C b ) caused by the diode formed between the N well and the P-type substrate.

其中,所述第一寄生电容(Csb)等效地置于所述源极和所述体端之间,所述第二寄生电容(Cdb)、第三寄生电容(Cb)等效地并联置于所述体端和所述漏极之间。  Wherein, the first parasitic capacitance (C sb ) is equivalently placed between the source and the body terminal, and the second parasitic capacitance (C db ) and the third parasitic capacitance (C b ) are equivalent The ground is placed in parallel between the body terminal and the drain.

具体地,所述P型衬底接地。  Specifically, the P-type substrate is grounded. the

本实用新型的技术效果是,通过将N阱的体端与输入端Vin连接在一起,一方面可以使源极跟随器的增益不受体效应影响,提高线性度并且线性失真大大减小;另一方面,可以巧妙地使源极跟随器的输出端的寄生电容显著减少,在输入端Vin的输入信号的频率发生变化时,动态失真小,解决在高频输入信号的情况下的动态失真的问题。因此,本实用新型的源极跟随器非常适合于高速大负载场合应用。  The technical effect of the utility model is that, by connecting the bulk terminal of the N well with the input terminal Vin , on the one hand, the gain of the source follower can not be affected by the receptor effect, the linearity is improved and the linear distortion is greatly reduced; On the other hand, the parasitic capacitance at the output terminal of the source follower can be subtly reduced significantly, and when the frequency of the input signal at the input terminal V in changes, the dynamic distortion is small, which solves the dynamic distortion in the case of high-frequency input signal The problem. Therefore, the source follower of the present invention is very suitable for high-speed and heavy-load applications.

附图说明 Description of drawings

从结合附图的以下详细说明中,将会使本实用新型的上述和其他目的及优点更加完整清楚,其中,相同或相似的要素采用相同的标号表示。  The above and other objects and advantages of the present invention will be more fully understood from the following detailed description in conjunction with the accompanying drawings, wherein the same or similar elements are denoted by the same reference numerals. the

图1是传统PMOS晶体管的截面结构示意图;  Fig. 1 is a schematic cross-sectional structure diagram of a traditional PMOS transistor;

图2是图1的传统PMOS晶体管的等效电路示意图。 FIG. 2 is a schematic diagram of an equivalent circuit of the conventional PMOS transistor of FIG. 1 .

图3是基于图1所示的PMOS晶体管所形成的一种源极跟随器的电路示意图。  FIG. 3 is a schematic circuit diagram of a source follower formed based on the PMOS transistor shown in FIG. 1 . the

图4是基于图1所示的PMOS晶体管所形成的按照本实用新型一实施例的源极跟随器的电路示意图。  FIG. 4 is a schematic circuit diagram of a source follower formed based on the PMOS transistor shown in FIG. 1 according to an embodiment of the present invention. the

具体实施方式 Detailed ways

下面介绍的是本实用新型的多个可能实施例中的一些,旨在提供对本实用新型的基本了解,并不旨在确认本实用新型的关键或决定性的要素或限定所要保护的范围。容易理解,根据本实用新型的技术方案,在不变更本实用新型的实质精神下,本领域的一般技术人员可以提出可相互替换的其他实现方式。因此,以下具体实施方式以及附图仅是对本实用新型的技术方案的示例性说明,而不应当视为本实用新型的全部或者视为对本实用新型技术方案的限定或限制。  The following introduces some of the possible embodiments of the present invention, aiming to provide a basic understanding of the present invention, not intended to confirm the key or decisive elements of the present invention or to limit the scope of protection. It is easy to understand that, according to the technical solution of the utility model, those skilled in the art can propose other alternative implementation modes without changing the spirit of the utility model. Therefore, the following specific embodiments and drawings are only exemplary descriptions of the technical solution of the utility model, and should not be regarded as the whole of the utility model or as a limitation or restriction on the technical solution of the utility model. the

将理解,当据称将部件“连接”到另一个部件时,它可以直接连接到另一个部件或可以存在中间部件。相反,当据称将部件 “直接连接”到另一个部件时,则表示不存在中间部件。  It will be understood that when a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may be present. Conversely, when a part is said to be "directly connected" to another part, it means that no intermediate parts exist. the

图3所示为基于图1所示的PMOS晶体管所形成的一种源极跟随器的电路示意图。其中,PMOS晶体管用作输入器件,PMOS晶体管的栅极用作输入端Vin,输入信号(例如前一级输出的信号)从栅极输入;PMOS晶体管的源极用作输出端Vout;漏极偏置接地信号GND,体端也偏置接地信号GND;并且,将电流源置于电源信号VDD和源极之间,其为输入器件提供恒定的偏置电流,高电平的电源信号VDD经过电流源后偏置在源极上。因此,Cdb置于漏极D和体端B之间,Csb置于源极S和体端B之间,Cb也与Cdb并联地置于漏极D和体端B之间。图3所示的源极跟随器的输出信号可以跟随输入信号变化,其增益Gain可以通过以下公式(1)计算:  FIG. 3 is a schematic circuit diagram of a source follower formed based on the PMOS transistor shown in FIG. 1 . Among them, the PMOS transistor is used as an input device, the gate of the PMOS transistor is used as the input terminal V in , and the input signal (such as the signal output by the previous stage) is input from the gate; the source of the PMOS transistor is used as the output terminal V out ; the drain The pole biases the ground signal GND, and the body terminal also biases the ground signal GND; and, a current source is placed between the power signal V DD and the source, which provides a constant bias current for the input device, and the high-level power signal V DD is biased at the source after passing through the current source. Therefore, C db is placed between drain D and body terminal B, C sb is placed between source S and body terminal B, and C b is also placed between drain D and body terminal B in parallel with C db . The output signal of the source follower shown in Figure 3 can follow the input signal, and its gain Gain can be calculated by the following formula (1):

Figure DEST_PATH_976237DEST_PATH_IMAGE001
Figure DEST_PATH_976237DEST_PATH_IMAGE001

其中,

Figure DEST_PATH_719065DEST_PATH_IMAGE002
是输入器件(在此为PMOS晶体管)的输出阻抗,其与电流源并联;
Figure DEST_PATH_772472DEST_PATH_IMAGE003
是PMOS晶体管的跨导。通常
Figure DEST_PATH_612252DEST_PATH_IMAGE002
>>1/
Figure DEST_PATH_279863DEST_PATH_IMAGE003
, 因此,源极跟随器的增益Gain接近等于1,也即,输出信号基本跟随输入信号。 in,
Figure DEST_PATH_719065DEST_PATH_IMAGE002
is the output impedance of the input device (here a PMOS transistor), which is in parallel with the current source;
Figure DEST_PATH_772472DEST_PATH_IMAGE003
is the transconductance of the PMOS transistor. usually
Figure DEST_PATH_612252DEST_PATH_IMAGE002
>>1/
Figure DEST_PATH_279863DEST_PATH_IMAGE003
, Therefore, the gain Gain of the source follower is close to 1, that is, the output signal basically follows the input signal.

传统的PMOS晶体管的源极跟随器中,也是类似地以公式(1)来计算增益。但是,由于实际上输入器件的是随输出信号的电压电平的变化而有所变化的,从而导致其增益Gain亦随输出信号的电压的变化而变化,这种特性通常称为电压依赖性。这种电压依赖性会导致输入信号在高幅度摆动时,源极跟随器呈现非线性特性,也即,在输入信号摆幅较大时容易发生较大失真。  In the source follower of the traditional PMOS transistor, the gain is calculated similarly by formula (1). However, due to the fact that the input device's It changes with the voltage level of the output signal, so that its gain Gain also changes with the voltage of the output signal. This characteristic is usually called voltage dependence. This voltage dependence will cause the source follower to exhibit nonlinear characteristics when the input signal swings at a high amplitude, that is, greater distortion is prone to occur when the input signal swings relatively large.

源极跟随器产生线性失真的根本原因在于引起电压依赖性的一个重要因素:体效应。这是由于,

Figure DEST_PATH_367085DEST_PATH_IMAGE002
是随源极和衬底(B)之间的偏压而变化,也即随Vsb变化;当衬底接地时,源极为输出信号的电压(约等于输入信号的电压),Vsb随输入信号的电压而变化,
Figure DEST_PATH_749787DEST_PATH_IMAGE002
和源极跟随器的增益Gain均随输入信号的电压变化而变化。  The root cause of the linear distortion of the source follower lies in an important factor that causes voltage dependence: the body effect. This is because,
Figure DEST_PATH_367085DEST_PATH_IMAGE002
It varies with the bias voltage between the source and the substrate (B), that is, it varies with V sb ; when the substrate is grounded, the source is the voltage of the output signal (approximately equal to the voltage of the input signal), and V sb varies with the input signal voltage changes,
Figure DEST_PATH_749787DEST_PATH_IMAGE002
Both Gain and the gain of the source follower vary with the voltage of the input signal.

因此,在图3所示实施例的源极跟随器中,通常地,将PMOS晶体管的体端B与自身的源极S直接连接在一起。这样,源极S与体端B之间的电压Vsb基本恒定为零,这样,基本消除了体效应,

Figure DEST_PATH_401348DEST_PATH_IMAGE002
和源极跟随器的增益Gain并不会随源极跟随器的输入端(即栅极)的输入信号的电压变化而变化,也消除了电压依赖性。与传统的源极跟随器相比较,图3所示的源极跟随器大大减小了线性失真,可以提供相对更好的线性度。  Therefore, in the source follower of the embodiment shown in FIG. 3 , generally, the body terminal B of the PMOS transistor is directly connected to its own source S. In this way, the voltage V sb between the source S and the body terminal B is basically constant to zero, so that the body effect is basically eliminated,
Figure DEST_PATH_401348DEST_PATH_IMAGE002
And the gain Gain of the source follower will not change with the voltage change of the input signal at the input terminal (ie gate) of the source follower, and the voltage dependence is also eliminated. Compared with the traditional source follower, the source follower shown in Figure 3 greatly reduces linear distortion and can provide relatively better linearity.

但是,申请人发现,在图3实施例的源极跟随器中,输出端Vout连接寄生电容Cdb和Cb(Csb因衬底连接而短路,不呈现在输出端);当输入信号频率上升时,通过PMOS晶体管的部分输出电流会分流到输出端的电容通道(负载电容或寄生电容),由于这个动态电流是随输入信号频率而变化,这会导致输入器件的输出阻抗也具有电压依赖性,因此,源极跟随器的增益Gain随信号电压变化, 引起动态失真。输入信号的频率越高,输出端的电容(包括寄生电容)越大,动态失真越严重。  However, the applicant found that in the source follower of the embodiment in Figure 3, the output terminal V out is connected to parasitic capacitances C db and C b (C sb is short-circuited due to the substrate connection and does not appear at the output terminal); when the input signal When the frequency rises, part of the output current through the PMOS transistor will be shunted to the capacitive channel (load capacitance or parasitic capacitance) at the output. Since this dynamic current changes with the frequency of the input signal, this will cause the output impedance of the input device to It also has voltage dependence. Therefore, the gain Gain of the source follower changes with the signal voltage, causing dynamic distortion. The higher the frequency of the input signal, the larger the capacitance at the output (including parasitic capacitance), and the more severe the dynamic distortion.

图4所示为基于图1所示的PMOS晶体管所形成的按照本实用新型一实施例的源极跟随器的电路示意图。在图4所示实施例中,同样选择图1所示实施例的PMOS晶体管作为输入器件,电源电压VDD接入电流源,电流源置于源极和高电平的电源电压(VDD)之间,其用于为输入器件提供基本恒定的偏置电流;源极跟随器的输入信号从PMOS晶体管的栅极G输入,栅极G被定义为源极跟随器的输入端Vin;信号从PMOS晶体管的源极S输出,源极S被定义为源极跟随器的输出端Vout;进一步,PMOS晶体管的漏极D和P型衬底111偏置接地信号GND。尤其地,将体端B与输入端Vin或栅极G连接,例如,在图1中,可以将体端132与栅极134直接连接。这样,图4所示实施例的源极跟随器将同时具有以下两方面的优点。  FIG. 4 is a schematic circuit diagram of a source follower formed based on the PMOS transistor shown in FIG. 1 according to an embodiment of the present invention. In the embodiment shown in Figure 4, the PMOS transistor of the embodiment shown in Figure 1 is also selected as the input device, the power supply voltage V DD is connected to the current source, and the current source is placed at the source and the high-level power supply voltage (V DD ) between, which is used to provide a substantially constant bias current for the input device; the input signal of the source follower is input from the gate G of the PMOS transistor, and the gate G is defined as the input terminal V in of the source follower; the signal Output from the source S of the PMOS transistor, which is defined as the output terminal V out of the source follower; further, the drain D of the PMOS transistor and the P-type substrate 111 are biased to the ground signal GND. In particular, the body terminal B is connected to the input terminal Vin or the gate G, for example, in FIG. 1 , the body terminal 132 can be directly connected to the gate 134 . In this way, the source follower of the embodiment shown in FIG. 4 will have the following two advantages at the same time.

第一,考虑了基于PMOS晶体管的源极跟随器的体效应问题。可以注意到,在图4所示实施例中,由于体端B与输入端Vin或栅极G连接,体端B等于栅极G的电位,因此Vsb=Vsg;又由于源极跟随器中源极S电压跟随输入栅极G,因此Vsg将是一个常量,它不会随输入信号的电压的变化而改变,也即,不存在电压依赖性问题。图4所示的源极跟随器的增益Gain Gain的计算可以类似地通过公式(1)计算,其中,

Figure DEST_PATH_45136DEST_PATH_IMAGE002
是输入器件的输出阻抗,
Figure DEST_PATH_593929DEST_PATH_IMAGE003
是PMOS晶体管的跨导)也不受体效应影响,相比传统的源极跟随器,其线性度好,线性失真大大减小。  First, the body effect of source followers based on PMOS transistors is considered. It can be noted that in the embodiment shown in Fig. 4, since the body terminal B is connected to the input terminal Vin or the gate G, the body terminal B is equal to the potential of the gate G, so V sb =V sg ; and since the source follows In the device, the source S voltage follows the input gate G, so V sg will be a constant, it will not change with the voltage of the input signal, that is, there is no voltage dependence problem. The gain Gain of the source follower shown in Figure 4 ( Gain can be calculated similarly by formula (1), where,
Figure DEST_PATH_45136DEST_PATH_IMAGE002
is the output impedance of the input device,
Figure DEST_PATH_593929DEST_PATH_IMAGE003
It is the transconductance of the PMOS transistor) and is not affected by the receptor effect. Compared with the traditional source follower, its linearity is better and the linear distortion is greatly reduced.

第二,考虑了输出端的寄生电容对动态失真的影响。可以注意到,在图4所示实施例中,通过将体端B与输入端Vin或栅极G连接,Cdb和Cb并联地置于体端B与漏极D之间,Cdb和Cb不再出现在输出端Vout;并且对于Csb来说,虽然其置于源端S和体端B之间,但是如前所述, Vsb=Vsg,Vsb电压值也为一常量(不随输入信号的电压变化而变化),从而寄生电容Csb不会增加输出端Vout的电容总量。这样,与图4所示源极跟随器结构相比,其输出端的寄生电容显著减少,在输入端Vin的输入信号的频率发生变化时,不会出现以上图4所示源极跟随器的电压依赖性问题和动态失真问题。  Second, the influence of the parasitic capacitance at the output on the dynamic distortion is considered. It can be noted that in the embodiment shown in Fig. 4, by connecting the body terminal B to the input terminal Vin or the gate G, C db and C b are placed in parallel between the body terminal B and the drain D, C db and C b no longer appear at the output terminal V out ; and for C sb , although it is placed between the source terminal S and the body terminal B, as mentioned earlier, V sb =V sg , the V sb voltage value is also Is a constant (does not change with the voltage of the input signal), so the parasitic capacitance C sb will not increase the total capacitance of the output terminal V out . In this way, compared with the structure of the source follower shown in Figure 4, the parasitic capacitance at the output terminal is significantly reduced, and when the frequency of the input signal at the input terminal Vin changes, the source follower shown in Figure 4 above will not appear Voltage dependence issues and dynamic distortion issues.

综上,图4所示实施例的源极跟随器不但减少了由体效应引起的线性失真,还消除了PMOS晶体管的寄生电容所导致的动态失真的问题,因此,其可以在维持良好低频线性特性的情况下降低动态失真,具有良好的高频特性,非常适合在高速大负载场合应用。  In summary, the source follower of the embodiment shown in Figure 4 not only reduces the linear distortion caused by the body effect, but also eliminates the problem of dynamic distortion caused by the parasitic capacitance of the PMOS transistor, so it can maintain good low-frequency linearity In the case of characteristics, the dynamic distortion is reduced, and it has good high-frequency characteristics, which is very suitable for high-speed and large-load applications. the

需要理解的是,输入端Vin的输入信号可以为前一级电路的输出,例如,前一级电路可以为运算放大器。输入信号的具体类型不是限制性的。  It should be understood that the input signal at the input terminal V in may be the output of the previous stage circuit, for example, the previous stage circuit may be an operational amplifier. The specific type of input signal is not limiting.

还需要理解的是,图4所示实施例的源极跟随器不仅适于在集成电路中制造形成,也适于由PMOS晶体管分离器件通过线路连接形成。  It should also be understood that the source follower of the embodiment shown in FIG. 4 is not only suitable to be manufactured and formed in an integrated circuit, but also suitable to be formed by PMOS transistor discrete devices through wire connection. the

以上例子主要说明了本实用新型的基于PMOS晶体管的源极跟随器。尽管只对其中一些本实用新型的实施方式进行了描述,但是本领域普通技术人员应当了解,本实用新型可以在不偏离其主旨与范围内以许多其他的形式实施。因此,所展示的例子与实施方式被视为示意性的而非限制性的,在不脱离如所附各权利要求所定义的本实用新型精神及范围的情况下,本实用新型可能涵盖各种的修改与替换。  The above examples mainly illustrate the source follower based on PMOS transistors of the present invention. Although only some embodiments of the utility model have been described, those skilled in the art should understand that the utility model can be implemented in many other forms without departing from the gist and scope thereof. The examples and implementations shown are therefore to be regarded as illustrative and not restrictive, and the present invention may cover various modification and replacement. the

Claims (4)

1.一种基于PMOS晶体管的源极跟随器,包括电流源和用作输入器件的PMOS晶体管,其中,所述PMOS晶体管的栅极被定义为所述源极跟随器的输入端,所述PMOS晶体管的源极被定义为所述源极跟随器的输出端,所述PMOS晶体管的漏极连接接地信号,高电平信号从所述电流源的一端接入,并且所述电流源的另一端输出电流至所述源极; 1. A source follower based on a PMOS transistor, comprising a current source and a PMOS transistor used as an input device, wherein the gate of the PMOS transistor is defined as the input terminal of the source follower, and the PMOS The source of the transistor is defined as the output terminal of the source follower, the drain of the PMOS transistor is connected to the ground signal, the high-level signal is connected from one end of the current source, and the other end of the current source output current to the source; 其特征在于,所述PMOS晶体管的体端与所述输入端连接,以至于使所述源极与所述体端之间的电压在输入信号变化的情况下基本保持恒定。 It is characterized in that the bulk terminal of the PMOS transistor is connected to the input terminal, so that the voltage between the source and the bulk terminal remains substantially constant under the condition of input signal changes. 2.如权利要求1所述的源极跟随器,其特征在于,所述PMOS晶体管包括: 2. The source follower according to claim 1, wherein the PMOS transistor comprises: P型衬底; P-type substrate; 在所述P型衬底中构图掺杂形成的N阱; Patterning an N well formed by doping in the P-type substrate; 从所述N阱中引出的体端; a body terminal drawn from the N-well; 在所述N阱中构图掺杂形成的源区和漏区; Patterning a source region and a drain region formed by doping in the N well; 从所述漏区中引出的源极; a source drawn from the drain region; 从所述漏区中引出的漏极;以及 a drain drawn from the drain region; and 栅极。 grid. 3.如权利要求2所述的源极跟随器,其特征在于,所述PMOS晶体管中,存在所述源区与所述N阱之间形成的二极管所导致的第一寄生电容、所述漏区与所述N阱之间形成的二极管所导致的第二寄生电容、所述N阱与所述P型衬底之间形成的二极管所导致的第三寄生电容。 3. The source follower according to claim 2, wherein, in the PMOS transistor, there is a first parasitic capacitance caused by a diode formed between the source region and the N well, the drain The second parasitic capacitance caused by the diode formed between the region and the N well, and the third parasitic capacitance caused by the diode formed between the N well and the P-type substrate. 4.如权利要求3所述的源极跟随器,其特征在于,所述第一寄生电容等效地置于所述源极和所述体端之间,所述第二寄生电容(Cdb)、第三寄生电容等效地并联置于所述体端和所述漏极之间。 4. The source follower according to claim 3, wherein the first parasitic capacitance is equivalently placed between the source and the body terminal, and the second parasitic capacitance (C db ), and the third parasitic capacitance is equivalently connected in parallel between the body terminal and the drain.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199848A (en) * 2013-03-11 2013-07-10 香港中国模拟技术有限公司 Source follower based on PMOS transistor
WO2014139076A1 (en) * 2013-03-11 2014-09-18 香港中国模拟技术有限公司 Source follower based on pmos transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199848A (en) * 2013-03-11 2013-07-10 香港中国模拟技术有限公司 Source follower based on PMOS transistor
WO2014139076A1 (en) * 2013-03-11 2014-09-18 香港中国模拟技术有限公司 Source follower based on pmos transistor

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