CN202997909U - Control circuit and switch converter - Google Patents
Control circuit and switch converter Download PDFInfo
- Publication number
- CN202997909U CN202997909U CN2012206761888U CN201220676188U CN202997909U CN 202997909 U CN202997909 U CN 202997909U CN 2012206761888 U CN2012206761888 U CN 2012206761888U CN 201220676188 U CN201220676188 U CN 201220676188U CN 202997909 U CN202997909 U CN 202997909U
- Authority
- CN
- China
- Prior art keywords
- signal
- output
- control circuit
- circuit
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Dc-Dc Converters (AREA)
Abstract
The utility model discloses a control circuit and switch converter, wherein the switch converter includes power switch tube and synchronous rectifier tube, switching on and shutting off of control circuit control power switch tube and synchronous rectifier tube, when power saving mode control signal is in the active state, according to output voltage's feedback signal and reference voltage's comparative result and the zero cross detection signal control power switch tube who flows through synchronous rectifier tube current switch on, thereby do not need extra overcurrent protection circuit, the quiescent current of switch converter under power saving mode has been reduced, and the efficiency of switch converter under power saving mode has been improved.
Description
Technical field
The utility model relates generally to a kind of electronic circuit, relates in particular to a kind of control circuit for switch converters.
Background technology
Be accompanied by the development of electronic technology, mobile phone, personal digital assistant (PDA), panel computer, net book, super electronic equipments such as (Ultrabook) are popularized rapidly.Super, mobile phone etc. similarly electronic equipment need to have always online, the function (always on and alwaysconnected, AOAC) that connects at any time, namely idle function.Extend as much as possible the standby time that time that electronic equipment can keep extends electronic equipment in other words as much as possible and become one of important indicator of design of electronic devices under the AOAC pattern.The power of electronic equipment under AOAC or standby (standby) pattern is less, is in light condition, and therefore, the circuit working efficient during underloading is most important.
Current switch converters is fast due to its load transient response speed, high efficiency, volume is little and the advantage such as easy of integration, is widely used in electronic equipment.Yet when electronic equipment was in light condition, the quiescent current of switch converters and control circuit consumption thereof directly had influence on the operating efficiency of circuit.In the prior art, usually improve the operating efficiency of circuit by the mode that reduces quiescent current
The utility model content
For one or more problems of the prior art, a purpose of the present utility model is to provide a kind of control circuit and switch converters.
A kind of control circuit according to the utility model one embodiment, be used for switch converters, wherein switch converters comprises power switch pipe and synchronous rectifier, the conducting of control circuit power ratio control switching tube and synchronous rectifier and shutoff, switch converters is used for converting input voltage to output voltage, described control circuit comprises: first input end receives the first feedback signal that represents output voltage; The second input receives the second feedback signal that the synchronous rectification tube current is flow through in representative; And first output, output first drives conducting or the shutoff of signal controlling power switch pipe; Wherein when the battery saving mode control signal is in effective status, according to the conducting of comparative result and the second feedback signal power ratio control switching tube of the first feedback signal and reference voltage.
In one embodiment, described control circuit also comprises comparison circuit, have first input end, the second input and output, wherein first input end receives the first feedback signal, the second input receives reference voltage, and output is according to the comparative result output comparison signal of the first feedback signal and reference voltage; The ON time control circuit provides the ON time control signal, and described control circuit is according to the shutoff of ON time control signal power ratio control switching tube; Zero cross detection circuit, have first input end, the second input and output, wherein first input end receives the second feedback signal, and the second input receives offset signal, and output is according to the comparative result output zero passage detection signal of the second feedback signal and offset signal; And logic control circuit, receive described comparison signal, zero passage detection signal and ON time control signal, and export conducting and the shutoff of the first driving signal controlling power switch pipe; Wherein when the battery saving mode control signal is effective status, described control circuit is according to the conducting of comparison signal and zero passage detection signal controlling power switch pipe, when the battery saving mode control signal is disarmed state, the diverter switch converter works in normal mode of operation, and described control circuit is according to the conducting of comparison signal power ratio control switching tube.
In one embodiment, logic control circuit comprises: the first logical circuit, have first input end, the second input, the 3rd input and output, wherein first input end receives comparison signal, the second input receives the zero passage detection signal, the 3rd input receives the battery saving mode control signal, wherein when the battery saving mode control signal is in effective status, output is according to comparison signal and zero passage detection signal output asserts signal, when the battery saving mode control signal was in disarmed state, output was exported asserts signal according to comparison signal; And first trigger, having set end, reset terminal and output, wherein set termination places a signal, and reset terminal receives the ON time control signal, and output output first drives signal.
In one embodiment, zero cross detection circuit comprises: zero-crossing comparator, zero-crossing comparator comprises in-phase input end, inverting input and output, wherein in-phase input end receives the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth, inverting input receives offset signal, and output is according to the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth and the comparative result output zero passage detection signal of offset signal.
In one embodiment, zero cross detection circuit comprises: zero-crossing comparator, zero-crossing comparator comprises in-phase input end, inverting input and output, and wherein in-phase input end receives the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth, and inverting input receives offset signal; And second trigger, comprise set end, reset terminal and output, wherein the set end is coupled to the output of zero-crossing comparator, and reset terminal receives first and drives signal, output output zero passage detection signal; Wherein the second trigger is according to the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth and the comparative result of offset signal, and first drives signal output zero passage detection signal.
In one embodiment; described control circuit also comprises current foldback circuit; the overcurrent protection signal is provided; wherein current foldback circuit has Enable Pin; receive the battery saving mode control signal; wherein when the battery saving mode control signal was disarmed state, described control circuit was according to the shutoff of ON time control signal or overcurrent protection signal controlling power switch pipe.
In one embodiment, when the battery saving mode control signal was effective status, described current foldback circuit quit work.
According to a kind of switch converters of the utility model one embodiment, this switch converters comprises foregoing control circuit, power switch pipe and synchronous rectifier.
In one embodiment, described control circuit also comprises the second output, and output second drives conducting and the shutoff of signal controlling synchronous rectification; Power switch pipe has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the first output of control circuit; Synchronous rectifier has first end, the second end and control end, and wherein first end is coupled to the second end of power switch pipe, and the second end of synchronous rectifier is coupled to systematically, and the control end of synchronous rectifier is coupled to the second output of control circuit; This switch converters also comprises: inductor, have first end and the second end, and wherein first end is coupled to the second end of power switch pipe and the first end of synchronous rectifier; And output capacitor, be electrically coupled with the second end of inductor and systematically between.
The embodiment that utilization the utility model proposes can reduce the quiescent current of switch converters under battery saving mode, increases work efficiency.
Description of drawings
Read hereinafter detailed description by the reference accompanying drawing, above-mentioned and other purposes of the utility model execution mode, the feature and advantage easy to understand that will become.In the accompanying drawings, show some embodiments possible of the present utility model in exemplary and nonrestrictive mode, wherein:
Fig. 1 is the circuit block diagram according to the switch converters 100 of the utility model one embodiment;
Fig. 2 is the circuit theory diagrams according to the switch converters 200 of the utility model one embodiment;
Fig. 3 is the oscillogram of the switch converters 200 corresponding shown in Figure 2 according to the utility model one embodiment when working under battery saving mode; And
Fig. 4 is switch converters 200 corresponding shown in Figure 2 according to the utility model one embodiment oscillogram when output short-circuit or overcurrent under battery saving mode;
In the accompanying drawings, identical label is used to represent identical or corresponding element.
Embodiment
The below will describe specific embodiment of the utility model in detail, should be noted that the embodiments described herein only is used for illustrating, and be not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it is evident that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and or sub-portfolio with specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this diagram that provides be all for illustrative purposes, and diagram is drawn in proportion not necessarily.Should be appreciated that it can be directly connect or be couple to another element or can have intermediary element when claiming " element " " to be connected to " or " coupling " during to another element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.The identical identical element of Reference numeral indication.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 1 is the circuit block diagram according to the switch converters 100 of the utility model one embodiment.Switch converters 100 comprises power stage circuit 11, feedback circuit 12 and control circuit 13.
Power stage circuit 11 comprises the switching circuit that is comprised of switching tube M1 and synchronous rectifier M2 and the output low pass filter that is comprised of inductor L and capacitor CO.Power stage circuit 11 receives input voltage VIN, by conducting and the shutoff of switching circuit, through low pass filter output VD VO.Load 14 be coupled in output voltage VO and systematically between.Power stage circuit 11 can be DC/DC conversion circuit or ac/dc translation circuit, the topological structure that can adopt as step-down, boost, half-bridge etc. is fit to arbitrarily.Below describe as an example of the buck topological circuit example, but those skilled in the art will recognize that other circuit topology that is fit to arbitrarily also is applicable to the utility model.
In one embodiment, switching tube M1 is power switch pipe.Switching tube M1 can be any controlled semiconductor switch device, such as metal oxide semiconductor field effect tube (MOSFET), igbt (IGBT) etc.Switching tube M1 has first end, the second end and control end, and its first end receives input voltage VIN, and control end receives first and drives signal Q1, and conducting or shutoff under the control of the first driving signal Q1.Synchronous rectifier M2 can be any controlled semiconductor switch device, such as diode (DIODE), metal oxide semiconductor field effect tube (MOSFET), igbt (IGBT) etc.In one embodiment, synchronous rectifier M2 has first end, the second end and control end, and its first end is coupled to the second end of switching tube M1 at end points SW place, and the second end is coupled to systematically, control end receives second and drives signal Q2, and conducting or shutoff under the control of the second driving signal Q2.
The output voltage VO of feedback circuit 12 sampling switch converters 100 produces the first feedback signal VFB corresponding with the output voltage VO of switch converters 100.Those of ordinary skill in the art should be realized that, feedback circuit 12 can be for example resistor voltage divider circuit, capacitance partial pressure circuit or other sample circuit that is fit to arbitrarily.
ON time control circuit 132 provides ON time control signal TON.In one embodiment, ON time control circuit 132 is according to the size output ON time control signal TON of input voltage VIN, with the ON time of control switch pipe M1.In one embodiment, ON time control circuit 132 also can be according to input voltage VIN and output voltage VO output ON time control signal TON, the ON time of control switch pipe M1, for example, the ON time of switching tube M1 reduces along with the increase of input voltage VIN, increases along with the increase of output voltage VO.In one embodiment, the ON time ton of switching tube M1 is determined by following formula:
ton＝VO/(fs*VIN) (1)
Wherein fs has represented the stable state switching frequency of switch converters 100 under being fully loaded with.
Zero cross detection circuit 133 detects the electric current that flows through synchronous rectifier M2, for example receives the second feedback signal IFB that synchronous rectifier M2 electric current is flow through in representative.Drop to certain scope when over-current detection circuit 133 detects the electric current that flows through synchronous rectifier M2, during for example less than offset signal, export effective zero passage detection signal Vzc, and turn-off synchronous rectifier M2.The electric current that flows through synchronous rectifier M2 that offset signal is corresponding for example can equal zero, perhaps greater than, less than zero.In one embodiment, synchronous rectifier M2 self has conducting resistance RL, current signal can be converted to voltage signal, zero cross detection circuit 133 detects by the voltage measurement signal VDS that receives synchronous rectifier M2 both end voltage the electric current that flows through synchronous rectifier M2.In one embodiment, zero cross detection circuit 133 receives voltage measurement signal VDS and the offset signal Vbias of synchronous rectifier M2 both end voltage, and exports zero passage detection signal Vzc according to the comparative result of voltage measurement signal VDS and offset signal Vbias.
IL＝IL0+ton*(VIN-VO)/L (2)
Wherein IL0 has represented the bias current that flows through inductance L that offset signal is corresponding, the size of corresponding inductive current when namely zero cross detection circuit 133 is exported effective zero passage detection signal Vzc.
The inductive current IL under battery saving mode is controlled for switch converters 100, thereby does not need extra current foldback circuit, can reduce the quiescent current of circuit, thereby improves the efficient of switch converters 100 under battery saving mode.
Battery saving mode control signal FLAG for example can be by sending as unit such as the CPU (central processing unit) (CentralProcessing Unit, CPU) of load, microprogram control units (Microprogrammed Control Unit, MCU).Wait electronic equipment as example take super, be operated in the underloading mode of operation such as AOAC pattern or standby mode lower time when super, the CPU of super sends an instruction and is connected to switch converters 100 as battery saving mode control signal FLAG, and indicator cock converter 100 need to be operated in battery saving mode.
Battery saving mode control signal FLAG also can be produced by switch converters 100.In one embodiment, control circuit 13 also comprises load condition testing circuit 136, load condition testing circuit 136 is by the relevant circuit parameter of sense switch converter 100, and the operating state of judgement switch converters 100 is exported battery saving mode control signal FLAG.In one embodiment, load condition testing circuit 136 compares to produce battery saving mode control signal FLAG according to load current and the reference current signal of switch converters 100.When load current during less than reference current signal, switch converters 100 is in light condition, export effective battery saving mode control signal FLAG control switch converter 100 and switch to battery saving mode, according to the conducting of comparison signal Vc and zero passage detection signal Vzc control switch pipe M1; During greater than reference current signal, switch converters 100 is in non-light condition, exports invalid battery saving mode control signal FLAG control switch converter 100 and switches to normal mode of operation, according to the conducting of comparison signal Vc control switch pipe M1 when load current.In another embodiment, load condition testing circuit 136 compares to produce battery saving mode control signal FLAG according to switch periods and the reference cycle signal of switch converters 100.Less than the reference cycle during signal, switch converters 100 is in light condition, exports effective battery saving mode control signal FLAG, according to the conducting of comparison signal Vc and zero passage detection signal Vzc control switch pipe M1 when the switch periods of switch converters 100; Greater than the reference cycle during signal, switch converters 100 is in non-light condition, exports invalid battery saving mode control signal FLAG, according to the conducting of comparison signal Vc control switch pipe M1 when the switch periods of switch converters 100.
In one embodiment, control circuit 13 also comprises current foldback circuit 135.When switch converters 100 was in normal mode of operation, current foldback circuit 135 played the effect of overcurrent protection, for example limited inductive current IL less than maximum current reference value ILimit.In one embodiment; current foldback circuit 135 has Enable Pin; receive battery saving mode control signal FLAG; wherein when battery saving mode control signal FLAG is effective status; current foldback circuit 135 does not enable; when battery saving mode control signal FLAG is disarmed state, current foldback circuit 135 output overcurrent guard signal OC, control circuit 13 is according to the shutoff of ON time control signal TON or overcurrent protection signal OC control switch pipe M1.In one embodiment, when switch converters 100 worked in battery saving mode, current foldback circuit 135 quit work, and to reduce quiescent current, improved the efficient of switch converters 100 under battery saving mode.In one embodiment; current foldback circuit 135 receives inductor current feedback signal ILFB, maximum current reference value ILimit and the battery saving mode control signal FLAG that has represented inductive current IL; when battery saving mode control signal FLAG is in effective status; current foldback circuit 135 is not worked; when battery saving mode control signal FLAG was in disarmed state, current foldback circuit 135 was according to the comparative result output overcurrent guard signal OC of inductor current feedback signal ILFB and maximum current reference value ILimit.In one embodiment, during greater than maximum current reference value ILimit, OC is effective for the overcurrent protection signal as inductor current feedback signal ILFB, OC=" 1 " for example, and what logic control circuit 134 outputs were invalid first drives signal Q1, on-off switching tube M1.
Fig. 2 is the circuit diagram according to the switch converters 200 of the utility model one embodiment.Switch converters 200 has adopted the synchronous buck transformation topology, comprises power switch pipe M1, synchronous rectifier M2, inductor L and capacitor CO.Switch converters 200 is converted to output voltage VO by conducting and the shutoff of power switch pipe M1 and synchronous rectifier M2 with input voltage VIN.The termination of power switch pipe M1 is received input voltage VIN, and the end of the other end and synchronous rectifier M2 is electrically coupled to end points SW.The other end welding system ground of synchronous rectifier M2.The end of inductor L is electrically coupled to the common port SW of power switch pipe M1 and synchronous rectifier M2, and capacitor CO electric coupling is at the other end of inductor L with systematically.The voltage at capacitor CO two ends is output voltage VO.
In embodiment illustrated in fig. 2, load 14 be coupled to the output of switch converters and systematically between, and provide battery saving mode control signal FLAG.Load 14 is such as being the intelligent cells such as CPU, MCU, ARM.Load 14 is such as exporting effective battery saving mode control signal FLAG under the underloading patterns such as AOAC or standby, control switch converter 200 is operated in battery saving mode.
In embodiment illustrated in fig. 2, feedback circuit 12 is resistor voltage divider circuit, comprise resistor R1 and resistor R2, wherein the end of resistor R1 is coupled to the output of switch converters 200, the other end of resistor R1 is coupled to the end of resistor R2, and export the first feedback signal VFB, the other end of resistor R2 is coupled to systematically.
ON time control circuit 132 receives input voltage VIN, output voltage VO and first drives signal Q1, and output ON time control signal TON.In embodiment as shown in Figure 2, ON time control circuit 132 comprises current source IS1, capacitor C1, control switch pipe S1 and comparator 21.The termination of current source IS1 is received input voltage VIN, and the other end of current source IS1 is coupled to the end output charging current of capacitor C1, and the other end of capacitor C1 is coupled to systematically.Current source IS1 exports charging current under the control of input voltage VIN, capacitor C1 is charged.In one embodiment, the size of the charging current of current source IS1 output is relevant with input voltage VIN, for example increases along with the increase of input voltage VIN.The first end of control switch pipe S1 is coupled to the common port of capacitor C1 and current source IS1, and the second end of control switch pipe S1 is coupled to the other end of capacitor C1, and the control end of control switch pipe S1 receives first and drives signal Q1.In one embodiment, to drive signal Q1 effective when first, and when for example be high level, control switch pipe S1 turn-offs, and capacitor C1 charges by current source IS1, and the voltage at capacitor C1 two ends increases gradually; To drive signal Q1 invalid when first, when for example be low level, and control switch pipe S1 conducting, capacitor C1 discharges by control switch pipe S1, and the voltage at capacitor C1 two ends reduces.The voltage Vs at the in-phase input end receiving condenser C1 two ends of comparator 21, the inverting input of comparator 21 receives output voltage VO, and according to the voltage at capacitor C1 two ends and the comparative result output ON time control signal TON of output voltage VO.In one embodiment, output voltage VO also can be replaced by a fixed reference, for example 0.4V.
Zero cross detection circuit 133 comprises zero passage detection comparator ZCD.The in-phase input end of zero passage detection comparator ZCD receives offset signal Vbias, and inverting input receives the voltage measurement signal VDS of synchronous rectifier M2 drain-source both end voltage.In one embodiment, during less than offset signal Vbias, export effective zero passage detection signal Vzc as voltage measurement signal VDS, and control synchronous rectifier M2 by logical circuit 134 and turn-off.
In one embodiment, zero cross detection circuit 133 also comprises the second trigger 22, have set end S, reset terminal R and output Q, wherein set end S is coupled to the output of zero passage detection comparator ZCD, reset terminal R receives first and drives signal Q1, output Q is according to the voltage measurement signal VDS of voltage between synchronous rectifier M2 drain-source the two poles of the earth and the comparative result of offset signal Vbias, and first drives signal Q1 output zero passage detection signal Vzc.As voltage measurement signal VDS during less than offset signal Vbias, set zero passage detection signal Vzc, Vzc=" 1 " drives signal Q1 when effective, the zero passage detection that resets signal Vzc, Vzc=" 0 " when first.The second trigger 22 has increased the reliability of the zero passage detection signal Vzc of output, can avoid causing because of the factors such as vibration of inductive current the variation repeatedly of zero passage detection signal Vzc, thereby increase reliability and the accuracy of zero cross detection circuit 133.Those skilled in the art will realize that zero cross detection circuit 133 also can be by increasing the reliability of zero passage detection such as other means such as stagnant loop circuits.In one embodiment, as voltage measurement signal VDS during less than the first offset signal Vbias1, Vzc is effective for the zero passage detection signal, as voltage measurement signal VDS during greater than the second offset signal Vbias2, Vzc is invalid for the zero passage detection signal, and wherein the first offset signal Vbias1 is less than the second offset signal Vbias2.
In one embodiment, when battery saving mode control signal FLAG is in effective status, logic control circuit 134 drives signal Q1 according to comparison signal Vc and zero passage detection signal Vzc set first, the conducting of power ratio control switching tube M1, and the shutoff of controlling synchronous rectifier M2.As the first feedback signal VFB less than voltage reference signal VREF, namely comparison signal Vc is effective, and voltage detection signal VDS is during less than offset signal Vbias, when namely zero passage detection signal Vzc is effective, the first driving signal Q1 is effective, the M1 conducting of power ratio control switching tube and the shutoff of controlling synchronous rectifier M2.In one embodiment, when battery saving mode control signal FLAG was in disarmed state, logic control circuit 134 drove signal Q1 according to comparison signal Vc set first, the conducting of power ratio control switching tube M1, and the shutoff of controlling synchronous rectifier M2.As the first feedback signal VFB during less than voltage reference signal VREF, when namely comparison signal Vc was effective, first to drive signal Q1 effective, the M1 conducting of power ratio control switching tube and the shutoff of controlling synchronous rectifier M2.
In embodiment as shown in Figure 2, logic control circuit 134 comprises the first logical circuit 23, the first trigger 24 and the second logical circuit 25.The first logical circuit 23 receives comparison signal Vc, zero passage detection signal Vzc and battery saving mode control signal FLAG, when battery saving mode control signal FLAG is in effective status, the first logical circuit 23 is according to comparison signal Vc and zero passage detection signal Vzc output asserts signal SET, when battery saving mode control signal FLAG was in disarmed state, the first logical circuit 23 was according to comparison signal Vc output asserts signal SET.In one embodiment, the first logical circuit 23 comprises and door AND and MUX MUX.Have first input end, the second input and output with door AND, wherein first input end receives comparison signal Vc, and the second input receives zero passage detection signal Vzc.MUX MUX has first input end, the second input, control end and output, wherein first input end receives comparison signal Vc, the second input is coupled to the output with door AND, control end receives battery saving mode control signal FLAG, and output is selected comparison signal Vc according to battery saving mode control signal FLAG or exported as asserts signal SET with the signal of door AND output.In one embodiment, when battery saving mode control signal FALG is in effective status, FALG=" 1 ", MUX MUX selects to export as asserts signal SET with the output signal of door AND, for example as comparison signal Vc and zero passage detection signal Vzc all effectively the time, for example Vc=" 1 " and ZC=" 1 ", asserts signal SET is effective, for example SET=" 1 ".When battery saving mode control signal FLAG was in disarmed state, FLAG=" 0 ", MUX MUX selected comparison signal Vc to export as asserts signal SET in one embodiment.
The first trigger 24 has set end S, reset terminal R, output Q and output
Wherein set end S is coupled to the output reception asserts signal SET of the first logical circuit 23, and reset terminal R is coupled to ON time control circuit 132 and receives ON time control signal TON, and output Q output first drives signal Q1 to power switch pipe M1, output
Drive signal Q2 to synchronous rectifier M2 by the second logical circuit 25 outputs second.In one embodiment, output
It is opposite on phase place that first of the signal of output and output Q output drives signal Q1, in other words misphase 180 degree.In the embodiment shown in Figure 2, the first trigger 24 also has clear terminal CLR, receives overcurrent protection signal OC.When overcurrent guard signal OC is effective, OC=" 1 " for example, what the first trigger 24 outputs were invalid first drives signal Q1, switch-off power switching tube M1.The second logical circuit 25 is according to the first trigger 24 outputs
Signal and zero passage detection signal Vzc output second drive signal Q2.When zero passage detection signal Vzc was effective, the second driving signal Q2 was invalid, turn-offs synchronous rectifier M2.In the embodiment shown in Figure 2, the second logical circuit 25 comprises AND circuit, has first input end, the second input and output, and wherein first input end is coupled to the output of the first trigger 24
The second input receives through anti-phase zero passage detection signal Vzc, and output output second drives signal Q2 to synchronous rectifier M2, controls conducting or the shutoff of synchronous rectifier M2.
Oscillogram when Fig. 3 is the normal operation under battery saving mode of switch converters 200 corresponding shown in Figure 2 according to the utility model one embodiment.Waveform in embodiment illustrated in fig. 3 is followed successively by from top to bottom: output voltage VO, inductive current IL, zero passage detection signal Vzc, first drive signal Q1 and second and drive signal Q2.In embodiment illustrated in fig. 3, switch converters is operated in battery saving mode.
T0 constantly, due to the impact of output voltage VO, the first feedback signal VFB is less than reference voltage VREF, first drives signal Q1 becomes effectively, Q1=" 1 ", thereby power switch pipe M1 conducting and keep ON time ton.During power switch pipe M1 conducting, inductive current IL increases gradually, until T1 constantly first drive signal Q1 become under the control of ON time control signal TON invalid, Q1=" 0 ", power switch pipe M1 turn-offs, second drives signal Q2 becomes effectively, Q2=" 1 ", synchronous rectifier M2 conducting, inductive current IL reduces gradually.In one embodiment, the second driving signal Q2 and first drives between signal Q1 certain Dead Time, namely second drive signal Q2 and drive signal Q1 first and become and postpone the regular hour after invalid and become effectively, Dead Time can be for example 200ns, damages switch converters 200 to prevent that power switch pipe M1 and synchronous rectifier M2 are common.
In the T2 moment, inductive current IL is reduced to bias current IL0, and zero passage detection signal Vzc is set, and becomes high level.In one embodiment, bias current IL0 equals zero.In other embodiments, bias current IL0 also can be greater than zero or less than zero.In the T3 moment, zero passage detection signal Vzc keeps high level, and the decline of output voltage VO simultaneously makes the first feedback signal VFB less than reference voltage VREF, thereby the first driving signal Q1 becomes effectively, Q1=" 1 ", power switch pipe M1 conducting.
In the embodiment shown in fig. 3, under battery saving mode, the maximum ILmax of the inductive current of switch converters 200 remains on:
ILmax＝IL0+ΔI＝IL0+ton*(VIN-VO)/L (3)
ON time ton is by formula 1 decision, in the situation that input voltage VIN and output voltage VO are fixing, the ON time ton of each switch periods remains unchanged substantially.Can find out, due to ON time ton and bias current IL0 all controlled, the maximum ILmax of inductive current is also controlled under battery saving mode.
Oscillogram when Fig. 4 is output short-circuit under battery saving mode of switch converters 200 corresponding shown in Figure 2 according to the utility model one embodiment.Waveform in embodiment illustrated in fig. 4 is followed successively by from top to bottom: output voltage VO, inductive current IL, zero passage detection signal Vzc, first drive signal Q1 and second and drive signal Q2.In embodiment illustrated in fig. 4, switch converters is operated in battery saving mode.
In the T4 moment, inductive current IL is reduced to bias current IL0, the zero cross detection circuit 133 effective zero passage detection signal Vzc of output, Vzc=" 1 ".At T5 constantly, impact due to factors such as short circuit or overcurrents, output voltage VO descends rapidly, makes the first feedback signal VFB less than reference voltage VREF, and this moment, zero passage detection signal Vzc was still high level, thereby first drive signal Q1 and become effectively, Q1=" 1 ", power switch pipe M1 conducting, zero passage detection signal Vzc is reset to low level, inductive current IL increases rapidly, and the value Δ IL that inductive current increases is:
ΔIL＝ton*(VIN-VO)/L (4)
ON time ton is by formula 1 decision, in the situation that input voltage VIN and output voltage VO are fixing, the ON time ton of each switch periods remains unchanged substantially.Thereby limited in conjunction with the value Δ IL that the visible inductive current of formula 4 increases, without the need for extra current foldback circuit also effectively protection switch converter 200 can not damage because of overcurrent.
Some above-mentioned specific embodiments only describe the utility model in an exemplary fashion, and these embodiment are not fully detailed, and are not used in the scope of the present utility model that limits.It is all possible changing and revise for disclosed embodiment, the selectivity embodiment that other are feasible and can being understood by those skilled in the art the equivalent variations of element in embodiment.Other variations of embodiment disclosed in the utility model and modification do not exceed spirit of the present utility model and protection range.
Claims (9)
1. control circuit, be used for switch converters, it is characterized in that, wherein switch converters comprises power switch pipe and synchronous rectifier, the conducting of control circuit power ratio control switching tube and synchronous rectifier and shutoff, switch converters is used for converting input voltage to output voltage, and described control circuit comprises:
First input end receives the first feedback signal that represents output voltage;
The second input receives the second feedback signal that the synchronous rectification tube current is flow through in representative; And
The first output, output first drives conducting or the shutoff of signal controlling power switch pipe; Wherein
When the battery saving mode control signal is in effective status, according to the conducting of comparative result and the second feedback signal power ratio control switching tube of the first feedback signal and reference voltage.
2. control circuit as claimed in claim 1, is characterized in that, also comprises:
Comparison circuit has first input end, the second input and output, and wherein first input end receives the first feedback signal, and the second input receives reference voltage, and output is according to the comparative result output comparison signal of the first feedback signal and reference voltage;
The ON time control circuit provides the ON time control signal, and described control circuit is according to the shutoff of ON time control signal power ratio control switching tube;
Zero cross detection circuit, have first input end, the second input and output, wherein first input end receives the second feedback signal, and the second input receives offset signal, and output is according to the comparative result output zero passage detection signal of the second feedback signal and offset signal; And
Logic control circuit receives described comparison signal, zero passage detection signal and ON time control signal, and exports conducting and the shutoff of the first driving signal controlling power switch pipe; Wherein
When the battery saving mode control signal is effective status, described control circuit is according to the conducting of comparison signal and zero passage detection signal controlling power switch pipe, when the battery saving mode control signal is disarmed state, the diverter switch converter works in normal mode of operation, and described control circuit is according to the conducting of comparison signal power ratio control switching tube.
3. control circuit as claimed in claim 2, is characterized in that, wherein logic control circuit comprises:
The first logical circuit, have first input end, the second input, the 3rd input and output, wherein first input end receives comparison signal, the second input receives the zero passage detection signal, the 3rd input receives the battery saving mode control signal, and wherein when the battery saving mode control signal was in effective status, output was according to comparison signal and zero passage detection signal output asserts signal, when the battery saving mode control signal was in disarmed state, output was exported asserts signal according to comparison signal; And
The first trigger has set end, reset terminal and output, and wherein set termination places a signal, and reset terminal receives the ON time control signal, and output output first drives signal.
4. control circuit as claimed in claim 2, it is characterized in that, wherein zero cross detection circuit comprises: zero-crossing comparator, zero-crossing comparator comprises in-phase input end, inverting input and output, wherein in-phase input end receives the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth, inverting input receives offset signal, and output is according to the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth and the comparative result output zero passage detection signal of offset signal.
5. control circuit as claimed in claim 2, is characterized in that, wherein zero cross detection circuit comprises:
Zero-crossing comparator, zero-crossing comparator comprise in-phase input end, inverting input and output, and wherein in-phase input end receives the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth, and inverting input receives offset signal; And
The second trigger comprises set end, reset terminal and output, and wherein the set end is coupled to the output of zero-crossing comparator, and reset terminal receives first and drives signal, output output zero passage detection signal; Wherein
The second trigger is according to the voltage measurement signal of voltage between synchronous rectifier drain-source the two poles of the earth and the comparative result of offset signal, and first drives signal output zero passage detection signal.
6. control circuit as claimed in claim 1; it is characterized in that; also comprise current foldback circuit; the overcurrent protection signal is provided; wherein current foldback circuit has Enable Pin; receive the battery saving mode control signal, wherein when the battery saving mode control signal was disarmed state, described control circuit was according to the shutoff of ON time control signal or overcurrent protection signal controlling power switch pipe.
7. control circuit as claimed in claim 6, is characterized in that, wherein when the battery saving mode control signal was effective status, current foldback circuit quit work.
8. a switch converters, is characterized in that, comprises power switch pipe, synchronous rectifier and control circuit as described in any one in claim 1 to 7.
9. switch converters as claimed in claim 8, is characterized in that, wherein:
Control circuit also comprises the second output, and output second drives conducting and the shutoff of signal controlling synchronous rectification;
Power switch pipe has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the first output of control circuit;
Synchronous rectifier has first end, the second end and control end, and wherein first end is coupled to the second end of power switch pipe, and the second end of synchronous rectifier is coupled to systematically, and the control end of synchronous rectifier is coupled to the second output of control circuit;
This switch converters also comprises:
Inductor has first end and the second end, and wherein first end is coupled to the second end of power switch pipe and the first end of synchronous rectifier; And
Output capacitor, be electrically coupled with the second end of inductor and systematically between.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012206761888U CN202997909U (en) | 2012-12-10 | 2012-12-10 | Control circuit and switch converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012206761888U CN202997909U (en) | 2012-12-10 | 2012-12-10 | Control circuit and switch converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202997909U true CN202997909U (en) | 2013-06-12 |
Family
ID=48569035
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012206761888U Expired - Fee Related CN202997909U (en) | 2012-12-10 | 2012-12-10 | Control circuit and switch converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202997909U (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957303A (en) * | 2012-12-10 | 2013-03-06 | 成都芯源系统有限公司 | Control circuit, switch converter and control method thereof |
| CN104242644A (en) * | 2014-10-11 | 2014-12-24 | 成都芯源系统有限公司 | Control circuit and control method for switching converter |
| CN107093951A (en) * | 2016-02-17 | 2017-08-25 | 富士电机株式会社 | Switching power unit |
| CN109450278A (en) * | 2018-11-23 | 2019-03-08 | 杭州士兰微电子股份有限公司 | Synchronous rectification switch converter and its control method |
| CN111435819A (en) * | 2019-12-05 | 2020-07-21 | 珠海市杰理科技股份有限公司 | Step-down hysteresis type switch converter and control method thereof |
| WO2020243902A1 (en) * | 2019-06-04 | 2020-12-10 | Texas Instruments Incorporated | Adaptive minimum on time control for switching regulator |
| CN113890393A (en) * | 2021-09-27 | 2022-01-04 | 成都芯源系统有限公司 | Switching power supply circuit and its control circuit and method |
-
2012
- 2012-12-10 CN CN2012206761888U patent/CN202997909U/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102957303A (en) * | 2012-12-10 | 2013-03-06 | 成都芯源系统有限公司 | Control circuit, switch converter and control method thereof |
| CN104242644A (en) * | 2014-10-11 | 2014-12-24 | 成都芯源系统有限公司 | Control circuit and control method for switching converter |
| CN104242644B (en) * | 2014-10-11 | 2017-04-12 | 成都芯源系统有限公司 | Control circuit and control method for switching converter |
| CN107093951A (en) * | 2016-02-17 | 2017-08-25 | 富士电机株式会社 | Switching power unit |
| CN107093951B (en) * | 2016-02-17 | 2020-06-16 | 富士电机株式会社 | Switching power supply device |
| CN109450278A (en) * | 2018-11-23 | 2019-03-08 | 杭州士兰微电子股份有限公司 | Synchronous rectification switch converter and its control method |
| WO2020243902A1 (en) * | 2019-06-04 | 2020-12-10 | Texas Instruments Incorporated | Adaptive minimum on time control for switching regulator |
| US11018584B2 (en) | 2019-06-04 | 2021-05-25 | Texas Instruments Incorporated | Adaptive minimum on time control for a switching regulator |
| US11671012B2 (en) | 2019-06-04 | 2023-06-06 | Texas Instruments Incorporated | Adaptive minimum on time control for a switching regulator |
| CN111435819A (en) * | 2019-12-05 | 2020-07-21 | 珠海市杰理科技股份有限公司 | Step-down hysteresis type switch converter and control method thereof |
| CN113890393A (en) * | 2021-09-27 | 2022-01-04 | 成都芯源系统有限公司 | Switching power supply circuit and its control circuit and method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102957303B (en) | Control circuit, switch converter and control method thereof | |
| CN202997909U (en) | Control circuit and switch converter | |
| CN103401429B (en) | A kind of Switching Power Supply and control circuit thereof and control method | |
| CN101577488B (en) | Efficient multi-mode DC-DC converter in wide voltage conversion range | |
| Wei et al. | A novel bridgeless buck-boost PFC converter | |
| US9559586B2 (en) | Switch mode power supply, control circuit and associated control method | |
| CN102810984B (en) | Switching power circuit | |
| CN106787776B (en) | A kind of LLC resonant converter of mixing control | |
| CN202435294U (en) | Pulse width modulation switch power supply controller and switch power supply | |
| CN104682745A (en) | Isolated voltage conversion circuit, control circuit and control method thereof | |
| CN103368394B (en) | A kind of efficient voltage reducing type DC-DC converter | |
| CN102801288A (en) | Control circuit, switch mode converter and control method | |
| CN202424552U (en) | Voltage reduction type voltage-stabilizing and rectifying circuit | |
| CN107147292A (en) | A buck converter with controlled on-time | |
| CN108631590A (en) | Voltage converter, controller and control method thereof | |
| CN111435819A (en) | Step-down hysteresis type switch converter and control method thereof | |
| CN111837326B (en) | Power management circuit, chip and equipment | |
| CN203352444U (en) | High-efficiency step-down DC-DC converter | |
| CN202840923U (en) | Control circuit and switch mode converter | |
| CN201352323Y (en) | High-efficient synchronous rectification depressurization-type voltage stabilizer | |
| CN106160458B (en) | Improve the BOOST circuit of transient response | |
| CN112653324B (en) | Boost converter system without direct power supply | |
| CN202565159U (en) | PFC control circuit capable of boosting flexibly | |
| CN202750021U (en) | Converter for converting alternating current into direct current | |
| CN202713140U (en) | Switch converter controlled by constant conduction time and control circuit thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130612 Termination date: 20161210 |