CN202495877U - Switch converter and control circuit thereof - Google Patents
Switch converter and control circuit thereof Download PDFInfo
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- CN202495877U CN202495877U CN2011205576387U CN201120557638U CN202495877U CN 202495877 U CN202495877 U CN 202495877U CN 2011205576387 U CN2011205576387 U CN 2011205576387U CN 201120557638 U CN201120557638 U CN 201120557638U CN 202495877 U CN202495877 U CN 202495877U
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
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- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The utility model discloses a switch converter and control circuit thereof, this switch converter is including the switch circuit who has at least one switch tube. The control circuit includes an error amplification circuit, a logic circuit, a ramp signal generation circuit, and a pulse skipping circuit. The error amplifying circuit compares a feedback signal representing the output voltage of the switching circuit with a reference signal to generate an error amplifying signal. The logic circuit generates a control signal according to the error amplification signal to control the on and off of at least one switching tube in the switching circuit, wherein the control signal comprises periodic switching pulses. The ramp signal generating circuit provides a ramp signal. The pulse skipping circuit generates a pulse skipping signal according to the error amplification signal, the ramp signal and the threshold value, and supplies it to the logic circuit. Wherein the logic circuit causes the control signal to skip one or more switching pulses in accordance with the pulse skipping signal.
Description
Technical field
The embodiment of the utility model relates to electronic circuit, relates in particular to a kind of switch converters and control circuit thereof.
Background technology
Along with becoming more and more important of energy efficiency and environmental protection, people treat that to Switching Power Supply the expectation of engine efficiency is increasingly high, and the power supply product that customer requirement power supply manufacturer provides can satisfy green energy resource standards such as BLUE ANGEL, ENERGY STAR, ENERGY 2000.In order to meet these standards, pulse-skip pattern (pulse skipping mode) is arisen at the historic moment.Under the pulse-skip pattern, control circuit masks some switching pulses, when keeping the output voltage adjusting, to reduce switching loss.
Normally, the feedback signal of representation switch electric power output voltage is used as with reference signal compares, to produce error amplification signal.Control circuit stagnates chain rate with this error amplification signal and a constant threshold.When error amplification signal during less than this constant threshold, control circuit makes the control signal of switching tube skip one or more switching pulses and turn-offs with the maintained switch pipe, till error amplification signal is greater than constant threshold.Under the ideal situation, in the pulse-skip pattern, control circuit only produces a switching pulse at every turn, and the time interval between two adjacent switch pulses is by the weight decision of load.Load is light more, and the time interval between two switching pulses is of a specified duration more.
Yet; Because the output filter of Switching Power Supply and the influence of error amplifier; Switching Power Supply often needs two even more switches pulse that error amplification signal is reduced to less than constant threshold; This has influenced the efficient and the stability of Switching Power Supply undoubtedly, and makes that the ripple of switch power source output voltage is bigger.
The utility model content
The technical problem that the utility model will solve provide a kind of under the pulse-skip pattern switch converters and the control circuit thereof of high efficiency and good stability.
A kind of control circuit that is used for switch converters according to the utility model embodiment; This switch converters comprises the switching circuit with at least one switching tube, it is characterized in that, this control circuit comprises: error amplifying circuit; Have first input end, second input and output; Wherein first input end receives reference signal, and second input receives the feedback signal of representation switch circuit output voltage, and output provides error amplification signal; Logical circuit; Have first input end, second input and output; Wherein first input end is electrically coupled to error amplifying circuit to receive error amplification signal; Output provides conducting and the shutoff of control signal with at least one switching tube in the control switch circuit, and wherein control signal comprises periodic switching pulse; Ramp signal produces circuit, produces ramp signal; And the pulse-skip circuit, be electrically coupled to error amplifying circuit and ramp signal and produce circuit, produce the pulse-skip signal according to error amplification signal, ramp signal and threshold value, and second input to logical circuit is provided the pulse-skip signal; Wherein said logical circuit makes control signal skip one or more switching pulses according to the pulse-skip signal.
In one embodiment, said ramp signal produces circuit and comprises resistance-capacitance network, and the input of this resistance-capacitance network is electrically coupled to the output of logical circuit to receive control signal, and output is electrically coupled to the pulse-skip circuit so that ramp signal to be provided.
In one embodiment, said resistance-capacitance network comprises: first capacitor has first end and second end, wherein the second end ground connection; Resistor has first end and second end, wherein first end be electrically coupled to logical circuit output to receive control signal; And second capacitor, have first end and second end, wherein first end is electrically coupled to second end of resistor, and the first end electric coupling of second end and first capacitor is together to provide ramp signal.
In one embodiment; Said pulse-skip circuit comprises: comparator; Have first input end, second input and output, wherein first input end receive threshold and ramp signal sum, second input is electrically coupled to the output of error amplifying circuit to receive error amplification signal.
In one embodiment; Said pulse-skip circuit also comprises: with door; Have first input end, second input and output; Wherein first input end is electrically coupled to the output of comparator, and second input receives maximum duty cycle signal, and output is electrically coupled to second input of logical circuit so that the pulse-skip signal to be provided.
A kind of switch converters according to the utility model embodiment is characterized in that, comprises foregoing control circuit.
A kind of control circuit that is used for switch converters according to the utility model embodiment; This switch converters comprises the switching circuit with at least one switching tube, it is characterized in that, this control circuit comprises: error amplifier; Have first input end, second input and output; Wherein first input end receives reference signal, and second input receives the feedback signal of representation switch circuit output voltage, and output provides error amplification signal; Oscillating circuit has first output and second output, and wherein first output provides periodic clock signal, and second output provides periodic slope compensation signal; Ramp signal produces circuit, produces ramp signal; First comparator has first input end, second input and output, wherein first input end receive threshold and ramp signal sum, and second input is electrically coupled to the output of error amplifier to receive error amplification signal; Not gate, its input are electrically coupled to first output of oscillating circuit with the receive clock signal; With door, have first input end, second input and output, wherein first input end is electrically coupled to the output of first comparator, and second input is electrically coupled to the output of not gate; Second comparator; Have first input end, second input and output; Wherein first input end receives slope compensation signal and represents the current sampling signal sum that flows through the switching tube electric current, and second input is electrically coupled to the output of error amplifier to receive error amplification signal; Or door, have first input end, second input and output, wherein first input end is electrically coupled to the output of second comparator, and second input is electrically coupled to the output with door; And trigger; Have first input end, second input and output; Wherein first input end is electrically coupled to oscillating circuit with the receive clock signal; Second input be electrically coupled to or the door output, output provides conducting and the shutoff of control signal with at least one switching tube in the control switch circuit.
In one embodiment; Said ramp signal produces circuit and comprises resistance-capacitance network; The input of this resistance-capacitance network is electrically coupled to the output of trigger to receive control signal, and output is electrically coupled to the first input end of first comparator so that ramp signal to be provided.
In one embodiment, said resistance-capacitance network comprises: first capacitor, and electric coupling is between the first input end and ground of first comparator; Resistor has first end and second end, wherein first end be electrically coupled to trigger output to receive control signal; And second capacitor, have first end and second end, wherein first end is electrically coupled to second end of resistor, and second end is electrically coupled to the first input end of first comparator.
Through stack one ramp signal on threshold value, can make switch converters under the pulse-skip pattern, only produce a switching pulse at every turn, improved the operating efficiency and the stability of switch converters, reduced the ripple of switch converters output voltage.
Description of drawings
Fig. 1 is the block diagram according to the switch converters 100 of the utility model one embodiment;
Fig. 2 is the circuit diagram according to the control circuit 202 of the utility model one embodiment;
Fig. 3 is the circuit diagram according to the switch converters 300 of the utility model one embodiment;
Fig. 4 and Fig. 5 are the oscillogram according to the switch converters shown in Figure 3 300 of the utility model one embodiment.
Embodiment
To describe the specific embodiment of the utility model below in detail, should be noted that the embodiments described herein only is used to illustrate, be not limited to the utility model.In the following description, for the thorough to the utility model is provided, a large amount of specific detail have been set forth.Yet it is obvious that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other instances,, do not specifically describe known circuit, material or method for fear of obscuring the utility model.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: the special characteristic, structure or the characteristic that combine this embodiment or example to describe are comprised among at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can be with any suitable combination and or sub the combination specific characteristic, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this diagrammatic sketch that provides all be for illustrative purposes, and diagrammatic sketch is not necessarily to draw in proportion.Should be appreciated that when claiming that " element " " is connected to " or " coupling " during to another element it can be directly to connect or be couple to another element or can have intermediary element.On the contrary, when claiming that element " is directly connected to " or during " directly being couple to " another element, not having intermediary element.Identical Reference numeral indication components identical.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 1 is the block diagram according to the switch converters 100 of the utility model one embodiment.Switch converters 100 comprises switching circuit 101, control circuit 102 and feedback circuit 103.Switching circuit 101 comprises at least one switching tube, and the conducting through this at least one switching tube converts input voltage VIN into output voltage VO UT with turn-offing.Switching circuit 101 can adopt any DC-DC or ac/dc transformation topology structure, for example booster converter, buck converter, forward converter, anti exciting converter or the like.Feedback circuit 103 is electrically coupled to the output of switching circuit 101, produces the feedback signal FB of representation switch circuit output voltage VOUT.Control circuit 102 is electrically coupled to switching circuit 101 and feedback circuit 103, produces conducting and the shutoff of control signal CTRL with switching tube in the control switch circuit 101 according to feedback signal FB.
Ramp signal RAMP can be sawtooth signal or triangular signal.In one embodiment, ramp signal RAMP is a triangular signal, and this triangular signal reduces according to linear increase of the polarity of control signal or linearity.In one embodiment, this triangular signal is linear the increase when control signal CTRL is high level, and linearity reduces when control signal CTRL is low level.In one embodiment; Ramp signal produces circuit 106 and comprises resistance-capacitance network; The input of this resistance-capacitance network is electrically coupled to the output of logical circuit 105 to receive control signal CTRL, and output is electrically coupled to pulse-skip circuit 107 so that ramp signal RAMP to be provided.
In one embodiment, pulse-skip circuit 107 compares threshold value VTH and ramp signal RAMP sum with error amplification signal EAO, and produces pulse-skip signal SLEEP according to comparative result.In another embodiment, pulse-skip circuit 107 compares threshold value VTH with the difference of error amplification signal EAO and ramp signal RAMP, and produces pulse-skip signal SLEEP according to comparative result.
Fig. 2 is the circuit diagram according to the control circuit 202 of the utility model one embodiment.Control circuit 202 comprises that error amplifying circuit 204, logical circuit 205, ramp signal produce circuit 206 and pulse-skip circuit 207.Error amplifying circuit 204 comprises error amplifier EA.The in-phase input end of error amplifier EA receives reference signal REF, inverting input receiving feedback signals FB, and output provides error amplification signal EAO.Error amplifier EA can be operational amplifier, also can be trsanscondutance amplifier.
Pulse-skip circuit 207 comprises comparator C OM1.Comparator C OM1 is a hysteresis comparator; Its in-phase input end receive threshold VTH and ramp signal RAMP sum; Inverting input is electrically coupled to the output of error amplifier EA to receive error amplification signal EAO, and pulse-skip circuit 207 produces pulse-skip signal SLEEP according to the comparative result of comparator C OM1.In one embodiment; Pulse-skip circuit 207 comprises two comparators and two threshold values; Each comparator all compares corresponding threshold value and ramp signal RAMP sum with error amplification signal EAO, pulse-skip circuit 207 produces pulse-skip signal SLEEP according to the comparative result of these two comparators.
In one embodiment, pulse-skip circuit 207 also comprises and door AND1.Have first input end, second input and output with door AND1, wherein first input end is electrically coupled to the output of comparator C OM1, and second input receives maximum duty cycle signal DMAX, and output provides pulse-skip signal SLEEP.Maximum duty cycle signal DMAX represents the specified maximum duty cycle of control signal CTRL, and for example 90%.
In one embodiment, the duty ratio of clock signal clk is set to equal the specified maximum duty cycle of control signal CTRL.Pulse-skip circuit 207 also comprises not gate NOT1.The input of not gate NOT1 is electrically coupled to oscillating circuit 208 with receive clock signal CLK, output be electrically coupled to the door AND1 second input so that maximum duty cycle signal DMAX to be provided.
In one embodiment, at the trailing edge of pulse-skip signal SLEEP, when promptly error amplification signal EAO increased to greater than threshold value VTH and ramp signal RAMP sum, oscillating circuit 208 was reseted, and exports a clock pulse, with trigger FF1 set.In one embodiment, when pulse-skip signal SLEEP was low level, oscillating circuit 208 continued output and has the clock pulse of switch periods T.When pulse-skip signal SLEEP was high level, oscillating circuit 208 cut out, and clock signal clk keeps low level.
Fig. 3 is the circuit diagram according to the switch converters of the utility model one embodiment.Wherein switching circuit 301 adopts the topological structure of buck converter, comprises switching tube S1, diode D1, inductor L and output capacitor COUT.Switching circuit 301 converts input voltage VIN into output voltage VO UT through conducting and the shutoff of switching tube S1.Switching tube S1 has first end, second end and gate pole, and wherein first termination is received input voltage VIN, and second end is electrically coupled to the negative electrode of diode D1.The plus earth of diode D1.Inductor L has first end and second end, and wherein first end is electrically coupled to second end of switching tube S1 and the negative electrode of diode D1.Output capacitor COUT electric coupling is between second end and ground of inductor L.The voltage at output capacitor COUT two ends is output voltage VO UT.Switching tube S1 can be any controllable semiconductor switch device, for example mos field effect transistor (MOSFET), igbt (IGBT) etc.In one embodiment, diode D1 is replaced by the synchro switch pipe.
Control circuit comprises that error amplifying circuit 304, logical circuit 305, ramp signal produce circuit 306 and pulse-skip circuit 307, and the structure of its structure and control circuit shown in Figure 2 202 is basic identical.Wherein ramp signal generation circuit 306 comprises the resistance-capacitance network that is electrically coupled to logical circuit 305 outputs.This resistance-capacitance network comprises resistor R 2 and capacitor C1, C2.Capacitor C1 electric coupling is between the in-phase input end and ground of comparator C OM1.Resistor R 2 has first end and second end, wherein first end be electrically coupled to logical circuit 305 output to receive control signal CTRL.Capacitor C2 has first end and second end, and wherein first end is electrically coupled to second end of resistor R 2, and second end is electrically coupled to the in-phase input end of comparator C OM1.Capacitor C2 provide dc-isolation, makes ramp signal RAMP can not exert an influence to the preset DC level of threshold value VTH.Ramp signal RAMP and the electric current I L homophase that flows through inductor L.Through the appearance value ratio of regulating capacitor C1 and C2, the amplitude of scalable ramp signal RAMP.In one embodiment, the in-phase input end of comparator C OM1 is through resistor R 1 receive threshold VTH.
Fig. 4 is switch converters shown in Figure 3 300 oscillogram in normal operation according to the utility model one embodiment.This moment, load current was bigger, and output voltage VO UT is less, and error amplification signal EAO perseverance is greater than threshold value VTH and ramp signal RAMP sum.Pulse-skip signal SLEEP is a low level, to oscillating circuit 308 with or the output of door OR1 do not exert an influence.
At the rising edge of clock signal clk, trigger FF1 is set, and making control signal CTRL is high level.Switching tube S1 is switched on, and the electric current that flows through switching tube S1 increases gradually, and current sampling signal ISENSE also increases gradually.When current sampling signal ISENSE and slope compensation signal SC sum during greater than error amplification signal EAO, trigger FF1 is reset, and making control signal CTRL is low level, and switching tube S1 is turned off.Above step constantly repeats, and control signal CTRL is made up of the switching pulse that is T no one number time.
Fig. 5 is the oscillogram of switch converters shown in Figure 3 300 under the pulse-skip pattern according to the utility model one embodiment.This moment, switch converters was in light condition, and load current is less, and output voltage VO UT is bigger.As error amplification signal EAO during less than threshold value VTH and ramp signal RAMP sum, the output signal COMO of comparator C OM1 is a high level.This high level signal clock signal clk be transferred into during for low level oscillating circuit 308 and or door OR1, oscillating circuit 308 cuts out, and makes the control signal CTRL of trigger FF1 output keep low level.Switching tube S1 is turned off, till error amplification signal EAO is greater than threshold value VTH and ramp signal RAMP sum.
As error amplification signal EAO during greater than threshold value VTH and ramp signal RAMP sum, the output signal COMO of comparator C OM1 becomes low level by high level, and oscillating circuit 308 is reseted.Trigger FF1 is set, and making control signal CTRL is high level.Switching tube S1 is switched on, and the electric current that flows through switching tube S1 increases gradually, and current sampling signal ISENSE also increases gradually.
Ramp signal RAMP and inductive current IL homophase, the linear rising when control signal CTRL is high level, and linear decline when control signal CTRL is low level.Can be known that by Fig. 5 error amplification signal EAO is very short greater than the time of threshold value VTH and ramp signal RAMP sum, the output signal COMO of comparator C OM1 is transformed to high level soon after low level.Because this moment, clock signal clk still be a high level, pulse-skip signal SLEEP keeps low level, to oscillating circuit 308 and or the output of an OR1 do not exert an influence.
When current sampling signal ISENSE and slope compensation signal SC sum during greater than error amplification signal EAO, or door OR1 output high level, trigger FF1 is reset, and making control signal CLK is low level, and switching tube S1 is turned off.The high level of COMO signal when clock signal clk becomes low level, be transferred into oscillating circuit 308 with or door OR1, oscillating circuit 308 cuts out, and makes the control signal CTRL of trigger FF1 output keep low level.Switching tube S1 keeps turn-offing, and increases to once more greater than threshold value VTH and ramp signal RAMP sum until error amplification signal EAO.Above step constantly repeats, and one or more switching pulses of control signal CTRL are skipped.
Because error amplification signal EAO is very short greater than the time of threshold value VTH and ramp signal RAMP sum, the time of pulse-skip signal SLEEP outside maximum duty cycle is high level.This has just guaranteed switch converters 300 under the pulse-skip pattern, only produces a switching pulse at every turn, and the time interval between two adjacent switch pulses is decided by load current.Thereby little, the high efficiency of the switching loss of switch converters 300 under the pulse-skip pattern, and stability is good, and compared with prior art, the ripple of its output voltage VO UT also reduces greatly.
Though described the utility model with reference to several exemplary embodiments, should be appreciated that used term is explanation and exemplary and nonrestrictive term.Because the utility model practical implementation and do not break away from the spirit or the essence of utility model in a variety of forms; So be to be understood that; The foregoing description is not limited to any aforesaid details; And should in enclose spirit that claim limited and scope, explain widely, therefore fall into whole variations and modification in claim or its equivalent scope and all should be the claim of enclosing and contain.
Claims (9)
1. control circuit that is used for switch converters, this switch converters comprises the switching circuit with at least one switching tube, it is characterized in that, this control circuit comprises:
Error amplifying circuit has first input end, second input and output, and wherein first input end receives reference signal, and second input receives the feedback signal of representation switch circuit output voltage, and output provides error amplification signal;
Logical circuit; Have first input end, second input and output; Wherein first input end is electrically coupled to error amplifying circuit to receive error amplification signal; Output provides conducting and the shutoff of control signal with at least one switching tube in the control switch circuit, and wherein control signal comprises periodic switching pulse;
Ramp signal produces circuit, produces ramp signal; And
The pulse-skip circuit is electrically coupled to error amplifying circuit and ramp signal and produces circuit, produces the pulse-skip signal according to error amplification signal, ramp signal and threshold value, and with the pulse-skip signal second input to logical circuit is provided; Wherein
Said logical circuit makes control signal skip one or more switching pulses according to the pulse-skip signal.
2. control circuit as claimed in claim 1; It is characterized in that; Said ramp signal produces circuit and comprises resistance-capacitance network, and the input of this resistance-capacitance network is electrically coupled to the output of logical circuit to receive control signal, and output is electrically coupled to the pulse-skip circuit so that ramp signal to be provided.
3. control circuit as claimed in claim 2 is characterized in that, said resistance-capacitance network comprises:
First capacitor has first end and second end, wherein the second end ground connection;
Resistor has first end and second end, wherein first end be electrically coupled to logical circuit output to receive control signal; And
Second capacitor has first end and second end, and wherein first end is electrically coupled to second end of resistor, and the first end electric coupling of second end and first capacitor is together to provide ramp signal.
4. control circuit as claimed in claim 1 is characterized in that, said pulse-skip circuit comprises:
Comparator has first input end, second input and output, wherein first input end receive threshold and ramp signal sum, and second input is electrically coupled to the output of error amplifying circuit to receive error amplification signal.
5. control circuit as claimed in claim 4 is characterized in that, said pulse-skip circuit also comprises:
With door; Have first input end, second input and output; Wherein first input end is electrically coupled to the output of comparator, and second input receives maximum duty cycle signal, and output is electrically coupled to second input of logical circuit so that the pulse-skip signal to be provided.
6. a switch converters is characterized in that, comprising:
Like each described control circuit in the claim 1 to 5.
7. control circuit that is used for switch converters, this switch converters comprises the switching circuit with at least one switching tube, it is characterized in that, this control circuit comprises:
Error amplifier has first input end, second input and output, and wherein first input end receives reference signal, and second input receives the feedback signal of representation switch circuit output voltage, and output provides error amplification signal;
Oscillating circuit has first output and second output, and wherein first output provides periodic clock signal, and second output provides periodic slope compensation signal;
Ramp signal produces circuit, produces ramp signal;
First comparator has first input end, second input and output, wherein first input end receive threshold and ramp signal sum, and second input is electrically coupled to the output of error amplifier to receive error amplification signal;
Not gate, its input are electrically coupled to first output of oscillating circuit with the receive clock signal;
With door, have first input end, second input and output, wherein first input end is electrically coupled to the output of first comparator, and second input is electrically coupled to the output of not gate;
Second comparator; Have first input end, second input and output; Wherein first input end receives slope compensation signal and represents the current sampling signal sum that flows through the switching tube electric current, and second input is electrically coupled to the output of error amplifier to receive error amplification signal;
Or door, have first input end, second input and output, wherein first input end is electrically coupled to the output of second comparator, and second input is electrically coupled to the output with door; And
Trigger; Have first input end, second input and output; Wherein first input end is electrically coupled to oscillating circuit with the receive clock signal; Second input be electrically coupled to or the door output, output provides conducting and the shutoff of control signal with at least one switching tube in the control switch circuit.
8. control circuit as claimed in claim 7; It is characterized in that; Said ramp signal produces circuit and comprises resistance-capacitance network; The input of this resistance-capacitance network is electrically coupled to the output of trigger to receive control signal, and output is electrically coupled to the first input end of first comparator so that ramp signal to be provided.
9. control circuit as claimed in claim 8 is characterized in that, said resistance-capacitance network comprises:
First capacitor, electric coupling is between the first input end and ground of first comparator;
Resistor has first end and second end, wherein first end be electrically coupled to trigger output to receive control signal; And
Second capacitor has first end and second end, and wherein first end is electrically coupled to second end of resistor, and second end is electrically coupled to the first input end of first comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205576387U CN202495877U (en) | 2011-12-28 | 2011-12-28 | Switch converter and control circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011205576387U CN202495877U (en) | 2011-12-28 | 2011-12-28 | Switch converter and control circuit thereof |
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| Publication Number | Publication Date |
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| CN202495877U true CN202495877U (en) | 2012-10-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011205576387U Expired - Fee Related CN202495877U (en) | 2011-12-28 | 2011-12-28 | Switch converter and control circuit thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103997206A (en) * | 2014-05-20 | 2014-08-20 | 华为技术有限公司 | Switching power source |
| CN104066260A (en) * | 2014-07-17 | 2014-09-24 | 矽力杰半导体技术(杭州)有限公司 | LED detecting circuit, driving circuit and lighting system |
-
2011
- 2011-12-28 CN CN2011205576387U patent/CN202495877U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103997206A (en) * | 2014-05-20 | 2014-08-20 | 华为技术有限公司 | Switching power source |
| US9641060B2 (en) | 2014-05-20 | 2017-05-02 | Huawei Technologies Co., Ltd. | Switching mode power supply |
| EP2947762B1 (en) * | 2014-05-20 | 2018-10-17 | Huawei Technologies Co., Ltd. | Duty cycle based current estimation in buck converter |
| EP3471254A1 (en) * | 2014-05-20 | 2019-04-17 | Huawei Technologies Co., Ltd. | Duty cycle based current estimation in buck converter |
| CN104066260A (en) * | 2014-07-17 | 2014-09-24 | 矽力杰半导体技术(杭州)有限公司 | LED detecting circuit, driving circuit and lighting system |
| CN104066260B (en) * | 2014-07-17 | 2016-08-24 | 矽力杰半导体技术(杭州)有限公司 | A kind of LED testing circuit and drive circuit and illuminator |
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