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CN202353175U - Overvoltage and undervoltage protection system for three-phase power system - Google Patents

Overvoltage and undervoltage protection system for three-phase power system Download PDF

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CN202353175U
CN202353175U CN2011204087839U CN201120408783U CN202353175U CN 202353175 U CN202353175 U CN 202353175U CN 2011204087839 U CN2011204087839 U CN 2011204087839U CN 201120408783 U CN201120408783 U CN 201120408783U CN 202353175 U CN202353175 U CN 202353175U
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undervoltage
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overvoltage
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包章尧
熊焘
张红申
杨林
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Siemens Corp
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Abstract

本实用新型提出了一种用于三相电源系统的过压欠压保护系统。该系统包括:包括整流单元、采样单元、欠压判断单元、欠压延时单元、过压判断单元、过压延时单元、断路器触发单元和第一信号隔离、取或单元。其中,所述第一信号隔离、取或单元用于对所述采样单元得到的对应每一相电压输出的采样电压信号分别进行隔离,并输出其中电压值最高的采样电压信号;所述过压判断单元用于将所述第一信号隔离、取或单元输出的采样电压信号与得到的过压参考信号进行比较,在所述第一信号隔离、取或单元输出的采样电压信号高于所述过压参考信号时,输出过压信号。本实用新型中,由于只需对一路采样电压信号进行过压判断,因此降低了过欠压保护系统的成本。

Figure 201120408783

The utility model proposes an overvoltage and undervoltage protection system for a three-phase power supply system. The system includes: a rectification unit, a sampling unit, an undervoltage judgment unit, an undervoltage delay unit, an overvoltage judgment unit, an overvoltage delay unit, a circuit breaker trigger unit and a first signal isolation and OR unit. Wherein, the first signal isolation and OR unit is used to isolate the sampling voltage signal corresponding to each phase voltage output obtained by the sampling unit, and output the sampling voltage signal with the highest voltage value; the overvoltage The judging unit is used to compare the sampling voltage signal output by the first signal isolation, OR unit with the obtained overvoltage reference signal, where the sampling voltage signal output by the first signal isolation, OR unit is higher than the When the reference signal is overvoltage, the overvoltage signal is output. In the utility model, since only one channel of sampling voltage signal needs to be judged for overvoltage, the cost of the overvoltage and undervoltage protection system is reduced.

Figure 201120408783

Description

用于三相电源系统的过压欠压保护系统Overvoltage and undervoltage protection system for three-phase power system

技术领域 technical field

本实用新型涉及配电系统供电领域,特别是一种用于三相电源系统的过压欠压保护系统。The utility model relates to the field of power supply for power distribution systems, in particular to an overvoltage and undervoltage protection system for a three-phase power supply system.

背景技术 Background technique

在工业及家用的实际应用中,三相电源系统易受外界因素的影响而出现过压或欠压的问题,而过压或欠压情况的出现又可能会对负载造成一定的损坏,并造成一定的经济损失。因此需要在三相电源系统出现过压或欠压时,利用断路器等切断三相电源系统的通路,以对电路进行保护。In the practical application of industry and household, the three-phase power system is susceptible to overvoltage or undervoltage due to the influence of external factors, and the occurrence of overvoltage or undervoltage may cause certain damage to the load and cause Certain economic losses. Therefore, when an overvoltage or undervoltage occurs in the three-phase power system, it is necessary to use a circuit breaker or the like to cut off the path of the three-phase power system to protect the circuit.

图1示出了三相电源系统的过压欠压保护系统的通用结构示意图。如图1所示,该系统主要包括:直流电源单元10、整流单元20、采样单元30、过压判断单元40、过压延时单元50、欠压判断单元60、欠压延时单元70和断路器触发单元80。Fig. 1 shows a general structural diagram of an overvoltage and undervoltage protection system for a three-phase power system. As shown in Figure 1, the system mainly includes: a DC power supply unit 10, a rectification unit 20, a sampling unit 30, an overvoltage judging unit 40, an overvoltage delay unit 50, an undervoltage judging unit 60, an undervoltage delay unit 70 and a circuit breaker Trigger unit 80.

其中,直流电源单元10用于对三相电源系统的某一相电压输出进行降压及稳压处理,并产生稳定的直流电源。具体实现时,DC电源单元10也可对三相电源系统经整流单元20处理后的某一相电压输出进行降压及稳压处理,并产生稳定的直流电源。或者,直流电源单元也可以由其它方式产生,如电池等。Wherein, the DC power supply unit 10 is used for stepping down and stabilizing the voltage output of a certain phase of the three-phase power supply system, and generating a stable DC power supply. In actual implementation, the DC power supply unit 10 can also step down and stabilize the voltage output of a certain phase of the three-phase power supply system processed by the rectification unit 20, and generate a stable DC power supply. Alternatively, the DC power supply unit can also be generated by other means, such as batteries.

整流单元20用于对三相电源系统的每一相电压输出分别进行整流,并得到对应每一相电压输出的直流电压输出。The rectification unit 20 is used to respectively rectify the voltage output of each phase of the three-phase power system, and obtain a DC voltage output corresponding to each phase voltage output.

采样单元30用于对整流后的每一相直流电压输出分别进行降压或降压延时处理,得到对应每一相电压输出的采样电压信号。The sampling unit 30 is used to respectively perform step-down or step-down delay processing on the rectified DC voltage output of each phase to obtain a sampled voltage signal corresponding to each phase voltage output.

过压判断单元40由所述直流电源单元10供电,并用于将当前输入的一相采样电压信号与得到的过压参考信号进行比较,并在当前输入的采样电压信号高于过压参考信号时,输出过压信号。The overvoltage judging unit 40 is powered by the DC power supply unit 10, and is used for comparing the currently input one-phase sampled voltage signal with the obtained overvoltage reference signal, and when the currently input sampled voltage signal is higher than the overvoltage reference signal , output overvoltage signal.

过压延时单元50用于对所述过压判断单元40的输出进行第一设定时间的延时输出,在所述过压判断单元40输出过压信号的时间达到所述第一设定时间时,输出触发信号,控制所述断路器触发单元80触发三相电源系统回路中的断路器线圈导通,使断路器断开。The overvoltage delay unit 50 is used to delay the output of the output of the overvoltage judging unit 40 for a first set time, and the time when the overvoltage judging unit 40 outputs an overvoltage signal reaches the first set time , a trigger signal is output to control the circuit breaker trigger unit 80 to trigger the conduction of the circuit breaker coil in the three-phase power system loop, so that the circuit breaker is disconnected.

欠压判断单元60由所述直流电源单元10供电,并用于将当前输入的一相采样电压信号与得到的欠压参考信号进行比较,并在当前输入的采样电压信号低于欠压参考信号时,输出欠压信号。The undervoltage judging unit 60 is powered by the DC power supply unit 10, and is used to compare the currently input one-phase sampled voltage signal with the obtained undervoltage reference signal, and when the currently input sampled voltage signal is lower than the undervoltage reference signal , output undervoltage signal.

欠压延时单元70用于对所述欠压判断单元60的输出进行第二设定时间的延时输出,在所述欠压判断单元60输出欠压信号的时间达到所述第二设定时间时,输出触发信号,控制所述断路器触发单元80触发三相电源系统回路中的断路器线圈导通,使断路器断开。The undervoltage delay unit 70 is used to delay the output of the output of the undervoltage judgment unit 60 for a second set time, and the time when the undervoltage judgment unit 60 outputs the undervoltage signal reaches the second set time , a trigger signal is output to control the circuit breaker trigger unit 80 to trigger the conduction of the circuit breaker coil in the three-phase power system loop, so that the circuit breaker is disconnected.

目前,在实现上述三相电源系统的过压欠压保护系统时,通常成本较高。At present, when realizing the above-mentioned overvoltage and undervoltage protection system of the three-phase power supply system, the cost is generally high.

发明内容 Contents of the invention

本实用新型提出了一种用于三相电源系统的过压欠压保护系统,用以降低三相电源系统的过压欠压保护系统的成本。The utility model provides an overvoltage and undervoltage protection system for a three-phase power supply system, which is used to reduce the cost of the overvoltage and undervoltage protection system of the three-phase power supply system.

本实用新型提供的用于三相电源系统的过压欠压保护系统,所述过压欠压保护系统可产生一欠压参考信号和一过压参考信号;该系统包括:包括整流单元、采样单元、欠压判断单元、欠压延时单元、过压判断单元、过压延时单元、断路器触发单元和第一信号隔离、取或单元,其中;The utility model provides an overvoltage and undervoltage protection system for a three-phase power supply system. The overvoltage and undervoltage protection system can generate an undervoltage reference signal and an overvoltage reference signal; the system includes: a rectification unit, a sampling unit, an undervoltage judgment unit, an undervoltage delay unit, an overvoltage judgment unit, an overvoltage delay unit, a circuit breaker trigger unit, and a first signal isolation and OR unit, wherein;

所述整流单元用于将所述三相电源系统的每一相电压输出由交流转换为直流后输出;The rectification unit is used to convert the voltage output of each phase of the three-phase power system from AC to DC for output;

所述采样单元用于对经所述整流单元整流后的三相电源系统的每一相电压输出分别进行采样,并输出对应每一相电压输出的采样电压信号;The sampling unit is used to sample each phase voltage output of the three-phase power system rectified by the rectification unit, and output a sampled voltage signal corresponding to each phase voltage output;

所述欠压判断单元用于将当前输入的一相采样电压信号与所述欠压参考信号进行比较,并在当前输入的采样电压信号低于所述欠压参考信号时,输出欠压信号;The undervoltage judging unit is used to compare the currently input one-phase sampling voltage signal with the undervoltage reference signal, and output an undervoltage signal when the currently input sampling voltage signal is lower than the undervoltage reference signal;

所述欠压延时单元用于在所述欠压判断单元输出欠压信号的时间达到一第二设定时间时,向断路器触发单元输出触发信号;The undervoltage delay unit is used to output a trigger signal to the circuit breaker trigger unit when the time when the undervoltage judging unit outputs the undervoltage signal reaches a second set time;

所述第一信号隔离、取或单元用于对所述采样单元得到的对应每一相电压输出的采样电压信号分别进行隔离,并输出其中电压值最高的采样电压信号;The first signal isolation and OR unit is used to isolate the sampling voltage signal corresponding to each phase voltage output obtained by the sampling unit, and output the sampling voltage signal with the highest voltage value among them;

所述过压判断单元用于将所述第一信号隔离、取或单元输出的采样电压信号与所述过压参考信号进行比较,在所述第一信号隔离、取或单元输出的采样电压信号高于所述过压参考信号时,输出过压信号;The overvoltage judging unit is used to compare the sampling voltage signal output by the first signal isolation, OR unit with the overvoltage reference signal, and the sampling voltage signal output by the first signal isolation, OR unit outputting an overvoltage signal when it is higher than the overvoltage reference signal;

所述过压延时单元用于在所述过压判断单元输出过压信号的时间达到一第一设定时间时,向断路器触发单元输出触发信号;The overvoltage delay unit is used to output a trigger signal to the circuit breaker trigger unit when the time when the overvoltage judging unit outputs the overvoltage signal reaches a first set time;

所述断路器触发单元用于在接收到所述欠压延时单元或者所述过压延时单元输出的触发信号时,触发所述三相电源系统回路中的断路器线圈导通,使断路器断开。The circuit breaker triggering unit is used to trigger the conduction of the circuit breaker coil in the three-phase power system loop when receiving the trigger signal output by the undervoltage delay unit or the overvoltage delay unit, so that the circuit breaker is turned off. open.

本实用新型的一个实施方式中,所述第一信号隔离、取或单元包括:第一下拉电阻和三个第一二极管,每个第一二极管的正极与采样单元的一相输出端相连、负极连接在一起后作为所述第一信号、隔离取或单元的输出;所述第一下拉电阻的一端与所述三个第一二极管的负极相连、另一端接地。In one embodiment of the present invention, the first signal isolation and OR unit includes: a first pull-down resistor and three first diodes, and the anode of each first diode is connected to one phase of the sampling unit. The output ends are connected, and the negative poles are connected together to serve as the output of the first signal, isolated NOR unit; one end of the first pull-down resistor is connected to the negative poles of the three first diodes, and the other end is grounded.

较佳地,所述系统进一步包括:第二信号隔离、取或单元,用于对所述欠压延时单元和所述过压延时单元的输出分别进行隔离并集中到一点,在其中的任一输出为触发信号时,将触发信号输出给所述断路器触发单元;Preferably, the system further includes: a second signal isolation and OR unit, which is used to isolate and concentrate the outputs of the undervoltage delay unit and the overvoltage delay unit to one point, and any one of them When the output is a trigger signal, output the trigger signal to the circuit breaker trigger unit;

所述断路器触发单元包括:第一稳压管、可控硅和第一电容;所述第一稳压管的正极与所述第二信号隔离、取或单元的输出端相连、负极与所述可控硅的门极相连,所述可控硅的一个主端子与三相电源系统回路中的断路器线圈相连、另一个主端子接地,所述第一电容的一端与所述第一稳压管的负极相连、另一端接地。The circuit breaker trigger unit includes: a first voltage regulator tube, a silicon controlled rectifier and a first capacitor; the positive pole of the first voltage regulator tube is connected to the output terminal of the second signal isolation and OR unit, and the negative pole is connected to the output terminal of the second signal isolation and OR unit. The gate of the thyristor is connected, one main terminal of the thyristor is connected to the circuit breaker coil in the three-phase power system circuit, and the other main terminal is grounded, and one end of the first capacitor is connected to the first stable The negative pole of the pressure tube is connected, and the other end is grounded.

在本实用新型的一个实施方式中,所述第二信号隔离、取或单元包括:第二下拉电阻和与所述欠压延时单元和所述过压延时单元的输出的数量相一致的复数个第二二极管,各个第二二极管的正极与其对应的欠压延时单元或过压延时单元的输出端相连、负极连接在一起后作为所述第二信号隔离、取或单元的输出端与断路器触发单元的输入端相连;所述第二下拉电阻的一端与所述复数个第二二极管连接在一起的负极相连、另一端接地。In one embodiment of the present invention, the second signal isolation and OR unit includes: a second pull-down resistor and a plurality of outputs consistent with the output of the undervoltage delay unit and the overvoltage delay unit The second diode, the anode of each second diode is connected to the output terminal of the corresponding undervoltage delay unit or overvoltage delay unit, and the negative poles are connected together as the output terminal of the second signal isolation and OR unit It is connected to the input end of the circuit breaker trigger unit; one end of the second pull-down resistor is connected to the cathodes of the plurality of second diodes connected together, and the other end is grounded.

在本实用新型的一个实施方式中,所述欠压判断单元包括:三个欠压判断子单元,每个欠压判断子单元分别用于将采样单元输出的一相采样电压信号与所述欠压参考信号进行比较,在该相采样电压信号低于所述欠压参考信号时,输出对应该相的欠压信号;In one embodiment of the present invention, the undervoltage judging unit includes: three undervoltage judging subunits, and each undervoltage judging subunit is used to compare the one-phase sampling voltage signal output by the sampling unit with the undervoltage judging subunit. Compared with the voltage reference signal, when the sampled voltage signal of the phase is lower than the under-voltage reference signal, output the under-voltage signal corresponding to the phase;

所述欠压延时单元包括:三个欠压延时子单元,每个欠压延时子单元对应一个欠压判断子单元的输出。The undervoltage delay unit includes: three undervoltage delay subunits, and each undervoltage delay subunit corresponds to the output of an undervoltage judgment subunit.

在本实用新型的一个实施方式中,所述欠压判断单元包括:一个欠压判断子单元,用于将所述第一信号隔离、取或单元输出的采样电压信号与所述欠压参考信号进行比较,在所述第一信号隔离、取或单元输出的采样电压信号低于所述欠压参考信号时,输出欠压信号;In one embodiment of the present invention, the undervoltage judging unit includes: an undervoltage judging subunit for isolating the first signal, taking the sampling voltage signal output by the OR unit, and the undervoltage reference signal performing a comparison, and outputting an undervoltage signal when the sampling voltage signal output by the first signal isolation and OR unit is lower than the undervoltage reference signal;

所述欠压延时单元包括:对应所述欠压判断子单元的一个欠压延时子单元。The undervoltage delay unit includes: an undervoltage delay subunit corresponding to the undervoltage judgment subunit.

其中,所述过压延时单元为RC延时电路,或者为带MOS管的RC延时控制电路;Wherein, the overvoltage delay unit is an RC delay circuit, or an RC delay control circuit with a MOS tube;

所述欠压延时单元为RC延时电路,或者为带MOS管的RC延时控制电路。The undervoltage delay unit is an RC delay circuit, or an RC delay control circuit with a MOS tube.

在本实用新型的一个实施方式中,所述带MOS管的RC延时控制电路包括:In one embodiment of the present utility model, the RC delay control circuit with a MOS tube includes:

第四二极管、第二限压电阻、第二充放电电容、第二充放电电阻、第二稳压管和第一MOS管;所述第四二极管的正极与对应的过压判断单元或欠压判断单元的输出端相连、负极与所述第二限压电阻的一端相连;所述第二限压电阻的另一端与所述第二充放电电容的一端相连;所述第二充放电电容的另一端接地,所述第二充放电电阻与所述第二充放电电容并联;所述第二稳压管的正极与所述第一充放电电阻的非接地端相连、负极与所述第一MOS管的栅极相连;所述第一MOS管的漏极与所述第四二极管的正极相连,源极为所述过压延时单元或欠压延时单元的输出端;The fourth diode, the second voltage limiting resistor, the second charge and discharge capacitor, the second charge and discharge resistor, the second voltage regulator tube and the first MOS tube; the anode of the fourth diode and the corresponding overvoltage judgment The output end of the unit or the undervoltage judgment unit is connected, and the negative pole is connected to one end of the second voltage limiting resistor; the other end of the second voltage limiting resistor is connected to one end of the second charging and discharging capacitor; the second The other end of the charging and discharging capacitor is grounded, and the second charging and discharging resistor is connected in parallel with the second charging and discharging capacitor; The gate of the first MOS transistor is connected; the drain of the first MOS transistor is connected to the anode of the fourth diode, and the source is the output end of the overvoltage delay unit or the undervoltage delay unit;

或者,所述带MOS管的RC延时控制电路包括:第一RC延时电路、可控开关和第二MOS管;Alternatively, the RC delay control circuit with a MOS tube includes: a first RC delay circuit, a controllable switch and a second MOS tube;

所述第一RC延时电路的输入端与对应的过压判断单元或欠压判断单元的输出端相连,所述第一RC延时电路的输出端与所述可控开关的控制端相连,所述可控开关的一个连接端与直流电源相连,另一个连接端接地;所述MOS管的控制端与欠压判断单元或过压判断单元的输出端相连,漏极与直流电源相连,源极为所述过压延时单元或欠压延时单元的输出端。The input end of the first RC delay circuit is connected to the output end of the corresponding overvoltage judgment unit or undervoltage judgment unit, the output end of the first RC delay circuit is connected to the control end of the controllable switch, One connection terminal of the controllable switch is connected to the DC power supply, and the other connection terminal is grounded; the control terminal of the MOS tube is connected to the output terminal of the undervoltage judgment unit or the overvoltage judgment unit, the drain is connected to the DC power supply, and the source It is the output end of the over-voltage delay unit or the under-voltage delay unit.

在本实用新型的一个实施方式中,所述第一RC延时电路包括:第一三极管、第三充放电电容、第三限压电阻、第二三极管、第四限压电阻、第四充放电电容、第三充放电电阻、第五二极管和第二稳压管;所述第一三极管的基极与对应的过压判断单元或欠压判断单元的输出端相连、集电极与直流电源相连、发射极与第三充放电电容的一端相连;所述第三充放电电容的另一端接地;所述第三限压电阻的一端与所述第一三极管的发射极相连、另一端与第二三极管的基极相连;所述第二三极管的集电极与第四限压电阻的一端相连、发射极与第四充放电电容的一端相连;所述第四限压电阻的另一端与直流电源相连;所述第四充放电电容的另一端接地;所述第三充放电电阻与所述第四充放电电容并联;所述第五二极管的正极与所述第三充放电电阻的非接地端相连、负极与所述第二稳压管的正极相连;所述第二稳压管的负极为所述第一RC延时电路的输出端。In one embodiment of the present invention, the first RC delay circuit includes: a first triode, a third charge and discharge capacitor, a third voltage limiting resistor, a second triode, a fourth voltage limiting resistor, The fourth charging and discharging capacitor, the third charging and discharging resistor, the fifth diode and the second voltage regulator tube; the base of the first triode is connected to the output terminal of the corresponding overvoltage judging unit or undervoltage judging unit , the collector is connected to the DC power supply, the emitter is connected to one end of the third charge and discharge capacitor; the other end of the third charge and discharge capacitor is grounded; one end of the third voltage limiting resistor is connected to the first triode The emitter is connected, and the other end is connected with the base of the second triode; the collector of the second triode is connected with one end of the fourth voltage limiting resistor, and the emitter is connected with one end of the fourth charging and discharging capacitor; The other end of the fourth voltage limiting resistor is connected to a DC power supply; the other end of the fourth charging and discharging capacitor is grounded; the third charging and discharging resistor is connected in parallel with the fourth charging and discharging capacitor; the fifth diode The anode of the positive pole is connected to the non-ground terminal of the third charging and discharging resistor, and the negative pole is connected to the positive pole of the second voltage stabilizing tube; the negative pole of the second voltage stabilizing tube is the output end of the first RC delay circuit .

在本实用新型的一个实施方式中,所述可控开关包括:第三三极管、第五限压电阻、第四三极管和第六限压电阻;所述第三三极管的基极与所述第一RC延时电路的输出端相连;所述第三三极管的发射极接地、集电极与第四三极管的基极以及第五限压电阻的一端相连;所述第五限压电阻的另一端与直流电源相连;所述第四三极管的发射极接地、集电极与所述第六限压电阻的一端相连;所述第六限压电阻的另一端与直流电源相连。In one embodiment of the present invention, the controllable switch includes: a third transistor, a fifth voltage limiting resistor, a fourth transistor and a sixth voltage limiting resistor; the base of the third transistor pole is connected with the output terminal of the first RC delay circuit; the emitter of the third transistor is grounded, the collector is connected with the base of the fourth transistor and one end of the fifth voltage limiting resistor; The other end of the fifth voltage limiting resistor is connected to the DC power supply; the emitter of the fourth triode is grounded, and the collector is connected to one end of the sixth voltage limiting resistor; the other end of the sixth voltage limiting resistor is connected to the DC power is connected.

在本实用新型的一个实施方式中,所述直流电源通过对三相电源系统的某一相电压输出进行分压及稳压后产生。In one embodiment of the present utility model, the DC power supply is generated by dividing and stabilizing the voltage output of a certain phase of the three-phase power supply system.

从上述方案中可以看出,由于本实用新型中利用第一信号隔离、取或单元对采样单元得到的对应每一相电压输出的采样电压信号分别进行隔离,并输出其中电压值最高的采样电压信号,因此过压判断单元中可以仅包括一个运放或不包括运放,如其他实现比较功能的电路,用于根据过压参考信号对第一信号隔离、取或单元输出的采样电压信号进行过压判断,从而减少了至少两个运放的个数,降低了三相电源系统的过压欠压保护系统的成本。As can be seen from the above scheme, since the utility model uses the first signal isolation and OR unit to isolate the sampling voltage signals corresponding to each phase voltage output obtained by the sampling unit, and output the sampling voltage with the highest voltage value among them signal, so the overvoltage judging unit may include only one op amp or not, such as other circuits that implement a comparison function, and are used to isolate the first signal according to the overvoltage reference signal, and perform the sampling voltage signal output by the OR unit. The overvoltage judgment reduces the number of at least two operational amplifiers and reduces the cost of the overvoltage and undervoltage protection system of the three-phase power supply system.

进一步地,通过利用第二信号隔离、取或单元对欠压延时单元和过压延时单元的输出分别进行隔离并集中到一点,在其中的任一输出为触发信号时,将触发信号输出给所述断路器触发单元,从而使得断路器触发单元仅包括一个运放或不包括运放,进一步降低了三相电源系统的过压欠压保护系统的成本。Further, by using the second signal isolation and OR unit to isolate the outputs of the undervoltage delay unit and the overvoltage delay unit and concentrate them at one point, when any one of the outputs is a trigger signal, the trigger signal is output to all The above circuit breaker trigger unit, so that the circuit breaker trigger unit only includes an operational amplifier or does not include an operational amplifier, further reducing the cost of the overvoltage and undervoltage protection system of the three-phase power supply system.

此外,通过使欠压判断单元也接收第一信号隔离、取或单元输出的采样电压信号,从而使得欠压判断单元中也可仅包括一个运放或不包括运放,如其他实现比较功能的电路,从而也减少了欠压判断单元中的运放的个数,又进一步降低了三相电源系统的过压欠压保护系统的成本。In addition, by making the undervoltage judging unit also receive the sampling voltage signal output by the first signal isolation and OR unit, the undervoltage judging unit may only include one operational amplifier or not include an operational amplifier, such as other circuit, thereby also reducing the number of operational amplifiers in the undervoltage judging unit, and further reducing the cost of the overvoltage and undervoltage protection system of the three-phase power supply system.

此外,通过在欠压延时单元和过压延时单元中采用带有MOS管的延时电路,可以实现延时输出与欠压判断单元或过压判断单元的输出的与逻辑,从而避免误操作的产生。In addition, by using a delay circuit with a MOS tube in the under-voltage delay unit and the over-voltage delay unit, the AND logic of the delay output and the output of the under-voltage judgment unit or the over-voltage judgment unit can be realized, thereby avoiding the error of misoperation produce.

附图说明 Description of drawings

下面将通过参照附图详细描述本实用新型的优选实施例,使本领域的普通技术人员更清楚本实用新型的上述及其它特征和优点,附图中:Preferred embodiments of the present utility model will be described in detail below with reference to the accompanying drawings, so that those of ordinary skill in the art are more aware of the above-mentioned and other features and advantages of the present utility model. In the accompanying drawings:

图1为三相电源系统的过压欠压保护系统的通用结构示意图。FIG. 1 is a general structural diagram of an overvoltage and undervoltage protection system for a three-phase power system.

图2为目前一个应用中的三相电源系统的过压欠压保护系统的结构示意图。FIG. 2 is a schematic structural diagram of an overvoltage and undervoltage protection system of a three-phase power supply system in current application.

图3为本实用新型一个实施例中的三相电源系统的过压欠压保护系统的结构示意图。FIG. 3 is a schematic structural diagram of an overvoltage and undervoltage protection system of a three-phase power supply system in an embodiment of the present invention.

图4为本实用新型又一个实施例中的三相电源系统的过压欠压保护系统的结构示意图。Fig. 4 is a schematic structural diagram of an overvoltage and undervoltage protection system of a three-phase power supply system in another embodiment of the present invention.

图5为本实用新型再一个实施例中的三相电源系统的过压欠压保护系统的结构示意图。FIG. 5 is a schematic structural diagram of an overvoltage and undervoltage protection system of a three-phase power supply system in another embodiment of the present invention.

图6为本实用新型中过压延时单元的一个内部结构示意图。Fig. 6 is a schematic diagram of the internal structure of the overvoltage delay unit in the present invention.

图7为对应图4所示实施例的一个示例中的三相电源系统的过压欠压保护系统的结构示意图。FIG. 7 is a schematic structural diagram corresponding to an overvoltage and undervoltage protection system of a three-phase power system in an example of the embodiment shown in FIG. 4 .

图8为图6所示示例中过压延时子单元的又一种具体实现的结构示意图。FIG. 8 is a schematic structural diagram of another specific implementation of the overvoltage delay subunit in the example shown in FIG. 6 .

图中:10-直流电源单元 20-整流单元 30-采样单元 40-过压判断单元 50-过压延时单元 60-欠压判断单元 70-欠压延时单元 80-断路器触发单元 90-第一信号隔离取或、单元 100-第二信号隔离、取或单元In the figure: 10-DC power supply unit 20-rectification unit 30-sampling unit 40-overvoltage judgment unit 50-overvoltage delay unit 60-undervoltage judgment unit 70-undervoltage delay unit 80-circuit breaker trigger unit 90-first Signal isolation and OR unit 100-the second signal isolation, OR unit

201-第一相整流子单元 202-第二相整流子单元 203-第三相整流子单元201-First phase rectification subunit 202-Second phase rectification subunit 203-Third phase rectification subunit

301-第一相采样子单元 302-第二相采样子单元 303-第三相采样子单元301-first phase sampling subunit 302-second phase sampling subunit 303-third phase sampling subunit

401-第一相过压判断子单元 402-第二相过压判断子单元 403-第三相过压判断子单元 404-过压判断子单元401-first phase overvoltage judgment subunit 402-second phase overvoltage judgment subunit 403-third phase overvoltage judgment subunit 404-overvoltage judgment subunit

501-第一相过压延时子单元 502-第二相过压延时子单元 503-第三相过压延时子单元 504-过压延时子单元501-First phase overvoltage delay subunit 502-Second phase overvoltage delay subunit 503-Third phase overvoltage delay subunit 504-Overvoltage delay subunit

601-第一相欠压判断子单元 602-第二相欠压判断子单元 603-第三相欠压判断子单元 604-欠压判断子单元601-First phase undervoltage judgment subunit 602-Second phase undervoltage judgment subunit 603-Third phase undervoltage judgment subunit 604-Undervoltage judgment subunit

701-第一相欠压延时子单元 702-第二相欠压延时子单元 703-第三相欠压延时子单元 704-欠压延时子单元701-First phase undervoltage delay subunit 702-Second phase undervoltage delay subunit 703-Third phase undervoltage delay subunit 704-Undervoltage delay subunit

801-带运放的过压延时触发单元 802-带运放的欠压延时触发单元 803-稳压管导通触发单元801-Overvoltage delay trigger unit with operational amplifier 802-Undervoltage delay trigger unit with operational amplifier 803-Voltage regulator conduction trigger unit

5041-第一RC延时电路5041-The first RC delay circuit

具体实施方式 Detailed ways

用新型的目的、技术方案和优点更加清楚,以下举实施例对本实用新型进一步详细说明。The purpose, technical scheme and advantages of the utility model are more clear, and the following examples are given to further describe the utility model in detail.

图2示出了目前一个应用中的三相电源系统的过压欠压保护系统的结构示意图。如图2所示,该系统中的整流单元20、采样单元30、过压判断单元40、过压延时单元50、欠压判断单元60和欠压延时单元70分别包括三个相应的子单元,每个子单元对应三相电源系统的一相电压输出。此外,断路器触发单元80包括:带运放的过压延时触发单元801和带运放的欠压延时触发单元802。Fig. 2 shows a schematic structural diagram of an overvoltage and undervoltage protection system of a three-phase power supply system in current application. As shown in Figure 2, the rectification unit 20, the sampling unit 30, the overvoltage judgment unit 40, the overvoltage delay unit 50, the undervoltage judgment unit 60 and the undervoltage delay unit 70 in the system respectively include three corresponding subunits, Each subunit corresponds to a phase voltage output of a three-phase power system. In addition, the circuit breaker trigger unit 80 includes: an overvoltage delay trigger unit 801 with an operational amplifier and an undervoltage delay trigger unit 802 with an operational amplifier.

其中,整流单元20包括第一相整流子单元201、第二相整流子单元202和第三相整流子单元203。其中,第一相整流子单元201用于对三相电源系统的第一相电压输出进行整流,并得到对应第一相电压输出的第一相直流电压输出;第二相整流子单元202用于对三相电源系统的第二相电压输出进行整流,并得到对应第二相电压输出的第二相直流电压输出;第三相整流子单元203用于对三相电源系统的第三相电压输出进行整流,并得到对应第三相电压输出的第三相直流电压输出。Wherein, the rectification unit 20 includes a first phase rectification subunit 201 , a second phase rectification subunit 202 and a third phase rectification subunit 203 . Among them, the first phase rectification subunit 201 is used to rectify the first phase voltage output of the three-phase power system, and obtain the first phase DC voltage output corresponding to the first phase voltage output; the second phase rectification subunit 202 is used for Rectify the second-phase voltage output of the three-phase power supply system, and obtain the second-phase DC voltage output corresponding to the second-phase voltage output; the third-phase rectification subunit 203 is used to output the third-phase voltage of the three-phase power supply system performing rectification, and obtaining a third-phase DC voltage output corresponding to the third-phase voltage output.

采样单元30包括第一相采样子单元301、第二相采样子单元302和第三相采样子单元303。其中,第一相采样子单元301用于对整流后的第一相直流电压输出进行降压或降压延时处理,得到对应第一相电压输出的第一相采样电压信号;第二相采样子单元302用于对整流后的第二相直流电压输出进行降压或降压延时处理,得到对应第二相电压输出的第二相采样电压信号;第三相采样子单元303用于对整流后的第三相直流电压输出进行降压或降压延时处理,得到对应第三相电压输出的第三相采样电压信号。The sampling unit 30 includes a first phase sampling subunit 301 , a second phase sampling subunit 302 and a third phase sampling subunit 303 . Among them, the first phase sampling subunit 301 is used to step down or step down and delay the rectified first phase DC voltage output to obtain the first phase sampling voltage signal corresponding to the first phase voltage output; the second phase sampling The sub-unit 302 is used to step down or step-down delay the rectified second-phase DC voltage output to obtain a second-phase sampling voltage signal corresponding to the second-phase voltage output; the third-phase sampling sub-unit 303 is used to Step-down or step-down delay processing is performed on the rectified third-phase DC voltage output to obtain a third-phase sampled voltage signal corresponding to the third-phase voltage output.

过压判断单元40包括分别由直流电源单元10供电的第一相过压判断子单元401、第二相过压判断子单元402和第三相过压判断子单元403。其中,第一相过压判断子单元401包括第一运算放大器(简称运放),用于将第一相采样电压信号与得到的过压参考信号进行比较,在第一相采样电压信号高于过压参考信号时,输出表示第一相过压信号的高电平;第二相过压判断子单元402包括第二运放,用于将第二相采样电压信号与得到的过压参考信号进行比较,并在第二相采样电压信号高于过压参考信号时,输出表示第二相过压信号的高电平;第三相过压判断子单元403包括第三运放,用于将第三相采样电压信号与得到的过压参考信号进行比较,并在第三相采样电压信号高于过压参考信号时,输出表示第三相过压信号的高电平。其中,过压参考信号可利用分压电阻对所述直流电源单元10进行分压后产生。The overvoltage judging unit 40 includes a first phase overvoltage judging subunit 401 , a second phase overvoltage judging subunit 402 and a third phase overvoltage judging subunit 403 respectively powered by the DC power supply unit 10 . Wherein, the first phase overvoltage judging subunit 401 includes a first operational amplifier (op amp for short), which is used to compare the first phase sampled voltage signal with the obtained overvoltage reference signal, and when the first phase sampled voltage signal is higher than When the overvoltage reference signal is used, the output represents the high level of the first phase overvoltage signal; the second phase overvoltage judging subunit 402 includes a second op amp for combining the second phase sampling voltage signal with the obtained overvoltage reference signal Compare, and when the second phase sampling voltage signal is higher than the overvoltage reference signal, output a high level representing the second phase overvoltage signal; the third phase overvoltage judging subunit 403 includes a third operational amplifier for The third phase sampled voltage signal is compared with the obtained overvoltage reference signal, and when the third phase sampled voltage signal is higher than the overvoltage reference signal, a high level representing the third phase overvoltage signal is output. Wherein, the overvoltage reference signal can be generated by dividing the voltage of the DC power supply unit 10 by using a voltage dividing resistor.

过压延时单元50包括第一相过压延时子单元501、第二相过压延时子单元502和第三相过压延时子单元503。其中,第一相过压延时子单元501用于对所述第一相过压判断子单元401的输出进行第一设定时间的延时输出,在所述第一相过压判断子单元401输出高电平的时间达到所述第一设定时间时,控制所述带运放的过压延时触发单元801触发断路器断开;第二相过压延时子单元502用于对所述第二相过压判断子单元402的输出进行第一设定时间的延时输出,在所述第二相过压判断子单元402输出高电平的时间达到所述第一设定时间时,控制所述带运放的过压延时触发单元801触发断路器断开;第三相过压延时子单元503用于对所述第三相过压判断子单元403的输出进行第一设定时间的延时输出,在所述第三相过压判断子单元403输出高电平的时间达到所述第一设定时间时,输出表示触发信号的高电平,控制所述带运放的过压延时触发单元801触发三相电源系统回路中的断路器线圈导通,使断路器断开。The overvoltage delay unit 50 includes a first phase overvoltage delay subunit 501 , a second phase overvoltage delay subunit 502 and a third phase overvoltage delay subunit 503 . Wherein, the first phase overvoltage delay subunit 501 is used to delay the output of the first phase overvoltage judgment subunit 401 for a first set time, and in the first phase overvoltage judgment subunit 401 When the time of outputting the high level reaches the first set time, control the overvoltage delay trigger unit 801 with an operational amplifier to trigger the circuit breaker to disconnect; the second phase overvoltage delay subunit 502 is used to control the first phase The output of the two-phase overvoltage judging subunit 402 is delayed for the first set time, and when the time when the second phase overvoltage judging subunit 402 outputs a high level reaches the first set time, the control The overvoltage delay trigger unit 801 with an operational amplifier triggers the disconnection of the circuit breaker; the third phase overvoltage delay subunit 503 is used to determine the output of the third phase overvoltage judgment subunit 403 for the first set time Delayed output, when the time when the third phase overvoltage judging subunit 403 outputs a high level reaches the first set time, output a high level indicating a trigger signal to control the overvoltage delay of the band op amp The trigger unit 801 triggers the conduction of the circuit breaker coil in the three-phase power system circuit, so that the circuit breaker is disconnected.

欠压判断单元60包括分别由直流电源单元10供电的第一相欠压判断子单元601、第二相欠压判断子单元602和第三相欠压判断子单元603。其中,第一相欠压判断子单元601包括第四运放,用于将第一相采样电压信号与得到的欠压参考信号进行比较,在第一相采样电压信号低于欠压参考信号时,输出表示第一相欠压信号的高电平;第二相欠压判断子单元602包括第五运放,用于将第二相采样电压信号与得到的欠压参考信号进行比较,在第二相采样电压信号低于欠压参考信号时,输出表示第二相欠压信号的高电平;第三相欠压判断子单元603包括第六运放,用于将第三相采样电压信号与得到的欠压参考信号进行比较,在第三相采样电压信号低于欠压参考信号时,输出表示第三相欠压信号的高电平。其中,欠压参考信号可利用分压电阻对所述直流电源单元10进行分压后产生。The undervoltage judging unit 60 includes a first phase undervoltage judging subunit 601 , a second phase undervoltage judging subunit 602 and a third phase undervoltage judging subunit 603 respectively powered by the DC power supply unit 10 . Wherein, the first phase undervoltage judging subunit 601 includes a fourth operational amplifier, which is used to compare the first phase sampling voltage signal with the obtained undervoltage reference signal, and when the first phase sampling voltage signal is lower than the undervoltage reference signal , the output represents the high level of the first phase undervoltage signal; the second phase undervoltage judging subunit 602 includes a fifth operational amplifier, which is used to compare the second phase sampling voltage signal with the obtained undervoltage reference signal. When the two-phase sampling voltage signal is lower than the undervoltage reference signal, the output represents the high level of the second phase undervoltage signal; the third phase undervoltage judging subunit 603 includes a sixth operational amplifier for converting the third phase sampling voltage signal Compared with the obtained undervoltage reference signal, when the third phase sampled voltage signal is lower than the undervoltage reference signal, a high level indicating the third phase undervoltage signal is output. Wherein, the undervoltage reference signal can be generated by dividing the voltage of the DC power supply unit 10 by using a voltage dividing resistor.

欠压延时单元70包括第一相欠压延时子单元701、第二相欠压延时子单元702和第三相欠压延时子单元703。其中,第一相欠压延时子单元701用于对所述第一相欠压判断子单元601的输出进行第二设定时间的延时输出,在所述第一相欠压判断子单元601输出高电平的时间达到所述第二设定时间时,控制所述带运放的欠压延时触发单元802触发断路器断开;第二相欠压延时子单元702用于对所述第二相欠压判断子单元602的输出进行第二设定时间的延时输出,在所述第二相欠压判断子单元602输出高电平的时间达到所述第二设定时间时,控制所述带运放的欠压延时触发单元802触发断路器断开;第三相欠压延时子单元703用于对所述第三相欠压判断子单元603的输出进行第二设定时间的延时输出,在所述第三相欠压判断子单元603输出高电平的时间达到所述第二设定时间时,输出表示触发信号的高电平,控制所述带运放的欠压延时触发单元802触发三相电源系统回路中的断路器线圈导通,使断路器断开。The undervoltage delay unit 70 includes a first phase undervoltage delay subunit 701 , a second phase undervoltage delay subunit 702 and a third phase undervoltage delay subunit 703 . Wherein, the first phase undervoltage delay subunit 701 is used to delay the output of the first phase undervoltage judgment subunit 601 for a second set time, and in the first phase undervoltage judgment subunit 601 When the high level output time reaches the second set time, control the undervoltage delay trigger unit 802 with an operational amplifier to trigger the circuit breaker to disconnect; the second phase undervoltage delay subunit 702 is used to control the first phase The output of the two-phase undervoltage judgment subunit 602 is delayed for a second set time, and when the time when the second phase undervoltage judgment subunit 602 outputs a high level reaches the second set time, the control The undervoltage delay trigger unit 802 with an operational amplifier triggers the disconnection of the circuit breaker; the third phase undervoltage delay subunit 703 is used to determine the output of the third phase undervoltage judgment subunit 603 for the second set time Delayed output, when the time when the third phase undervoltage judging subunit 603 outputs a high level reaches the second set time, output a high level indicating a trigger signal to control the undervoltage delay with an operational amplifier The timing trigger unit 802 triggers the coil of the circuit breaker in the three-phase power system circuit to be turned on, so that the circuit breaker is disconnected.

从图2所示的应用中可以看出,其在过压判断单元40中采用了三个运放,即第一运放至第三运放,在欠压判断单元60中采用了三个运放,即第四运放至第六运放,并且在断路器触发单元80中采用了两个运放,共采用了八个运放,而采用这么多运放的成本是较高的,使得该应用中的过压欠压保护系统的成本较高。It can be seen from the application shown in FIG. 2 that three operational amplifiers, namely the first operational amplifier to the third operational amplifier, are used in the overvoltage judging unit 40, and three operational amplifiers are used in the undervoltage judging unit 60. That is, the fourth operational amplifier to the sixth operational amplifier, and two operational amplifiers are used in the circuit breaker trigger unit 80, a total of eight operational amplifiers are used, and the cost of adopting so many operational amplifiers is relatively high, so that The cost of the overvoltage and undervoltage protection system in this application is relatively high.

基于图2所示三相电源系统的过压欠压保护系统,本实用新型中可通过减少过压欠压系统中的运放个数来降低过压欠压保护系统的成本。Based on the overvoltage and undervoltage protection system of the three-phase power supply system shown in Figure 2, the utility model can reduce the cost of the overvoltage and undervoltage protection system by reducing the number of operational amplifiers in the overvoltage and undervoltage system.

图3示出了本实用新型一个实施例中的结构示意图。如图3所示,本实用新型实施例中首先可减少过压判断单元40中的运放个数。具体可包括:在采样单元30与过压判断单元40之间增加第一信号隔离、取或单元90,用于对采样单元30得到的对应每一相电压输出的采样电压信号分别进行隔离,并输出其中电压值最高的采样电压信号。Fig. 3 shows a schematic structural view of an embodiment of the present invention. As shown in FIG. 3 , in the embodiment of the present invention, the number of operational amplifiers in the overvoltage judging unit 40 can be reduced first. Specifically, it may include: adding a first signal isolation and OR unit 90 between the sampling unit 30 and the overvoltage judging unit 40, which is used to isolate the sampling voltage signal corresponding to each phase voltage output obtained by the sampling unit 30, and Output the sampled voltage signal with the highest voltage value.

相应地,过压判断判断单元40可仅包括一个过压判断子单元404,该过压判断子单元404可包括一个运放,该运放由所述直流电源单元10供电,并用于将所述第一信号隔离、取或单元90输出的采样电压信号与系统提供的过压参考信号进行比较,在所述第一信号隔离、取或单元90输出的采样电压信号高于所述过压参考信号时,输出表示过压信号的高电平。其中,过压参考信号可利用分压电阻对所述直流电源单元10进行分压后产生。具体实现时,也可用其它能够实现上述比较判断功能的电路代替上述过压判断子单元404中的运放。Correspondingly, the overvoltage judging unit 40 may only include an overvoltage judging subunit 404, and the overvoltage judging subunit 404 may include an operational amplifier, which is powered by the DC power supply unit 10 and is used to convert the The sampling voltage signal output by the first signal isolation, OR unit 90 is compared with the overvoltage reference signal provided by the system, and the sampling voltage signal output by the first signal isolation, OR unit 90 is higher than the overvoltage reference signal When, the output represents the high level of the overvoltage signal. Wherein, the overvoltage reference signal can be generated by dividing the voltage of the DC power supply unit 10 by using a voltage dividing resistor. During specific implementation, other circuits capable of realizing the above-mentioned comparison and judgment function may also be used to replace the operational amplifier in the above-mentioned overvoltage judging subunit 404 .

相应地,过压延时单元50也只包括一个延时子单元504,用于对所述过压判断子单元404的输出进行第一设定时间的延时输出,在所述过压判断子单元404输出高电平的时间达到所述第一设定时间时,向断路器触发单元80输出表示触发信号的高电平。Correspondingly, the overvoltage delay unit 50 also only includes a delay subunit 504, which is used to delay the output of the output of the overvoltage judgment subunit 404 for a first set time, and in the overvoltage judgment subunit 404 outputs a high level indicating a trigger signal to the circuit breaker trigger unit 80 when the time for outputting the high level reaches the first set time.

此时,除上述第一信号隔离、取或单元90、过压判断单元40和过压延时单元50之外,其它各组成单元的功能及连接关系可与图1所示各组成单元的功能及连接关系相同。Now, except above-mentioned first signal isolation, fetching or unit 90, overvoltage judging unit 40 and overvoltage delay unit 50, the function and connection relation of each other constituent units can be with the function and the connection relationship of each constituent unit shown in Fig. 1 The connections are the same.

此外,本实用新型又一个实施例中还可在图3所示系统的基础上进一步减少带运放的过压延时触发单元801和带运放的欠压延时触发单元802中的运放。如图4所示,具体可包括:在过压延时单元50、欠压延时单元70与断路器触发单元80之间增加第二信号隔离、取或单元100,用于对所述欠压延时单元70和所述过压延时单元50的输出分别进行隔离并集中到一点,在其中的任一输出为高电平时,将高电平输出给所述断路器触发单元80。断路器触发单元80在接收到表示触发信号的高电平时,触发三相电源系统回路中的断路器线圈导通,使断路器断开。In addition, in another embodiment of the present invention, on the basis of the system shown in FIG. 3 , the op amps in the overvoltage delay trigger unit 801 with op amps and the undervoltage delay trigger unit 802 with op amps can be further reduced. As shown in Figure 4, it may specifically include: adding a second signal isolation, OR unit 100 between the overvoltage delay unit 50, the undervoltage delay unit 70, and the circuit breaker trigger unit 80, for controlling the undervoltage delay unit 70 and the output of the overvoltage delay unit 50 are respectively isolated and concentrated to one point, and when any one of the outputs is at a high level, it outputs a high level to the circuit breaker trigger unit 80 . When the circuit breaker triggering unit 80 receives the high level indicating the trigger signal, it triggers the conduction of the circuit breaker coil in the three-phase power system loop, so that the circuit breaker is disconnected.

此时,该断路器触发单元80可以是过压和欠压共用的带运放的延时触发单元,也可以是完全不带运放的断路器触发单元,即可以为如图3所示的稳压管导通触发单元803。At this time, the circuit breaker trigger unit 80 can be a delay trigger unit with an operational amplifier shared by overvoltage and undervoltage, or a circuit breaker trigger unit without an operational amplifier at all, that is, as shown in FIG. 3 The Zener transistor turns on the trigger unit 803 .

进一步地,在本实用新型的其他实施例中还可在图4所示系统的基础上减少欠压判断单元60中的运放的个数。如图5所示,此时,欠压判断单元60中也可只包括一个欠压判断子单元604,该欠压判断子单元604包括一个运放,该运放由所述直流电源单元10供电,用于将所述第一信号隔离、取或单元90输出的采样电压信号与系统提供的欠压参考信号进行比较,在所述第一信号隔离、取或单元90输出的采样电压信号低于所述欠压参考信号时,输出表示欠压信号的高电平。其中,欠压参考信号可利用分压电阻对所述直流电源单元10进行分压后产生。具体实现时,也可用其它能够实现上述比较判断功能的电路代替上述欠压判断子单元604中的运放。Further, in other embodiments of the present invention, the number of operational amplifiers in the undervoltage judging unit 60 can also be reduced on the basis of the system shown in FIG. 4 . As shown in Figure 5, at this time, the undervoltage judging unit 60 may only include one undervoltage judging subunit 604, and the undervoltage judging subunit 604 includes an operational amplifier, which is powered by the DC power supply unit 10 , for comparing the sampling voltage signal output by the first signal isolation, OR unit 90 with the undervoltage reference signal provided by the system, where the sampling voltage signal output by the first signal isolation, OR unit 90 is lower than When the undervoltage reference signal is used, the output indicates a high level of the undervoltage signal. Wherein, the undervoltage reference signal can be generated by dividing the voltage of the DC power supply unit 10 by using a voltage dividing resistor. During specific implementation, other circuits capable of realizing the above-mentioned comparison and judgment function may also be used to replace the operational amplifier in the under-voltage judging subunit 604 .

相应地,所述欠压延时单元70只包括对应所述欠压判断子单元604中的一个欠压延时子单元704,用于对所述欠压判断子单元604的输出进行第二设定时间的延时输出,在所述欠压判断子单元604输出高电平的时间达到所述第一设定时间时,向断路器触发单元80输出表示触发信号的高电平。Correspondingly, the undervoltage delay unit 70 only includes one undervoltage delay subunit 704 corresponding to the undervoltage judgment subunit 604, which is used to perform a second set time on the output of the undervoltage judgment subunit 604 When the delay output of the undervoltage judging subunit 604 reaches the first set time, the high level of the trigger signal is output to the circuit breaker trigger unit 80 .

具体实现时,上述三相电源系统的过压欠压保护系统中的各组成单元及子单元都有多种具体实现形式。In specific implementation, each component unit and subunit in the overvoltage and undervoltage protection system of the above-mentioned three-phase power supply system has various specific implementation forms.

以过压延时子单元和欠压延时子单元为例,其均可以由普通的RC延时电路来实现,也可以由带MOS管的RC延时控制电路来实现。Taking the over-voltage delay sub-unit and the under-voltage delay sub-unit as examples, both of them can be realized by an ordinary RC delay circuit, or by an RC delay control circuit with a MOS transistor.

图6示出了一种带MOS管的RC延时控制电路的延时子单元的结构示意图。图6中,以过压延时子单元504为例。如图6所示,该延时子单元504包括:第一RC延时电路5041、常闭的可控开关K和MOS管Q5。其中,第一RC延时电路5041的输入端与过压判断子单元404的输出端相连,第一RC延时电路5041的输出端与所述常闭的可控开关K的控制端相连,所述可控开关K的一个连接端与直流电源相连,另一个连接端接地;所述MOS管Q5的控制端,即栅极与过压判断子单元404的输出端相连,漏极与直流电源相连,源极接地。第一RC延时电路5041用于对所述过压判断子单元404的输出进行延时,在达到预定的延时时间时,控制常闭的可控开关K断开,直流电源接入MOS管Q5的漏极。FIG. 6 shows a schematic structural diagram of a delay subunit of an RC delay control circuit with a MOS transistor. In FIG. 6 , the overvoltage delay subunit 504 is taken as an example. As shown in FIG. 6 , the delay subunit 504 includes: a first RC delay circuit 5041 , a normally closed controllable switch K and a MOS transistor Q5 . Wherein, the input terminal of the first RC delay circuit 5041 is connected to the output terminal of the overvoltage judging subunit 404, and the output terminal of the first RC delay circuit 5041 is connected to the control terminal of the normally closed controllable switch K, so One connection terminal of the controllable switch K is connected to the DC power supply, and the other connection terminal is grounded; the control terminal of the MOS transistor Q5, that is, the gate is connected to the output terminal of the overvoltage judging subunit 404, and the drain is connected to the DC power supply. , source to ground. The first RC delay circuit 5041 is used to delay the output of the overvoltage judging subunit 404. When the predetermined delay time is reached, the normally closed controllable switch K is turned off, and the DC power is connected to the MOS tube Drain of Q5.

具体实现时,第一RC延时电路5041可由两级带三极管的RC延时子电路及稳压管实现,常闭的可孔开关K可由两个联动控制的三极管实现。此外,还可以有其他的具体实现方式,此处不再一一列举。In actual implementation, the first RC delay circuit 5041 can be implemented by two-stage RC delay sub-circuits with triodes and a regulator tube, and the normally closed orifice switch K can be implemented by two linkage-controlled triodes. In addition, there may be other specific implementation manners, which will not be listed one by one here.

下面列举一个示例对其一种具体实现进行描述。图7为对应图4所示实施例的一个示例中的三相电源系统的过压欠压保护系统的结构示意图。如图6所示,在三相电源系统Ua、Ub、Uc、N的回路中串联有断路器Sw。An example is given below to describe a specific implementation thereof. FIG. 7 is a schematic structural diagram corresponding to an overvoltage and undervoltage protection system of a three-phase power system in an example of the embodiment shown in FIG. 4 . As shown in Fig. 6, a circuit breaker Sw is connected in series in the loop of the three-phase power supply system Ua, Ub, Uc, N.

本示例中,整流单元20采用的是半波整流,即分别利用二极管D1(即第一相整流子单元)、二极管D2(即第二相整流子单元)和二极管D3(即第三相整流子单元)对三相电源系统的Ua相电压输出、Ub相电压输出和Uc相电压输出进行半波整流。In this example, the rectification unit 20 adopts half-wave rectification, that is, diode D1 (ie, the first phase rectifier subunit), diode D2 (ie, the second phase rectifier subunit) and diode D3 (ie, the third phase rectifier subunit) are used respectively. Unit) performs half-wave rectification on the Ua phase voltage output, Ub phase voltage output and Uc phase voltage output of the three-phase power system.

直流电源单元10包括:二极管D4、串联连接的限压电阻R1、R2、R3、R4和R5、充放电电容C4、稳压管D40、限压电阻R38和稳压管D41。其中,二极管D4的正极与整流单元的一相输出端相连,本示例中与二极管D1的负极相连;二极管D4的负极与限压电阻R1相连;限压电阻R5与充放电电容C4的一端相连;充放电电容C4的另一端接地;稳压管D40与充放电电容C4并联;限压电阻R38与稳压管D41串联后再与稳压管D40并联。其中,限压电阻R38与稳压管D41的正极相连,稳压管D41的负极接地。稳压管D41的正极为所述直流电源单元10的输出端。具体实现时,限压电阻R1、R2、R3、R4和R5也可以用一个电阻或其它个数的电阻代替。The DC power supply unit 10 includes: a diode D4, voltage limiting resistors R1, R2, R3, R4 and R5 connected in series, a charging and discharging capacitor C4, a voltage regulator D40, a voltage limiting resistor R38 and a voltage regulator D41. Wherein, the anode of the diode D4 is connected to the one-phase output terminal of the rectifier unit, in this example, it is connected to the cathode of the diode D1; the cathode of the diode D4 is connected to the voltage limiting resistor R1; the voltage limiting resistor R5 is connected to one end of the charging and discharging capacitor C4; The other end of the charging and discharging capacitor C4 is grounded; the regulator tube D40 is connected in parallel with the charging and discharging capacitor C4; the voltage limiting resistor R38 is connected in series with the regulator tube D41 and then connected in parallel with the regulator tube D40. Wherein, the voltage-limiting resistor R38 is connected to the positive pole of the voltage stabilizing transistor D41, and the negative pole of the voltage stabilizing transistor D41 is grounded. The anode of the regulator tube D41 is the output end of the DC power supply unit 10 . During specific implementation, the voltage limiting resistors R1, R2, R3, R4 and R5 may also be replaced by one resistor or other numbers of resistors.

采样单元30包括三个采样子单元,本示例中,第一相采样子单元301用于采集Ua相的电压输出,并输出对应的采样电压信号。其具体包括:串联连接的分压电阻R6、R7和R8、分压电阻R15、二极管D5、充放电电容C1和充放电电阻R18。其中,分压电阻R6与整流单元20的一相输出相连,本示例中与二极管D1的负极相连;分压电阻R8与分压电阻R15的一端以及二极管D5的正极相连;分压电阻R15的另一端接地;二极管D5的负极与充放电电容C1的一端相连;充放电电容C1的另一端接地;充放电电阻R18与充放电电容C1并联;充放电电阻R18的非接地端为所述第一相采用子单元301的输出端。第二相采样子单元302用于采集Ub相的电压输出,并输出对应的采样电压信号。其具体包括:串联连接的分压电阻R9、R10和R11、分压电阻R16、二极管D6、充放电电容C2和充放电电阻R19。其中,分压电阻R9与整流单元20的一相输出相连,本示例中与二极管D2的负极相连;分压电阻R11与分压电阻R16的一端以及二极管D6的正极相连;分压电阻R16的另一端接地;二极管D6的负极与充放电电容C2的一端相连;充放电电容C2的另一端接地;充放电电阻R19与充放电电容C2并联;充放电电阻R19的非接地端为所述第二相采用子单元302的输出端。第三相采样子单元303用于采集Uc相的电压输出,并输出对应的采样电压信号。其具体包括:串联连接的分压电阻R12、R13和R14、分压电阻R17、二极管D7、充放电电容C3和充放电电阻R20。其中,分压电阻R12与整流单元20的一相输出相连,本示例中与二极管D3的负极相连;分压电阻R14与分压电阻R17的一端以及二极管D7的正极相连;分压电阻R17的另一端接地;二极管D7的负极与充放电电容C3的一端相连;充放电电容C3的另一端接地;充放电电阻R20与充放电电容C3并联;充放电电阻R20的非接地端为所述第三相采用子单元303的输出端。The sampling unit 30 includes three sampling subunits. In this example, the first phase sampling subunit 301 is used to collect the voltage output of the Ua phase and output a corresponding sampling voltage signal. It specifically includes: voltage dividing resistors R6, R7 and R8 connected in series, voltage dividing resistor R15, diode D5, charging and discharging capacitor C1 and charging and discharging resistor R18. Wherein, the voltage dividing resistor R6 is connected to one phase output of the rectifier unit 20, and in this example is connected to the cathode of the diode D1; the voltage dividing resistor R8 is connected to one end of the voltage dividing resistor R15 and the anode of the diode D5; the other end of the voltage dividing resistor R15 One end is grounded; the negative pole of the diode D5 is connected to one end of the charge and discharge capacitor C1; the other end of the charge and discharge capacitor C1 is grounded; the charge and discharge resistor R18 is connected in parallel with the charge and discharge capacitor C1; the non-ground end of the charge and discharge resistor R18 is the first phase The output of subunit 301 is used. The second phase sampling subunit 302 is used to collect the voltage output of the Ub phase and output a corresponding sampled voltage signal. It specifically includes: voltage dividing resistors R9, R10 and R11 connected in series, voltage dividing resistor R16, diode D6, charging and discharging capacitor C2 and charging and discharging resistor R19. Wherein, the voltage dividing resistor R9 is connected to one phase output of the rectifier unit 20, and in this example is connected to the cathode of the diode D2; the voltage dividing resistor R11 is connected to one end of the voltage dividing resistor R16 and the anode of the diode D6; the other end of the voltage dividing resistor R16 One end is grounded; the negative pole of the diode D6 is connected to one end of the charge and discharge capacitor C2; the other end of the charge and discharge capacitor C2 is grounded; the charge and discharge resistor R19 is connected in parallel with the charge and discharge capacitor C2; the non-ground end of the charge and discharge resistor R19 is the second phase The output of subunit 302 is used. The third phase sampling subunit 303 is used to collect the voltage output of the Uc phase and output a corresponding sampled voltage signal. It specifically includes: voltage dividing resistors R12, R13 and R14 connected in series, voltage dividing resistor R17, diode D7, charging and discharging capacitor C3 and charging and discharging resistor R20. Wherein, the voltage dividing resistor R12 is connected with one phase output of the rectifying unit 20, and in this example is connected with the cathode of the diode D3; the voltage dividing resistor R14 is connected with one end of the voltage dividing resistor R17 and the anode of the diode D7; the other end of the voltage dividing resistor R17 One end is grounded; the negative pole of the diode D7 is connected to one end of the charge and discharge capacitor C3; the other end of the charge and discharge capacitor C3 is grounded; the charge and discharge resistor R20 is connected in parallel with the charge and discharge capacitor C3; the non-ground end of the charge and discharge resistor R20 is the third phase The output of subunit 303 is used.

本实用新型中通过在直流电压单元以及采用单元中采用多个子电阻组成一个分压电阻,可以充分利用有限的狭窄空间,并且降低系统功耗,实现更好的散热面积。In the utility model, by using multiple sub-resistors in the DC voltage unit and the adopting unit to form a voltage dividing resistor, the limited narrow space can be fully utilized, the power consumption of the system can be reduced, and a better heat dissipation area can be realized.

欠压参考信号由分压电阻R21和分压电阻R22对直流电压单元10的输出进行分压后得到,即串联后的分压电阻R21与分压电阻R22,一端与直流电压单元10的输出端相连,另一端接地。分压电阻R21与分压电阻R22之间的连接点为欠压参考信号。即分压电阻R22的非接地端为欠压参考信号。The undervoltage reference signal is obtained by dividing the output of the DC voltage unit 10 by the voltage dividing resistor R21 and the voltage dividing resistor R22, that is, the voltage dividing resistor R21 and the voltage dividing resistor R22 connected in series, one end of which is connected to the output end of the DC voltage unit 10 connected, and the other end is grounded. The connection point between the voltage dividing resistor R21 and the voltage dividing resistor R22 is an undervoltage reference signal. That is, the non-ground terminal of the voltage dividing resistor R22 is the undervoltage reference signal.

欠压判断单元60包括三个欠压判断子单元,第一欠压判断子单元601包括一个运放U1A,该运放U1A由直流电压单元10供电,即运放U1A的电源端与稳压管D41的正极相连,运放U1A的负电源端接地,运放U1A用于利用欠压参考信号对Ua相的采样电压信号进行欠压判断。具体地,运放U1A的反向输入端接收Ua相的采样电压信号、正向输入端接收欠压参考信号,即反向输入端与充放电电阻R18的非接地端相连,正向输入端与分压电阻R22的非接地端相连。第二欠压判断子单元602包括一个运放U1B,该运放U1B由直流电压单元10供电,即运放U1B的电源端与稳压管D41的正极相连,运放U1B的负电源端接地,运放U1B用于利用欠压参考信号对Ub相的采样电压信号进行欠压判断。具体地,运放U1B的反向输入端接收Ub相的采样电压信号、正向输入端接收欠压参考信号,即反向输入端与充放电电阻R19的非接地端相连,正向输入端与分压电阻R22的非接地端相连。第三欠压判断子单元603包括一个运放U1C,该运放U1C由直流电压单元10供电,即运放U1C的电源端与稳压管D41的正极相连,运放U1C的负电源端接地,运放U1C用于利用欠压参考信号对Uc相的采样电压信号进行欠压判断。具体地,运放U1C的反向输入端接收Uc相的采样电压信号、正向输入端接收欠压参考信号,即反向输入端与充放电电阻R20的非接地端相连,正向输入端与分压电阻R22的非接地端相连。The undervoltage judging unit 60 includes three undervoltage judging subunits, the first undervoltage judging subunit 601 includes an operational amplifier U1A, and the operational amplifier U1A is powered by the DC voltage unit 10, that is, the power supply terminal of the operational amplifier U1A and the regulator tube The positive pole of D41 is connected, the negative power terminal of the operational amplifier U1A is grounded, and the operational amplifier U1A is used to judge the undervoltage of the sampling voltage signal of the Ua phase by using the undervoltage reference signal. Specifically, the inverting input terminal of the operational amplifier U1A receives the sampling voltage signal of the Ua phase, and the forward input terminal receives the undervoltage reference signal, that is, the inverting input terminal is connected to the non-ground terminal of the charging and discharging resistor R18, and the forward input terminal is connected to the non-ground terminal of the charging and discharging resistor R18. The non-ground terminals of the voltage dividing resistor R22 are connected. The second undervoltage judging subunit 602 includes an operational amplifier U1B, which is powered by the DC voltage unit 10, that is, the power supply terminal of the operational amplifier U1B is connected to the positive pole of the regulator tube D41, and the negative power supply terminal of the operational amplifier U1B is grounded. The operational amplifier U1B is used to judge the undervoltage of the sampled voltage signal of the Ub phase by using the undervoltage reference signal. Specifically, the inverting input terminal of the operational amplifier U1B receives the sampling voltage signal of the Ub phase, and the forward input terminal receives the undervoltage reference signal, that is, the inverting input terminal is connected to the non-ground terminal of the charging and discharging resistor R19, and the forward input terminal is connected to the non-ground terminal of the charging and discharging resistor R19. The non-ground terminals of the voltage dividing resistor R22 are connected. The third undervoltage judging subunit 603 includes an operational amplifier U1C, which is powered by the DC voltage unit 10, that is, the power supply end of the operational amplifier U1C is connected to the positive pole of the regulator tube D41, and the negative power supply terminal of the operational amplifier U1C is grounded. The operational amplifier U1C is used for judging the undervoltage of the sampled voltage signal of the Uc phase by using the undervoltage reference signal. Specifically, the inverting input terminal of the operational amplifier U1C receives the sampling voltage signal of the Uc phase, and the forward input terminal receives the undervoltage reference signal, that is, the inverting input terminal is connected to the non-ground terminal of the charging and discharging resistor R20, and the forward input terminal is connected to the non-ground terminal of the charging and discharging resistor R20. The non-ground terminals of the voltage dividing resistor R22 are connected.

欠压延时单元70包括三个欠压延时子单元,第一相欠压延时子单元701包括:二极管D11、限压电阻R23、充放电电容C5和充放电电阻R27。其中,二极管D11的正极与对应的运放的输出端相连,本示例中,二极管D11的正极与运放U1A的输出端相连;二极管D11的负极与限压电阻R23的一端相连;限压电阻R23的另一端与充放电电容C5的一端相连;充放电电容C5的另一端接地,充放电电阻R27与充放电电容C5并联;充放电电阻R27的非接地端为所述第一相欠压延时子单元701的输出端。第一相欠压延时子单元702包括:二极管D12、限压电阻R24、充放电电容C5和充放电电阻R28。其中,二极管D12的正极与对应的运放的输出端相连,本示例中,二极管D12的正极与运放U1B的输出端相连;二极管D12的负极与限压电阻R24的一端相连;限压电阻R24的另一端与充放电电容C6的一端相连;充放电电容C6的另一端接地,充放电电阻R28与充放电电容C6并联;充放电电阻R28的非接地端为所述第二相欠压延时子单元702的输出端。第三相欠压延时子单元703包括:二极管D13、限压电阻R25、充放电电容C7和充放电电阻R29。其中,二极管D13的正极与对应的运放的输出端相连,本示例中,二极管D13的正极与运放U1C的输出端相连;二极管D13的负极与限压电阻R25的一端相连;限压电阻R25的另一端与充放电电容C7的一端相连;充放电电容C7的另一端接地,充放电电阻R29与充放电电容C7并联;充放电电阻R29的非接地端为所述第三相欠压延时子单元703的输出端。The undervoltage delay unit 70 includes three undervoltage delay subunits, and the first phase undervoltage delay subunit 701 includes: a diode D11, a voltage limiting resistor R23, a charging and discharging capacitor C5, and a charging and discharging resistor R27. Wherein, the anode of the diode D11 is connected to the output end of the corresponding operational amplifier. In this example, the anode of the diode D11 is connected to the output end of the operational amplifier U1A; the cathode of the diode D11 is connected to one end of the voltage limiting resistor R23; the voltage limiting resistor R23 The other end of the charging and discharging capacitor C5 is connected to one end; the other end of the charging and discharging capacitor C5 is grounded, and the charging and discharging resistor R27 is connected in parallel with the charging and discharging capacitor C5; the non-grounded end of the charging and discharging resistor R27 is the first phase undervoltage delay timer The output of unit 701. The first phase undervoltage delay subunit 702 includes: a diode D12, a voltage limiting resistor R24, a charging and discharging capacitor C5, and a charging and discharging resistor R28. Wherein, the anode of the diode D12 is connected to the output end of the corresponding operational amplifier. In this example, the anode of the diode D12 is connected to the output end of the operational amplifier U1B; the cathode of the diode D12 is connected to one end of the voltage limiting resistor R24; the voltage limiting resistor R24 The other end of the charging and discharging capacitor C6 is connected to one end; the other end of the charging and discharging capacitor C6 is grounded, and the charging and discharging resistor R28 is connected in parallel with the charging and discharging capacitor C6; the non-grounded end of the charging and discharging resistor R28 is the second phase undervoltage delay timer The output of unit 702. The third phase undervoltage delay subunit 703 includes: a diode D13, a voltage limiting resistor R25, a charging and discharging capacitor C7, and a charging and discharging resistor R29. Wherein, the anode of the diode D13 is connected to the output end of the corresponding operational amplifier. In this example, the anode of the diode D13 is connected to the output end of the operational amplifier U1C; the cathode of the diode D13 is connected to one end of the voltage limiting resistor R25; the voltage limiting resistor R25 The other end of the charging and discharging capacitor C7 is connected to one end; the other end of the charging and discharging capacitor C7 is grounded, and the charging and discharging resistor R29 is connected in parallel with the charging and discharging capacitor C7; the non-grounded end of the charging and discharging resistor R29 is the third phase undervoltage delay timer The output of unit 703.

第一信号隔离、取或单元90包括:下拉电阻R26和三个二极管D8、D9和D10,其中,二极管D8的正极与第一相采样子单元301的输出,即R18的非接地端相连;二极管D9的正极与第二相采样子单元302的输出,即R19的非接地端相连;二极管D10的正极与第三相采样子单元303的输出,即R20的非接地端相连;并且二极管D8、D9和D10的负极连接在一起后作为所述第一信号隔离、取或单元90的输出;下拉电阻R26的一端与所述三个二极管D8、D9和D10的负极相连,下拉电阻R26的另一端接地。The first signal isolation, or unit 90 includes: a pull-down resistor R26 and three diodes D8, D9 and D10, wherein the anode of the diode D8 is connected to the output of the first phase sampling subunit 301, that is, the non-ground terminal of R18; The positive pole of D9 is connected with the output of the second phase sampling subunit 302, that is, the non-ground terminal of R19; the positive pole of the diode D10 is connected with the output of the third phase sampling subunit 303, that is, the non-ground terminal of R20; and diodes D8, D9 After being connected with the negative pole of D10, it is used as the output of the first signal isolation and OR unit 90; one end of the pull-down resistor R26 is connected with the negative poles of the three diodes D8, D9 and D10, and the other end of the pull-down resistor R26 is grounded .

过压参考信号由分压电阻R30和分压电阻R31对直流电压单元10的输出进行分压后得到,即串联后的分压电阻R30与分压电阻R31,一端与直流电压单元10的输出端相连,另一端接地。分压电阻R30与分压电阻R31之间的连接点为过压参考信号,即分压电阻R31的非接地端为过压参考信号。The overvoltage reference signal is obtained by dividing the output of the DC voltage unit 10 by the voltage dividing resistor R30 and the voltage dividing resistor R31, that is, the voltage dividing resistor R30 and the voltage dividing resistor R31 connected in series, one end of which is connected to the output terminal of the DC voltage unit 10 connected, and the other end is grounded. The connection point between the voltage dividing resistor R30 and the voltage dividing resistor R31 is the overvoltage reference signal, that is, the non-ground terminal of the voltage dividing resistor R31 is the overvoltage reference signal.

过压判断单元40仅包括一个过压判断子单元404,该过压判断子单元404由一个运放U1D组成,该运放U1D由直流电压单元10供电,即运放U1D的电源端与稳压管D41的正极相连,运放U1D的负电源端接地,运放U1D用于利用过压参考信号对第一信号隔离、取或单元90输出的采样电压信号进行过压判断。具体地,运放U1D的正向输入端接收第一信号隔离、取或单元90输出的采样电压信号、反向输入端接收过压参考信号,即正向输入端与三个二极管D8、D9和D10的负极相连,反向输入端与分压电阻R31的非接地端相连。The overvoltage judging unit 40 only includes an overvoltage judging subunit 404. The overvoltage judging subunit 404 is composed of an operational amplifier U1D, which is powered by the DC voltage unit 10, that is, the power supply terminal of the operational amplifier U1D is connected to the voltage regulator The anode of the tube D41 is connected, and the negative power supply terminal of the operational amplifier U1D is grounded. The operational amplifier U1D is used to judge the overvoltage of the sampling voltage signal output by the first signal isolation and OR unit 90 by using the overvoltage reference signal. Specifically, the forward input terminal of the operational amplifier U1D receives the sampling voltage signal output by the first signal isolation and OR unit 90, and the negative input terminal receives the overvoltage reference signal, that is, the forward input terminal is connected to the three diodes D8, D9 and The negative pole of D10 is connected, and the reverse input terminal is connected with the non-ground terminal of the voltage dividing resistor R31.

过压延时单元50仅包括一个过压延时子单元504,该过压延时子单元504包括:三极管Q1、充放电电容C8、限压电阻R33、三极管Q2、限压电阻R35、充放电电容C9、充放电电阻R34、二极管D17、稳压管D42、三极管Q3、限压电阻R37、三极管Q4、限压电阻R36和MOS管Q5。其中,三极管Q1的基极与对应的运放的输出端相连,本示例中,与运放U1D的输出端相连,三极管Q1的集电极与直流电源单元10的输出端相连,即与稳压管D41的正极相连;三极管Q1的发射极与充放电电容C8的一端相连;充放电电容C8的另一端接地;三限压电阻R33的一端与三极管Q1的发射极相连、另一端与三极管Q2的基极相连;三极管Q2的集电极与限压电阻R35的一端相连、发射极与充放电电容C9的一端相连;限压电阻R35的另一端与所述直流电源单元10的输出端相连,即与稳压管D41的正极相连;充放电电容C9的另一端接地;充放电电阻R34与充放电电容C9并联;二极管D17的正极与所述充放电电阻R34的非接地端相连、负极与稳压管D42的正极相连;所述稳压管D42的负极与所述三极管Q3的基极相连;所述三极管Q3的发射极接地、集电极与三极管Q4的基极以及限压电阻R37的一端相连;所述限压电阻R37的另一端与所述直流电源单元10的输出端相连,即与稳压管D41的正极相连;三极管Q4的发射极接地、集电极与限压电阻R36的一端相连;所述限压电阻R36的另一端与直流电源单元10的输出端相连,即与稳压管D41的正极相连;MOS管Q5的栅极与所述过压判断子单元404的输出端,即运放U1D的输出端相连、漏极与所述三极管Q4的集电极相连,源极为所述过压延时子单元504的输出端。The overvoltage delay unit 50 includes only one overvoltage delay subunit 504, and the overvoltage delay subunit 504 includes: a triode Q1, a charging and discharging capacitor C8, a voltage limiting resistor R33, a triode Q2, a voltage limiting resistor R35, a charging and discharging capacitor C9, Charge and discharge resistor R34, diode D17, regulator tube D42, triode Q3, voltage limiting resistor R37, triode Q4, voltage limiting resistor R36 and MOS tube Q5. Wherein, the base of the transistor Q1 is connected to the output terminal of the corresponding operational amplifier. In this example, it is connected to the output terminal of the operational amplifier U1D, and the collector of the transistor Q1 is connected to the output terminal of the DC power supply unit 10, that is, the voltage regulator The positive pole of D41 is connected; the emitter of the triode Q1 is connected with one end of the charging and discharging capacitor C8; the other end of the charging and discharging capacitor C8 is grounded; one end of the three-voltage limiting resistor R33 is connected with the emitter of the triode Q1, and the other end is connected with the base of the triode Q2 The collector of the transistor Q2 is connected to one end of the voltage limiting resistor R35, and the emitter is connected to one end of the charging and discharging capacitor C9; the other end of the voltage limiting resistor R35 is connected to the output end of the DC power supply unit 10, that is, to the stable The positive pole of the pressure tube D41 is connected; the other end of the charging and discharging capacitor C9 is grounded; the charging and discharging resistor R34 is connected in parallel with the charging and discharging capacitor C9; the positive pole of the diode D17 is connected to the non-grounded end of the charging and discharging resistor R34, and the negative pole is connected to the regulator tube D42 The anode of the voltage regulator tube D42 is connected to the base of the transistor Q3; the emitter of the transistor Q3 is grounded, the collector is connected to the base of the transistor Q4 and one end of the voltage limiting resistor R37; The other end of the voltage limiting resistor R37 is connected to the output end of the DC power supply unit 10, that is, connected to the positive pole of the voltage regulator tube D41; the emitter of the transistor Q4 is grounded, and the collector is connected to one end of the voltage limiting resistor R36; The other end of the piezoresistor R36 is connected to the output end of the DC power supply unit 10, that is, to the anode of the regulator tube D41; the gate of the MOS transistor Q5 is connected to the output end of the overvoltage judging sub-unit 404, that is, the output end of the operational amplifier U1D The output end is connected, the drain is connected to the collector of the transistor Q4 , and the source is the output end of the overvoltage delay sub-unit 504 .

第二信号隔离、取或单元100包括下拉电阻R32和与所述欠压延时单元70和所述过压延时单元50的输出的数量相一致的多个二极管,本示例中,欠压延时单元70的输出有三个,过压延时单元50的输出有一个,因此第二信号隔离、取或单元100中的二极管共有四个,即二极管D14、D15、D16和D18。其中,二极管D14的正极与第一相欠压延时子单元701的输出相连,即与R27的非接地端相连;二极管D15的正极与第二相欠压延时子单元702的输出相连,即与R25的非接地端相连;二极管D16的正极与第三相欠压延时子单元703的输出相连,即与R29的非接地端相连;二极管D18的正极与过压延时子单元504的输出相连,即与MOS管的源极相连;并且二极管D14、D15、D16和D18的负极连接在一起后作为所述第二信号隔离、取或单元100的输出;下拉电阻R32的一端与所述四个二极管D14、D15、D16和D18的负极相连,下拉电阻R32的另一端接地。The second signal isolation, OR unit 100 includes a pull-down resistor R32 and a plurality of diodes consistent with the output of the undervoltage delay unit 70 and the overvoltage delay unit 50. In this example, the undervoltage delay unit 70 There are three outputs and one output of the overvoltage delay unit 50, so there are four diodes in the second signal isolation and OR unit 100, namely diodes D14, D15, D16 and D18. Wherein, the anode of the diode D14 is connected to the output of the first phase undervoltage delay subunit 701, that is, connected to the non-ground terminal of R27; the anode of the diode D15 is connected to the output of the second phase undervoltage delay subunit 702, that is, to the R25 The non-ground terminal of the diode D16 is connected with the output of the third-phase undervoltage delay subunit 703, that is, connected with the non-ground terminal of R29; the positive pole of the diode D18 is connected with the output of the overvoltage delay subunit 504, that is, with The source of the MOS tube is connected; and the negative poles of the diodes D14, D15, D16 and D18 are connected together as the output of the second signal isolation, or unit 100; one end of the pull-down resistor R32 is connected to the four diodes D14, The negative poles of D15, D16 and D18 are connected, and the other end of the pull-down resistor R32 is grounded.

本示例中的断路器触发单元80为稳压管导通触发单元804,其包括:稳压管D43、可控硅U1和第一电容C10。其中,稳压管D43的正极与所述第二信号隔离、取或单元100的输出端相连,即与四个二极管D14、D15、D16和D18的负极相连;稳压管D43的负极与所述可控硅U1的门极相连,所述可控硅U1的一个主端子与三相电源系统回路中的断路器线圈Coil相连、另一个主端子接地,所述电容C10的一端与所述稳压管D43的负极相连、另一端接地。The circuit breaker trigger unit 80 in this example is a voltage regulator conduction trigger unit 804, which includes: a voltage regulator transistor D43, a thyristor U1 and a first capacitor C10. Wherein, the anode of the regulator tube D43 is connected to the output end of the second signal isolation, OR unit 100, that is, connected to the cathodes of the four diodes D14, D15, D16 and D18; the cathode of the regulator tube D43 is connected to the The gate of the thyristor U1 is connected, one main terminal of the thyristor U1 is connected to the circuit breaker coil Coil in the three-phase power system circuit, and the other main terminal is grounded, and one end of the capacitor C10 is connected to the voltage regulator The negative pole of the tube D43 is connected, and the other end is grounded.

在本实用新型的其它示例中,欠压延时子单元701、702和703可以采用图7所示的过压延时子单元504的内部结构;同样,过压延时子单元504也可以采用图7所示的欠压延时子单元701、702和703的内部结构。并且,第一相欠压延时子单元701、第二相欠压延时子单元702和第三相欠压延时子单元703可具有相同的内部结构,也可具有不同的内部结构。In other examples of the present utility model, the undervoltage delay subunit 701, 702 and 703 can adopt the internal structure of the overvoltage delay subunit 504 shown in FIG. 7; The internal structures of the undervoltage delay subunits 701, 702 and 703 are shown. Moreover, the first phase undervoltage subunit 701 , the second phase undervoltage subunit 702 and the third phase undervoltage subunit 703 may have the same internal structure, or may have different internal structures.

此外,本实用新型中还给出了又一种欠压延时子单元701、702、703和过压延时子单元504可选的内部结构实现方式,如图8所示,图8中以过压延时子单元为例,其可包括:二极管D19、限压电阻R39、充放电电容C11、充放电电阻R40、稳压管D44和MOS管Q6。其中,二极管D19的正极与对应的运放U1D的输出端相连,二极管D19的负极与限压电阻R39的一端相连;限压电阻R39的另一端与所述充放电电容C11的一端相连;充放电电容C11的另一端接地;充放电电阻R40与充放电电容C11并联;稳压管D44的正极与充放电电阻R40的非接地端相连,稳压管D44的负极与MOS管Q6的栅极相连;MOS管Q6的漏极与所述二极管D19的正极相连,源极为所述过压延时子单元504的输出端。In addition, this utility model also provides another optional internal structure implementation of the undervoltage delay subunit 701, 702, 703 and overvoltage delay subunit 504, as shown in Figure 8, in Figure 8, the overvoltage delay subunit Taking the time sub-unit as an example, it may include: a diode D19, a voltage limiting resistor R39, a charging and discharging capacitor C11, a charging and discharging resistor R40, a voltage regulator tube D44 and a MOS tube Q6. Wherein, the anode of the diode D19 is connected to the output terminal of the corresponding operational amplifier U1D, the cathode of the diode D19 is connected to one end of the voltage limiting resistor R39; the other end of the voltage limiting resistor R39 is connected to one end of the charging and discharging capacitor C11; the charging and discharging The other end of the capacitor C11 is grounded; the charge and discharge resistor R40 is connected in parallel with the charge and discharge capacitor C11; the positive pole of the voltage regulator tube D44 is connected to the non-ground end of the charge and discharge resistor R40, and the negative pole of the voltage regulator tube D44 is connected to the gate of the MOS transistor Q6; The drain of the MOS transistor Q6 is connected to the anode of the diode D19 , and the source is the output terminal of the overvoltage delay sub-unit 504 .

此外,欠压延时子单元704同样可具有上述任一具体实现形式的内部结构。In addition, the undervoltage delay subunit 704 may also have an internal structure of any of the above-mentioned specific implementation forms.

本实用新型中通过在欠压延时单元和过压延时单元中采用带有MOS管的延时电路,可以实现延时输出与运放输出的与逻辑,从而避免误操作的产生。In the utility model, by using a delay circuit with a MOS tube in the undervoltage delay unit and the overvoltage delay unit, the AND logic of the delay output and the output of the operational amplifier can be realized, thereby avoiding the occurrence of misoperation.

以上所述仅为本实用新型的较佳实施例而已,并不用以限制本实用新型,凡在本实用新型的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本实用新型的保护范围之内。The above descriptions are only preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present utility model shall be included in the Within the protection scope of the present utility model.

Claims (11)

1.一种用于三相电源系统的过压欠压保护系统,所述过压欠压保护系统可产生一欠压参考信号和一过压参考信号;其特征在于,包括整流单元(20)、采样单元(30)、欠压判断单元(60)、欠压延时单元(70)、第一信号隔离、取或单元(90)、过压判断单元(40)、过压延时单元(50)和断路器触发单元(80),其中:1. An overvoltage and undervoltage protection system for a three-phase power supply system, the overvoltage and undervoltage protection system can generate an undervoltage reference signal and an overvoltage reference signal; it is characterized in that it includes a rectification unit (20) , sampling unit (30), undervoltage judgment unit (60), undervoltage delay unit (70), first signal isolation, OR unit (90), overvoltage judgment unit (40), overvoltage delay unit (50) and a circuit breaker trigger unit (80), wherein: 所述整流单元(20)用于将所述三相电源系统的每一相电压输出由交流转换为直流后输出;The rectification unit (20) is used to convert the voltage output of each phase of the three-phase power system from AC to DC for output; 所述采样单元(30)用于对经所述整流单元(20)整流后的三相电源系统的每一相电压输出分别进行采样,并输出对应每一相电压输出的采样电压信号;The sampling unit (30) is used to sample each phase voltage output of the three-phase power system rectified by the rectification unit (20), and output a sampling voltage signal corresponding to each phase voltage output; 所述欠压判断单元(60)用于将当前输入的一相采样电压信号与所述欠压参考信号进行比较,并在当前输入的采样电压信号低于所述欠压参考信号时,输出欠压信号;The undervoltage judging unit (60) is used to compare the currently input one-phase sampling voltage signal with the undervoltage reference signal, and output an undervoltage signal when the currently input sampling voltage signal is lower than the undervoltage reference signal. Pressure signal; 所述欠压延时单元(70)用于在所述欠压判断单元(60)输出欠压信号的时间达到一第二设定时间时,向断路器触发单元(80)输出触发信号;The undervoltage delay unit (70) is used to output a trigger signal to the circuit breaker trigger unit (80) when the time for the undervoltage judging unit (60) to output the undervoltage signal reaches a second set time; 所述第一信号隔离、取或单元(90)用于对所述采样单元(30)得到的对应每一相电压输出的采样电压信号分别进行隔离,并输出其中电压值最高的采样电压信号;The first signal isolation and OR unit (90) is used to isolate the sampling voltage signal corresponding to each phase voltage output obtained by the sampling unit (30), and output the sampling voltage signal with the highest voltage value among them; 所述过压判断单元(40)用于将所述第一信号隔离、取或单元(90)输出的采样电压信号与所述过压参考信号进行比较,在所述第一信号隔离、取或单元(90)输出的采样电压信号高于所述过压参考信号时,输出过压信号;The overvoltage judging unit (40) is used to compare the sampling voltage signal output by the first signal isolation and OR unit (90) with the overvoltage reference signal, and when the first signal isolation, OR When the sampling voltage signal output by the unit (90) is higher than the overvoltage reference signal, an overvoltage signal is output; 所述过压延时单元(50)用于在所述过压判断单元(40)输出过压信号的时间达到一第一设定时间时,向断路器触发单元(80)输出触发信号;The overvoltage delay unit (50) is used to output a trigger signal to the circuit breaker trigger unit (80) when the time for the overvoltage judging unit (40) to output the overvoltage signal reaches a first set time; 所述断路器触发单元(80)用于在接收到所述欠压延时单元(70)或者所述过压延时单元(50)输出的触发信号时,触发所述三相电源系统回路中的断路器线圈导通,使断路器断开。The circuit breaker trigger unit (80) is used to trigger the disconnection in the three-phase power system loop when receiving the trigger signal output by the undervoltage delay unit (70) or the overvoltage delay unit (50) The coil of the circuit breaker is turned on and the circuit breaker is opened. 2.根据权利要求1所述的系统,其特征在于,所述第一信号隔离、取或单元(90)包括:第一下拉电阻(R26)和三个第一二极管(D8、D9、D10),每个第一二极管(D8,D9,D10)的正极与采样单元(30)的一相输出端相连、负极连接在一起后作为所述第一信号、隔离取或单元(90)的输出;所述第一下拉电阻(R26)的一端与所述三个第一二极管(D8、D9、D10)的负极相连、另一端接地。2. The system according to claim 1, characterized in that, said first signal isolation, OR unit (90) comprises: a first pull-down resistor (R26) and three first diodes (D8, D9 , D10), the anode of each first diode (D8, D9, D10) is connected to the one-phase output terminal of the sampling unit (30), and the cathodes are connected together as the first signal, isolated OR unit ( 90) output; one end of the first pull-down resistor (R26) is connected to the cathodes of the three first diodes (D8, D9, D10), and the other end is grounded. 3.根据权利要求1所述的系统,其特征在于,所述系统进一步包括:第二信号隔离、取或单元(100),用于对所述欠压延时单元(70)和所述过压延时单元(50)的输出分别进行隔离并集中到一点,在其中的任一输出为触发信号时,将触发信号输出给所述断路器触发单元(80);3. The system according to claim 1, characterized in that, the system further comprises: a second signal isolation, OR unit (100), used for the under-voltage delay unit (70) and the over-delay The outputs of the time unit (50) are respectively isolated and concentrated to one point, and when any one of the outputs is a trigger signal, the trigger signal is output to the circuit breaker trigger unit (80); 所述断路器触发单元(80)包括:第一稳压管(D43)、可控硅(U1)和第一电容(C10);所述第一稳压管(D43)的正极与所述第二信号隔离、取或单元(100)的输出端相连、负极与所述可控硅(UI)的门极相连,所述可控硅(UI)的一个主端子与三相电源系统回路中的断路器线圈相连、另一个主端子接地,所述第一电容(C10)的一端与所述第一稳压管(D43)的负极相连、另一端接地。The circuit breaker trigger unit (80) includes: a first voltage regulator transistor (D43), a thyristor (U1) and a first capacitor (C10); the anode of the first voltage regulator transistor (D43) is connected to the second Two signal isolation, the output terminal of the OR unit (100) is connected, the negative pole is connected with the gate of the silicon controlled rectifier (UI), and one main terminal of the silicon controlled rectifier (UI) is connected with the three-phase power system loop The circuit breaker coil is connected, the other main terminal is grounded, one end of the first capacitor (C10) is connected to the negative pole of the first voltage regulator tube (D43), and the other end is grounded. 4.根据权利要求3所述的系统,其特征在于,所述第二信号隔离、取或单元(100)包括:第二下拉电阻(R32)和与所述欠压延时单元(70)和所述过压延时单元(50)的输出的数量相一致的复数个第二二极管(D14、D15、D16、D18),各个第二二极管(D14,D15,D16,D18)的正极与其对应的欠压延时单元(70)或过压延时单元(50)的输出端相连、负极连接在一起后作为所述第二信号隔离、取或单元(100)的输出端与断路器触发单元(80)的输入端相连;所述第二下拉电阻(R32)的一端与所述复数个第二二极管(D14、D15、D16、D18)连接在一起的负极相连、另一端接地。4. The system according to claim 3, characterized in that, the second signal isolation, OR unit (100) comprises: a second pull-down resistor (R32) and the undervoltage delay unit (70) and the A plurality of second diodes (D14, D15, D16, D18) consistent with the output quantity of the overvoltage delay unit (50), the anode of each second diode (D14, D15, D16, D18) and its The output terminals of the corresponding undervoltage delay unit (70) or overvoltage delay unit (50) are connected, and the negative poles are connected together as the output terminal of the second signal isolation, OR unit (100) and the circuit breaker trigger unit ( 80) connected to the input; one end of the second pull-down resistor (R32) is connected to the cathodes of the plurality of second diodes (D14, D15, D16, D18), and the other end is grounded. 5.根据权利要求1所述的系统,其特征在于,所述欠压判断单元(60)包括:三个欠压判断子单元(601、602、603),每个欠压判断子单元(601,602,603)分别用于将采样单元(60)输出的一相采样电压信号与所述欠压参考信号进行比较,在该相采样电压信号低于所述欠压参考信号时,输出对应该相的欠压信号;5. The system according to claim 1, characterized in that the undervoltage judging unit (60) comprises: three undervoltage judging subunits (601, 602, 603), each undervoltage judging subunit (601 , 602, 603) are respectively used to compare the one-phase sampling voltage signal output by the sampling unit (60) with the undervoltage reference signal, and when the phase sampling voltage signal is lower than the undervoltage reference signal, output the corresponding Phase undervoltage signal; 所述欠压延时单元(70)包括:三个欠压延时子单元(701、702、703),每个欠压延时子单元(701,702,703)对应一个欠压判断子单元(601,602,603)的输出。The undervoltage delay unit (70) includes: three undervoltage delay subunits (701, 702, 703), each undervoltage delay subunit (701, 702, 703) corresponds to an undervoltage judgment subunit (601, 602, 603) output. 6.根据权利要求1所述的系统,其特征在于,所述欠压判断单元(60)包括:一个欠压判断子单元(604),用于将所述第一信号隔离、取或单元(90)输出的采样电压信号与所述欠压参考信号进行比较,在所述第一信号隔离、取或单元(90)输出的采样电压信号低于所述欠压参考信号时,输出欠压信号;6. The system according to claim 1, characterized in that the undervoltage judging unit (60) comprises: an undervoltage judging subunit (604) for isolating the first signal, taking an OR unit ( 90) compare the output sampling voltage signal with the undervoltage reference signal, and output the undervoltage signal when the sampling voltage signal output by the first signal isolation and OR unit (90) is lower than the undervoltage reference signal ; 所述欠压延时单元(70)包括:对应所述欠压判断子单元(604)的一个欠压延时子单元(704)。The undervoltage delay unit (70) includes: an undervoltage delay subunit (704) corresponding to the undervoltage judgment subunit (604). 7.根据权利要求1至6中任一项所述的系统,其特征在于,所述过压延时单元(50)为RC延时电路,或者为带MOS管的RC延时控制电路;7. The system according to any one of claims 1 to 6, characterized in that, the overvoltage delay unit (50) is an RC delay circuit, or an RC delay control circuit with a MOS tube; 所述欠压延时单元(70)为RC延时电路,或者为带MOS管的RC延时控制电路。The undervoltage delay unit (70) is an RC delay circuit, or an RC delay control circuit with a MOS tube. 8.根据权利要求7所述的系统,其特征在于,所述带MOS管的RC延时控制电路包括:8. The system according to claim 7, wherein the RC delay control circuit with a MOS tube comprises: 第四二极管(D19)、第二限压电阻(R39)、第二充放电电容(C11)、第二充放电电阻(R40)、第二稳压管(D44)和第一MOS管(Q6);所述第四二极管(D19)的正极与对应的过压判断单元(40)或欠压判断单元(60)的输出端相连、负极与所述第二限压电阻(R39)的一端相连;所述第二限压电阻(R39)的另一端与所述第二充放电电容(C11)的一端相连;所述第二充放电电容(C11)的另一端接地,所述第二充放电电阻(R40)与所述第二充放电电容(C11)并联;所述第二稳压管(D44)的正极与所述第一充放电电阻(R40)的非接地端相连、负极与所述第一MOS管(Q6)的栅极相连;所述第一MOS管(Q6)的漏极与所述第四二极管(D19)的正极相连,源极为所述过压延时单元(50)或欠压延时单元(70)的输出端;The fourth diode (D19), the second voltage limiting resistor (R39), the second charging and discharging capacitor (C11), the second charging and discharging resistor (R40), the second voltage regulator tube (D44) and the first MOS tube ( Q6); the anode of the fourth diode (D19) is connected to the output terminal of the corresponding overvoltage judgment unit (40) or undervoltage judgment unit (60), and the cathode is connected to the second voltage limiting resistor (R39) The other end of the second voltage limiting resistor (R39) is connected to one end of the second charging and discharging capacitor (C11); the other end of the second charging and discharging capacitor (C11) is grounded, and the first Two charging and discharging resistors (R40) are connected in parallel with the second charging and discharging capacitor (C11); Connected to the gate of the first MOS transistor (Q6); the drain of the first MOS transistor (Q6) is connected to the anode of the fourth diode (D19), and the source is the overvoltage delay unit (50) or the output terminal of undervoltage delay unit (70); 或者,所述带MOS管的RC延时控制电路包括:第一RC延时电路(5041)、可控开关(K)和第二MOS管(Q5);Alternatively, the RC delay control circuit with a MOS tube includes: a first RC delay circuit (5041), a controllable switch (K) and a second MOS tube (Q5); 所述第一RC延时电路(5041)的输入端与对应的过压判断单元(40)或欠压判断单元(60)的输出端相连,所述第一RC延时电路(5041)的输出端与所述可控开关(K)的控制端相连,所述可控开关(K)的一个连接端与直流电源相连,另一个连接端接地;所述MOS管(Q5)的控制端与欠压判断单元(60)或过压判断单元(40)的输出端相连,漏极与直流电源相连,源极为所述过压延时单元(50)或欠压延时单元(70)的输出端。The input end of the first RC delay circuit (5041) is connected to the output end of the corresponding overvoltage judgment unit (40) or undervoltage judgment unit (60), and the output of the first RC delay circuit (5041) terminal is connected to the control terminal of the controllable switch (K), one connection terminal of the controllable switch (K) is connected to the DC power supply, and the other connection terminal is grounded; the control terminal of the MOS transistor (Q5) is connected to the The output terminal of the voltage judging unit (60) or the overvoltage judging unit (40) is connected, the drain is connected with the DC power supply, and the source is the output terminal of the overvoltage delay unit (50) or the undervoltage delay unit (70). 9.根据权利要求8所述的系统,其特征在于,所述第一RC延时电路(5041)包括:第一三极管(Q1)、第三充放电电容(C8)、第三限压电阻(R33)、第二三极管(Q2)、第四限压电阻(R35)、第四充放电电容(C9)、第三充放电电阻(R34)、第五二极管(D17)和第二稳压管(D42);所述第一三极管(Q1)的基极与对应的过压判断单元(40)或欠压判断单元(60)的输出端相连、集电极与直流电源相连、发射极与第三充放电电容(C8)的一端相连;所述第三充放电电容(C8)的另一端接地;所述第三限压电阻(R33)的一端与所述第一三极管(Q1)的发射极相连、另一端与第二三极管(Q2)的基极相连;所述第二三极管(Q2)的集电极与第四限压电阻(R35)的一端相连、发射极与第四充放电电容(C9)的一端相连;所述第四限压电阻(R35)的另一端与直流电源相连;所述第四充放电电容(C9)的另一端接地;所述第三充放电电阻(R34)与所述第四充放电电容(C9)并联;所述第五二极管(D17)的正极与所述第三充放电电阻(R34)的非接地端相连、负极与所述第二稳压管(D42)的正极相连;所述第二稳压管(D42)的负极为所述第一RC延时电路(5041)的输出端。9. The system according to claim 8, characterized in that the first RC delay circuit (5041) comprises: a first triode (Q1), a third charging and discharging capacitor (C8), a third voltage limiting Resistor (R33), second triode (Q2), fourth voltage limiting resistor (R35), fourth charge and discharge capacitor (C9), third charge and discharge resistor (R34), fifth diode (D17) and The second regulator tube (D42); the base of the first triode (Q1) is connected to the output terminal of the corresponding overvoltage judgment unit (40) or undervoltage judgment unit (60), and the collector is connected to the DC power supply The emitter is connected to one end of the third charging and discharging capacitor (C8); the other end of the third charging and discharging capacitor (C8) is grounded; one end of the third voltage limiting resistor (R33) is connected to the first three The emitter of the transistor (Q1) is connected, and the other end is connected with the base of the second transistor (Q2); the collector of the second transistor (Q2) is connected with one end of the fourth voltage limiting resistor (R35) The emitter is connected to one end of the fourth charging and discharging capacitor (C9); the other end of the fourth voltage limiting resistor (R35) is connected to a DC power supply; the other end of the fourth charging and discharging capacitor (C9) is grounded; The third charging and discharging resistor (R34) is connected in parallel with the fourth charging and discharging capacitor (C9); the anode of the fifth diode (D17) is connected to the non-ground terminal of the third charging and discharging resistor (R34) The negative pole is connected to the positive pole of the second voltage stabilizing tube (D42); the negative pole of the second voltage stabilizing tube (D42) is the output end of the first RC delay circuit (5041). 10.根据权利要求9所述的系统,其特征在于,所述可控开关(K)包括:第三三极管(Q3)、第五限压电阻(R37)、第四三极管(Q4)和第六限压电阻(R36);所述第三三极管(Q3)的基极与所述第一RC延时电路(5041)的输出端相连;所述第三三极管(Q3)的发射极接地、集电极与第四三极管(Q4)的基极以及第五限压电阻(R37)的一端相连;所述第五限压电阻(R37)的另一端与直流电源相连;所述第四三极管(Q4)的发射极接地、集电极与所述第六限压电阻(R36)的一端相连;所述第六限压电阻(R36)的另一端与直流电源相连。10. The system according to claim 9, characterized in that the controllable switch (K) comprises: a third triode (Q3), a fifth voltage limiting resistor (R37), a fourth triode (Q4 ) and the sixth voltage limiting resistor (R36); the base of the third transistor (Q3) is connected to the output terminal of the first RC delay circuit (5041); the third transistor (Q3 )’s emitter is grounded, the collector is connected to the base of the fourth triode (Q4) and one end of the fifth voltage limiting resistor (R37); the other end of the fifth voltage limiting resistor (R37) is connected to the DC power supply ; The emitter of the fourth triode (Q4) is grounded, and the collector is connected to one end of the sixth voltage limiting resistor (R36); the other end of the sixth voltage limiting resistor (R36) is connected to a DC power supply . 11.根据权利要求8至10中任一项所述的系统,其特征在于,所述直流电源通过对三相电源系统的某一相电压输出进行分压及稳压后产生。11. The system according to any one of claims 8 to 10, wherein the DC power supply is generated by dividing and stabilizing the voltage output of a certain phase of a three-phase power supply system.
CN2011204087839U 2011-10-24 2011-10-24 Overvoltage and undervoltage protection system for three-phase power system Expired - Fee Related CN202353175U (en)

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